target: cortex_a: do not create new register cache every reset

Commit 68101e67ac16bdead3bd6d48cbe0a2bfd63aac02 introduced a
regression which resulted for ever-growing registers list (as output
by "reg" command), its contents were doubled every reset (actually,
every examination).

Change-Id: Ie3409c795160a2fc840a5e8a892928df0bcc0c57
Reported-by: Daniele Emancipato <daniele12457@hotmail.com>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3100
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c
index 39a79ddff53bf35526a66949163ed9bbbd85d021..d0260daebcda51bb3c23de5afd51b747314f528e 100644 (file)
--- a/src/target/cortex_a.c
+++ b/src/target/cortex_a.c
@@ -2996,9 +2996,13 @@ static int cortex_a_examine_first(struct target *target)
        LOG_DEBUG("target->coreid %" PRId32 " DBGPRSR  0x%" PRIx32, target->coreid, dbg_osreg);
 
        armv7a->arm.core_type = ARM_MODE_MON;
-       retval = cortex_a_dpm_setup(cortex_a, didr);
-       if (retval != ERROR_OK)
-               return retval;
+
+       /* Avoid recreating the registers cache */
+       if (!target_was_examined(target)) {
+               retval = cortex_a_dpm_setup(cortex_a, didr);
+               if (retval != ERROR_OK)
+                       return retval;
+       }
 
        /* Setup Breakpoint Register Pairs */
        cortex_a->brp_num = ((didr >> 24) & 0x0F) + 1;