code polishing to be consistent with other scripts
Change-Id: Ib52a92f48df9d2bdf543792b856e33aa04dbebe3
Signed-off-by: Radek Dostal <radek.dostal@streamunlimited.com>
Reviewed-on: http://openocd.zylin.com/2779
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
;# Each bit represents a cycle of valid data.
}
;# Each bit represents a cycle of valid data.
}
-$TARGETNAME configure -event reset-init {
+$_TARGETNAME configure -event reset-init {
ar9331_25mhz_pll_init
sleep 1
ar9331_ddr1_init
}
set ram_boot_address 0xa0000000
ar9331_25mhz_pll_init
sleep 1
ar9331_ddr1_init
}
set ram_boot_address 0xa0000000
-$TARGETNAME configure -work-area-phys 0xa1FFE000 -work-area-size 0x1000
+$_TARGETNAME configure -work-area-phys 0xa1FFE000 -work-area-size 0x1000
jtag newtap $CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id 1
jtag newtap $CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id 1
-set TARGETNAME $CHIPNAME.cpu
-target create $TARGETNAME mips_m4k -endian big -chain-position $TARGETNAME
+set _TARGETNAME $CHIPNAME.cpu
+target create $_TARGETNAME mips_m4k -endian big -chain-position $_TARGETNAME
-$TARGETNAME configure -event reset-halt-post {
+$_TARGETNAME configure -event reset-halt-post {
#setup PLL to lowest common denominator 300/300/150 setting
mww 0xb8050000 0x000f40a3 ;# reset val + CPU:3 DDR:3 AHB:0
mww 0xb8050000 0x800f40a3 ;# send to PLL
#setup PLL to lowest common denominator 300/300/150 setting
mww 0xb8050000 0x000f40a3 ;# reset val + CPU:3 DDR:3 AHB:0
mww 0xb8050000 0x800f40a3 ;# send to PLL
mww 0xb8050008 3 ;# set reset_switch and clock_switch (resets SoC)
}
mww 0xb8050008 3 ;# set reset_switch and clock_switch (resets SoC)
}
-$TARGETNAME configure -event reset-init {
+$_TARGETNAME configure -event reset-init {
#complete pll initialization
mww 0xb8050000 0x800f0080 ;# set sw_update bit
mww 0xb8050008 0 ;# clear reset_switch bit
#complete pll initialization
mww 0xb8050000 0x800f0080 ;# set sw_update bit
mww 0xb8050008 0 ;# clear reset_switch bit
}
# setup working area somewhere in RAM
}
# setup working area somewhere in RAM
-$TARGETNAME configure -work-area-phys 0xa0600000 -work-area-size 0x20000
+$_TARGETNAME configure -work-area-phys 0xa0600000 -work-area-size 0x20000
# serial SPI capable flash
# flash bank <driver> <base> <size> <chip_width> <bus_width>
# serial SPI capable flash
# flash bank <driver> <base> <size> <chip_width> <bus_width>
jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id $_CPUTAPID
jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id $_CPUTAPID
-set TARGETNAME $_CHIPNAME.cpu
-target create $TARGETNAME mips_m4k -endian big -chain-position $TARGETNAME
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME mips_m4k -endian big -chain-position $_TARGETNAME
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