mips32_dmaacc: add new funct ejtag_dma_dstrt_poll 43/1343/5
authorOleksij Rempel <bug-track@fisher-privat.net>
Thu, 18 Apr 2013 09:47:22 +0000 (11:47 +0200)
committerSpencer Oliver <spen@spen-soft.co.uk>
Wed, 17 Jul 2013 14:33:09 +0000 (14:33 +0000)
Change-Id: I8472a85032e397445408dce917f60c8e6ce852e2
Signed-off-by: Oleksij Rempel <bug-track@fisher-privat.net>
Reviewed-on: http://openocd.zylin.com/1343
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
src/target/mips32_dmaacc.c

index 308507b488464b08f519edbf9ec362b827b0c47f..733f96cf42395fcfc595fa4ae594b4dc3f734065 100644 (file)
@@ -53,6 +53,15 @@ static int mips32_dmaacc_write_mem32(struct mips_ejtag *ejtag_info,
  * displaying/modifying memory and memory mapped registers.
  */
 
  * displaying/modifying memory and memory mapped registers.
  */
 
+static void ejtag_dma_dstrt_poll(struct mips_ejtag *ejtag_info)
+{
+       uint32_t ejtag_ctrl;
+       do {
+               ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
+               mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
+       } while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
+}
+
 static int ejtag_dma_read(struct mips_ejtag *ejtag_info, uint32_t addr, uint32_t *data)
 {
        uint32_t v;
 static int ejtag_dma_read(struct mips_ejtag *ejtag_info, uint32_t addr, uint32_t *data)
 {
        uint32_t v;
@@ -72,10 +81,7 @@ begin_ejtag_dma_read:
        mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 
        /* Wait for DSTRT to Clear */
        mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 
        /* Wait for DSTRT to Clear */
-       do {
-               ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
-               mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
-       } while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
+       ejtag_dma_dstrt_poll(ejtag_info);
 
        /* Read Data */
        mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA);
 
        /* Read Data */
        mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA);
@@ -117,10 +123,7 @@ begin_ejtag_dma_read_h:
        mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 
        /* Wait for DSTRT to Clear */
        mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 
        /* Wait for DSTRT to Clear */
-       do {
-               ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
-               mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
-       } while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
+       ejtag_dma_dstrt_poll(ejtag_info);
 
        /* Read Data */
        mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA);
 
        /* Read Data */
        mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA);
@@ -167,10 +170,7 @@ begin_ejtag_dma_read_b:
        mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 
        /* Wait for DSTRT to Clear */
        mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 
        /* Wait for DSTRT to Clear */
-       do {
-               ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
-               mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
-       } while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
+       ejtag_dma_dstrt_poll(ejtag_info);
 
        /* Read Data */
        mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA);
 
        /* Read Data */
        mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA);
@@ -232,10 +232,7 @@ begin_ejtag_dma_write:
        mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 
        /* Wait for DSTRT to Clear */
        mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 
        /* Wait for DSTRT to Clear */
-       do {
-               ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
-               mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
-       } while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
+       ejtag_dma_dstrt_poll(ejtag_info);
 
        /* Clear DMA & Check DERR */
        mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
 
        /* Clear DMA & Check DERR */
        mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
@@ -281,10 +278,7 @@ begin_ejtag_dma_write_h:
        mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 
        /* Wait for DSTRT to Clear */
        mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 
        /* Wait for DSTRT to Clear */
-       do {
-               ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
-               mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
-       } while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
+       ejtag_dma_dstrt_poll(ejtag_info);
 
        /* Clear DMA & Check DERR */
        mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
 
        /* Clear DMA & Check DERR */
        mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
@@ -331,10 +325,7 @@ begin_ejtag_dma_write_b:
        mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 
        /* Wait for DSTRT to Clear */
        mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 
        /* Wait for DSTRT to Clear */
-       do {
-               ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
-               mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
-       } while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
+       ejtag_dma_dstrt_poll(ejtag_info);
 
        /* Clear DMA & Check DERR */
        mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
 
        /* Clear DMA & Check DERR */
        mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);

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