target/adi_v5_swd, cortex_m: properly handle more cases requiring reconnect 96/2596/5
authorPaul Fertser <fercerpav@gmail.com>
Wed, 11 Mar 2015 08:33:55 +0000 (11:33 +0300)
committerSpencer Oliver <spen@spen-soft.co.uk>
Wed, 25 Mar 2015 21:32:06 +0000 (21:32 +0000)
This brings SWD reconnection procedure in line with the ARM
documentation and changes cortex_m reset procedure to make use of it.

The motivation behind this patch is to make SAM4L "reset" and "reset
halt" properly without SRST. The complication here is that EDBG issues
an additional read of DP_RDBUFF automatically right after writing
SYSRESETREQ, that leads to a FAULT which needs to be dealt with
properly. With this patch the very first ahbap_debugport_init DAP
access will make SWD layer properly reinitialise the link before
continuing.

Runtime tested with mbed CMIS-DAP + KL25 only.

Change-Id: Ic506f9db30931dfa60860036b83f73b897975909
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2596
Tested-by: jenkins
Reviewed-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
src/target/adi_v5_swd.c
src/target/cortex_m.c

index 1827c59dbffc31278266bf98142a603dcceecf6e..2cb61f830bedc42dd95549feda8df0636a21c87e 100644 (file)
@@ -112,6 +112,8 @@ static int swd_connect(struct adiv5_dap *dap)
        /* Note, debugport_init() does setup too */
        jtag_interface->swd->switch_seq(dap, JTAG_TO_SWD);
 
        /* Note, debugport_init() does setup too */
        jtag_interface->swd->switch_seq(dap, JTAG_TO_SWD);
 
+       dap->do_reconnect = false;
+
        swd_queue_dp_read(dap, DP_IDCODE, &idcode);
 
        /* force clear all sticky faults */
        swd_queue_dp_read(dap, DP_IDCODE, &idcode);
 
        /* force clear all sticky faults */
@@ -122,7 +124,8 @@ static int swd_connect(struct adiv5_dap *dap)
        if (status == ERROR_OK) {
                LOG_INFO("SWD IDCODE %#8.8" PRIx32, idcode);
                dap->do_reconnect = false;
        if (status == ERROR_OK) {
                LOG_INFO("SWD IDCODE %#8.8" PRIx32, idcode);
                dap->do_reconnect = false;
-       }
+       } else
+               dap->do_reconnect = true;
 
        return status;
 }
 
        return status;
 }
@@ -132,6 +135,14 @@ static inline int check_sync(struct adiv5_dap *dap)
        return do_sync ? swd_run_inner(dap) : ERROR_OK;
 }
 
        return do_sync ? swd_run_inner(dap) : ERROR_OK;
 }
 
+static int swd_check_reconnect(struct adiv5_dap *dap)
+{
+       if (dap->do_reconnect)
+               return swd_connect(dap);
+
+       return ERROR_OK;
+}
+
 static int swd_queue_ap_abort(struct adiv5_dap *dap, uint8_t *ack)
 {
        const struct swd_driver *swd = jtag_interface->swd;
 static int swd_queue_ap_abort(struct adiv5_dap *dap, uint8_t *ack)
 {
        const struct swd_driver *swd = jtag_interface->swd;
@@ -165,6 +176,10 @@ static int swd_queue_dp_read(struct adiv5_dap *dap, unsigned reg,
        const struct swd_driver *swd = jtag_interface->swd;
        assert(swd);
 
        const struct swd_driver *swd = jtag_interface->swd;
        assert(swd);
 
+       int retval = swd_check_reconnect(dap);
+       if (retval != ERROR_OK)
+               return retval;
+
        swd_queue_dp_bankselect(dap, reg);
        swd->read_reg(dap, swd_cmd(true,  false, reg), data);
 
        swd_queue_dp_bankselect(dap, reg);
        swd->read_reg(dap, swd_cmd(true,  false, reg), data);
 
@@ -177,6 +192,10 @@ static int swd_queue_dp_write(struct adiv5_dap *dap, unsigned reg,
        const struct swd_driver *swd = jtag_interface->swd;
        assert(swd);
 
        const struct swd_driver *swd = jtag_interface->swd;
        assert(swd);
 
+       int retval = swd_check_reconnect(dap);
+       if (retval != ERROR_OK)
+               return retval;
+
        swd_finish_read(dap);
        swd_queue_dp_bankselect(dap, reg);
        swd->write_reg(dap, swd_cmd(false,  false, reg), data);
        swd_finish_read(dap);
        swd_queue_dp_bankselect(dap, reg);
        swd->write_reg(dap, swd_cmd(false,  false, reg), data);
@@ -204,11 +223,9 @@ static int swd_queue_ap_read(struct adiv5_dap *dap, unsigned reg,
        const struct swd_driver *swd = jtag_interface->swd;
        assert(swd);
 
        const struct swd_driver *swd = jtag_interface->swd;
        assert(swd);
 
-       if (dap->do_reconnect) {
-               int retval = swd_connect(dap);
-               if (retval != ERROR_OK)
-                       return retval;
-       }
+       int retval = swd_check_reconnect(dap);
+       if (retval != ERROR_OK)
+               return retval;
 
        swd_queue_ap_bankselect(dap, reg);
        swd->read_reg(dap, swd_cmd(true,  true, reg), dap->last_read);
 
        swd_queue_ap_bankselect(dap, reg);
        swd->read_reg(dap, swd_cmd(true,  true, reg), dap->last_read);
@@ -223,6 +240,10 @@ static int swd_queue_ap_write(struct adiv5_dap *dap, unsigned reg,
        const struct swd_driver *swd = jtag_interface->swd;
        assert(swd);
 
        const struct swd_driver *swd = jtag_interface->swd;
        assert(swd);
 
+       int retval = swd_check_reconnect(dap);
+       if (retval != ERROR_OK)
+               return retval;
+
        swd_finish_read(dap);
        swd_queue_ap_bankselect(dap, reg);
        swd->write_reg(dap, swd_cmd(false,  true, reg), data);
        swd_finish_read(dap);
        swd_queue_ap_bankselect(dap, reg);
        swd->write_reg(dap, swd_cmd(false,  true, reg), data);
index 9234824d654b19ae10c4b6690fd572e71ed916dc..3e42af0a3d864ea4faeac75024368ae02d48d190 100644 (file)
@@ -1053,12 +1053,6 @@ static int cortex_m_assert_reset(struct target *target)
                 * This has the disadvantage of not resetting the peripherals, so a
                 * reset-init event handler is needed to perform any peripheral resets.
                 */
                 * This has the disadvantage of not resetting the peripherals, so a
                 * reset-init event handler is needed to perform any peripheral resets.
                 */
-               retval = mem_ap_write_atomic_u32(swjdp, NVIC_AIRCR,
-                               AIRCR_VECTKEY | ((reset_config == CORTEX_M_RESET_SYSRESETREQ)
-                               ? AIRCR_SYSRESETREQ : AIRCR_VECTRESET));
-               if (retval != ERROR_OK)
-                       return retval;
-
                LOG_DEBUG("Using Cortex-M %s", (reset_config == CORTEX_M_RESET_SYSRESETREQ)
                        ? "SYSRESETREQ" : "VECTRESET");
 
                LOG_DEBUG("Using Cortex-M %s", (reset_config == CORTEX_M_RESET_SYSRESETREQ)
                        ? "SYSRESETREQ" : "VECTRESET");
 
@@ -1067,17 +1061,16 @@ static int cortex_m_assert_reset(struct target *target)
                                "handler to reset any peripherals or configure hardware srst support.");
                }
 
                                "handler to reset any peripherals or configure hardware srst support.");
                }
 
-               /*
-                 SAM4L needs to execute security initalization
-                 startup sequence before AP access would be enabled.
-                 During the intialization CDBGPWRUPACK is pulled low and we
-                 need to wait for it to be set to 1 again.
-               */
-               retval = dap_dp_poll_register(swjdp, DP_CTRL_STAT,
-                                             CDBGPWRUPACK, CDBGPWRUPACK, 100);
+               retval = mem_ap_write_atomic_u32(swjdp, NVIC_AIRCR,
+                               AIRCR_VECTKEY | ((reset_config == CORTEX_M_RESET_SYSRESETREQ)
+                               ? AIRCR_SYSRESETREQ : AIRCR_VECTRESET));
+               if (retval != ERROR_OK)
+                       LOG_DEBUG("Ignoring AP write error right after reset");
+
+               retval = ahbap_debugport_init(swjdp);
                if (retval != ERROR_OK) {
                if (retval != ERROR_OK) {
-                       LOG_ERROR("Failed waitnig for CDBGPWRUPACK");
-                       return ERROR_FAIL;
+                       LOG_ERROR("DP initialisation failed");
+                       return retval;
                }
 
                {
                }
 
                {

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)