Add extra Coresight component ROM identifiers for the Cortex-M4
authorEvan Hunter <ehunter@broadcom.com>
Tue, 25 Sep 2012 06:41:49 +0000 (16:41 +1000)
committerSpencer Oliver <spen@spen-soft.co.uk>
Thu, 27 Sep 2012 14:07:19 +0000 (14:07 +0000)
Signed-off-by: Evan Hunter <ehunter@broadcom.com>
Change-Id: Iaf2d69cf10c341d3a516986677f69a4389b29b1a
Reviewed-on: http://openocd.zylin.com/841
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
src/target/arm_adi_v5.c

index eed84ce957d6407960a5e26bdc8c8574ac8d8f81..65d29f0c2dc121444adea4ba6ab1500667608957 100644 (file)
@@ -1586,6 +1586,10 @@ static int dap_info_command(struct command_context *cmd_ctx,
                                        type = "Cortex-M3 FBP";
                                        full = "(Flash Patch and Breakpoint)";
                                        break;
+                               case 0x00c:
+                                       type = "Cortex-M4 SCS";
+                                       full = "(System Control Space)";
+                                       break;
                                case 0x00d:
                                        type = "CoreSight ETM11";
                                        full = "(Embedded Trace)";
@@ -1635,10 +1639,18 @@ static int dap_info_command(struct command_context *cmd_ctx,
                                        type = "Cortex-M3 ETM";
                                        full = "(Embedded Trace)";
                                        break;
+                               case 0x925:
+                                       type = "Cortex-M4 ETM";
+                                       full = "(Embedded Trace)";
+                                       break;
                                case 0x930:
                                        type = "Cortex-R4 ETM";
                                        full = "(Embedded Trace)";
                                        break;
+                               case 0x9a1:
+                                       type = "Cortex-M4 TPUI";
+                                       full = "(Trace Port Interface Unit)";
+                                       break;
                                case 0xc08:
                                        type = "Cortex-A8 Debug";
                                        full = "(Debug Unit)";

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)