cortex_m: handle armv8m cores without security extension 02/7402/2
authorAntonio Borneo <borneo.antonio@gmail.com>
Wed, 14 Dec 2022 14:54:53 +0000 (15:54 +0100)
committerAntonio Borneo <borneo.antonio@gmail.com>
Sun, 18 Dec 2022 21:52:41 +0000 (21:52 +0000)
Cores armv8m, e.g. Cortex-M33, can be instantiated without the
optional Security Extension.
In this case, the secure registers are not present and when GDB
try accessing them it triggers a set of errors.

For armv8m cores without security extension, don't provide to GDB
the description of the secure registers.

Change-Id: I254478a4cf883e85b786df3f62c726b2f40d88d9
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reported-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7402
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
src/target/cortex_m.c
src/target/cortex_m.h

index 2472e38e20525cfe058de24a56a053149d237788..017a6d3a135720f88c21df1eb836313d1a7e8d1a 100644 (file)
@@ -2270,6 +2270,22 @@ static void cortex_m_dwt_free(struct target *target)
        cm->dwt_cache = NULL;
 }
 
+static bool cortex_m_has_tz(struct target *target)
+{
+       struct armv7m_common *armv7m = target_to_armv7m(target);
+       uint32_t dauthstatus;
+
+       if (armv7m->arm.arch != ARM_ARCH_V8M)
+               return false;
+
+       int retval = target_read_u32(target, DAUTHSTATUS, &dauthstatus);
+       if (retval != ERROR_OK) {
+               LOG_WARNING("Error reading DAUTHSTATUS register");
+               return false;
+       }
+       return (dauthstatus & DAUTHSTATUS_SID_MASK) != 0;
+}
+
 #define MVFR0 0xe000ef40
 #define MVFR1 0xe000ef44
 
@@ -2398,7 +2414,7 @@ int cortex_m_examine(struct target *target)
                        for (size_t idx = ARMV7M_FPU_FIRST_REG; idx <= ARMV7M_FPU_LAST_REG; idx++)
                                armv7m->arm.core_cache->reg_list[idx].exist = false;
 
-               if (armv7m->arm.arch != ARM_ARCH_V8M)
+               if (!cortex_m_has_tz(target))
                        for (size_t idx = ARMV8M_FIRST_REG; idx <= ARMV8M_LAST_REG; idx++)
                                armv7m->arm.core_cache->reg_list[idx].exist = false;
 
index b1de26ebce101248d6a33d5bf4661ca18c7981ed..a1c43b56de526c164d02ae4afd9a43daad3fe24e 100644 (file)
@@ -68,6 +68,9 @@ struct cortex_m_part_info {
 #define DCB_DEMCR      0xE000EDFC
 #define DCB_DSCSR      0xE000EE08
 
+#define DAUTHSTATUS    0xE000EFB8
+#define DAUTHSTATUS_SID_MASK   0x00000030
+
 #define DCRSR_WNR      BIT(16)
 
 #define DWT_CTRL       0xE0001000

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