tcl: Support for Analog Devices ADSP-SC58x / ADSP-SC584-EZBRD

The original script was broken by changes to the Cortex-A code.  The
recent introduction of the mem_ap target provided a new mechanism to
allow the script to be fixed.  This also adds an example board script
for the ADSP-SC584-EZBRD.

Change-Id: I36bc1ac6b6c036539f4175f1e65223ba10a35355
Signed-off-by: Peter Lawrence <majbthrd@gmail.com>
Reviewed-on: http://openocd.zylin.com/4855
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

diff --git a/tcl/board/adsp-sc584-ezbrd.cfg b/tcl/board/adsp-sc584-ezbrd.cfg
new file mode 100644 (file)
index 0000000..1054a94
--- /dev/null
+++ b/tcl/board/adsp-sc584-ezbrd.cfg
@@ -0,0 +1,31 @@
+#
+# Analog Devices ADSP-SC584-EZBRD evaluation board
+#
+# Evaluation boards by Analog Devices (and designs derived from them) use a
+# non-standard 10-pin 0.05" ARM Cortex Debug Connector.  In this bastardized
+# implementation, pin 9 (GND or GNDDetect) has been usurped with JTAG /TRST.
+#
+# As a result, a standards-compliant debug pod will force /TRST active,
+# putting the processor's debug interface into reset and preventing usage.
+#
+# A connector adapter must be employed on these boards to isolate or remap
+# /TRST so that it is only asserted when intended.
+
+# Analog expects users to use their proprietary ICE-1000 / ICE-2000 with all
+# ADSP-SC58x designs, but this is an ARM target (and subject to the
+# qualifications above) many ARM debug pods should be compatible.
+
+#source [find interface/cmsis-dap.cfg]
+source [find interface/jlink.cfg]
+
+# Analog's silicon supports SWD and JTAG, but their proprietary ICE is limited
+# to JTAG.  (This is presumably why their connector pinout was modified.)
+# SWD is chosen here, as it is more efficient and doesn't require /TRST.
+
+transport select swd
+
+# chosen speed is 'safe' choice, but your adapter may be capable of more
+adapter_khz 400
+
+source [find target/adsp-sc58x.cfg]
+

diff --git a/tcl/target/adsp-sc58x.cfg b/tcl/target/adsp-sc58x.cfg
index e2b695215f82f9106fcc34e098e0e221e7c7ce8c..8c9ef1240960dd74df00764f642839dcd714ce1f 100644 (file)
--- a/tcl/target/adsp-sc58x.cfg
+++ b/tcl/target/adsp-sc58x.cfg
@@ -1,11 +1,17 @@
+#

 # Analog Devices ADSP-SC58x (ARM Cortex-A5 plus one or two SHARC+ DSPs)
 # Analog Devices ADSP-SC58x (ARM Cortex-A5 plus one or two SHARC+ DSPs)

+#
+
+# Evaluation boards by Analog Devices (and designs derived from them) use a
+# non-standard 10-pin 0.05" ARM Cortex Debug Connector.  In this bastardized
+# implementation, pin 9 (GND or GNDDetect) has been usurped with JTAG /TRST.
+#
+# As a result, a standards-compliant debug pod will force /TRST active,
+# putting the processor's debug interface into reset and preventing usage.
+#
+# A connector adapter must be employed on these boards to isolate or remap
+# /TRST so that it is only asserted when intended.

 
 

-# evaluation boards by Analog Devices (and designs derived from them) use a non-standard 10-pin 0.05" ARM Cortex Debug Connector
-# pin 9 (GND or GNDDetect) has been usurped with JTAG /TRST
-# as a result, a standards-compliant debug pod will only force the processor's debug interface into reset, preventing usage
-# so, a connector adapter must be employed on these boards to isolate or otherwise prevent /TRST from being asserted
-
-transport select swd

 source [find target/swj-dp.tcl]
 
 if { [info exists CHIPNAME] } {
 source [find target/swj-dp.tcl]
 
 if { [info exists CHIPNAME] } {


@@ -26,21 +32,22 @@ if { [info exists CPUTAPID] } {
        set _CPUTAPID 0x3BA02477
 }
 
        set _CPUTAPID 0x3BA02477
 }
 

-swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID
+swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID

 dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
 
 dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
 

+target create ap0.mem mem_ap -dap $_CHIPNAME.dap -ap-num 0
+

 set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME cortex_a -endian $_ENDIAN -dap $_CHIPNAME.dap
 
 $_TARGETNAME configure -event examine-end {
    global _TARGETNAME
 set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME cortex_a -endian $_ENDIAN -dap $_CHIPNAME.dap
 
 $_TARGETNAME configure -event examine-end {
    global _TARGETNAME

-   sc58x_enabledebug $_TARGETNAME
+   sc58x_enabledebug

 }
 
 }
 

-proc sc58x_enabledebug {target} {
-   # Enable debugging functionality by setting relevant bits in the TAPC_DBGCTL register
-   # the "phys" option is critical; the OpenOCD Cortex-A target code prevents normal mww when the target is not halted
-   # however, it is not possible to halt the target unless these register bits have been set
-   $target mww phys 0x31131000 0xFFFF
+proc sc58x_enabledebug {} {
+   # Enable debugging functionality by setting bits in the TAPC_DBGCTL register
+   # it is not possible to halt the target unless these bits have been set
+   ap0.mem mww 0x31131000 0xFFFF

 }
 
 }