tcl/target: add basic RP2040 target config 75/7275/2
authorTomas Vanek <vanekt@fbl.cz>
Tue, 18 Oct 2022 19:19:20 +0000 (21:19 +0200)
committerAntonio Borneo <borneo.antonio@gmail.com>
Fri, 21 Oct 2022 18:24:36 +0000 (18:24 +0000)
The existing rp2040-core0.cfg configuration file was intended
for a special adapter which selects a SWD multidrop target on its own.
This means that rp2040-core0.cfg is totally unusable with a standard SWD
adapter.

To fix the problem, mark rp2040-core0.cfg as deprecated and
add rp2040.cfg, a basic config file with multidrop target selection.

Change-Id: I5194e42f529a2d9645481424b7c66ab61efa44ee
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7275
Tested-by: jenkins
Reviewed-by: Jonathan Bell <jonathan@raspberrypi.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
tcl/target/rp2040-core0.cfg
tcl/target/rp2040.cfg [new file with mode: 0644]

index 6a0f0ed61ca2ab0e435e651dbec3867bee9ba45d..8a111bcbc7b1cef2dfab911316304e52902d3a4f 100644 (file)
@@ -1,5 +1,17 @@
 # SPDX-License-Identifier: GPL-2.0-or-later
 
+# RP2040 is a microcontroller with dual Cortex-M0+ core.
+# https://www.raspberrypi.com/documentation/microcontrollers/rp2040.html
+
+# The device requires multidrop SWD for debug.
+# This configuration file is intended for a special adapter
+# which selects a multidrop target on its own.
+# Cannot be used with a standard SWD adapter!
+
+echo "Warn : rp2040-core0.cfg configuration file is deprecated and will be"
+echo "       removed in the next release. Use following parameters instead:"
+echo "          -c 'set USE_CORE 0' -f target/rp2040.cfg"
+
 transport select swd
 
 source [find target/swj-dp.tcl]
diff --git a/tcl/target/rp2040.cfg b/tcl/target/rp2040.cfg
new file mode 100644 (file)
index 0000000..ee45542
--- /dev/null
@@ -0,0 +1,74 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# RP2040 is a microcontroller with dual Cortex-M0+ core.
+# https://www.raspberrypi.com/documentation/microcontrollers/rp2040.html
+
+# The device requires multidrop SWD for debug.
+transport select swd
+
+source [find target/swj-dp.tcl]
+
+if { [info exists CHIPNAME] } {
+       set _CHIPNAME $CHIPNAME
+} else {
+       set _CHIPNAME rp2040
+}
+
+if { [info exists WORKAREASIZE] } {
+       set _WORKAREASIZE $WORKAREASIZE
+} else {
+       set _WORKAREASIZE 0x10000
+}
+
+if { [info exists CPUTAPID] } {
+       set _CPUTAPID $CPUTAPID
+} else {
+       set _CPUTAPID 0x01002927
+}
+
+# Set to '0' or '1' for single core configuration,
+# anything else for isolated debugging of both cores
+if { [info exists USE_CORE] } {
+       set _USE_CORE $USE_CORE
+} else {
+       set _USE_CORE { 0 1 }
+}
+set _BOTH_CORES [expr { $_USE_CORE != 0 && $_USE_CORE != 1 }]
+
+swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID
+
+# core 0
+if { $_USE_CORE != 1 } {
+       dap create $_CHIPNAME.dap0 -chain-position $_CHIPNAME.cpu -dp-id $_CPUTAPID -instance-id 0
+       set _TARGETNAME_0 $_CHIPNAME.core0
+       target create $_TARGETNAME_0 cortex_m -dap $_CHIPNAME.dap0 -coreid 0
+       # srst does not exist; use SYSRESETREQ to perform a soft reset
+       $_TARGETNAME_0 cortex_m reset_config sysresetreq
+}
+
+# core 1
+if { $_USE_CORE != 0 } {
+       dap create $_CHIPNAME.dap1 -chain-position $_CHIPNAME.cpu -dp-id $_CPUTAPID -instance-id 1
+       set _TARGETNAME_1 $_CHIPNAME.core1
+       target create $_TARGETNAME_1 cortex_m -dap $_CHIPNAME.dap1 -coreid 1
+       $_TARGETNAME_1 cortex_m reset_config sysresetreq
+}
+
+if { $_USE_CORE == 1 } {
+       set _FLASH_TARGET $_TARGETNAME_1
+} else {
+       set _FLASH_TARGET $_TARGETNAME_0
+}
+# Backup the work area. The flash probe runs an algorithm on the target CPU.
+# The flash is probed during gdb connect if gdb_memory_map is enabled (by default).
+$_FLASH_TARGET configure -work-area-phys 0x20010000 -work-area-size $_WORKAREASIZE -work-area-backup 1
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME rp2040_flash 0x10000000 0 0 0 $_FLASH_TARGET
+
+if { $_BOTH_CORES } {
+       # Alias to ensure gdb connecting to core 1 gets the correct memory map
+       flash bank $_CHIPNAME.alias virtual 0x10000000 0 0 0 $_TARGETNAME_1 $_FLASHNAME
+
+       # Select core 0
+       targets $_TARGETNAME_0
+}

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