cfg: add srst_nogate to the supported targets, remove from board configs

It depends on the particular target whether it can work with SRST
asserted or not, so this belongs to the target config rather than the
board config.

Also, this allows for simple

openocd -f myboard.cfg -c "reset_config connect_assert_srst"

command to be used whenever a user feels a need to connect to an
unresponsive target.

Change-Id: I3d8da9ae47088fc0c75a20bfdd20074be1014de0
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2459
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

diff --git a/tcl/board/st_nucleo_f0.cfg b/tcl/board/st_nucleo_f0.cfg
index 0cd75b600ba995a67d10e1c68f7f90f3376808c5..e9fda19a690ae4c72717b7c3ef24ed54b65aef47 100644 (file)
--- a/tcl/board/st_nucleo_f0.cfg
+++ b/tcl/board/st_nucleo_f0.cfg
@@ -1,4 +1,4 @@
-# This is for all ST NUCLEO with any STM32F0. Know Boards at the moment:
+# This is for all ST NUCLEO with any STM32F0. Known boards at the moment:
 # STM32F030R8
 # http://www.st.com/web/catalog/tools/FM116/SC959/SS1532/LN1847/PF259997
 # NUCLEO-F072RB
@@ -12,5 +12,4 @@ transport select hla_swd
 
 source [find target/stm32f0x.cfg]
 
-# use hardware reset, connect under reset
-reset_config srst_only srst_nogate
+reset_config srst_only

diff --git a/tcl/board/st_nucleo_f103rb.cfg b/tcl/board/st_nucleo_f103rb.cfg
index d5024cc64c9962d548fc652c1fbd33f8ee3041f0..71a92f704e312bd37451bd3b34e97d37bd6fe7ef 100644 (file)
--- a/tcl/board/st_nucleo_f103rb.cfg
+++ b/tcl/board/st_nucleo_f103rb.cfg
@@ -7,5 +7,4 @@ transport select hla_swd
 
 source [find target/stm32f1x.cfg]
 
-# use hardware reset, connect under reset
-reset_config srst_only srst_nogate
+reset_config srst_only

diff --git a/tcl/board/st_nucleo_f334r8.cfg b/tcl/board/st_nucleo_f334r8.cfg
index e0dfb689d0b9be4cc37c5eae6af2ddc032d6a8af..9dffdcbbdec3ed81875f660b6ee8ee28fb06393c 100644 (file)
--- a/tcl/board/st_nucleo_f334r8.cfg
+++ b/tcl/board/st_nucleo_f334r8.cfg
@@ -7,5 +7,4 @@ transport select hla_swd
 
 source [find target/stm32f3x.cfg]
 
-# use hardware reset, connect under reset
-reset_config srst_only srst_nogate
+reset_config srst_only

diff --git a/tcl/board/st_nucleo_f4.cfg b/tcl/board/st_nucleo_f4.cfg
index 84b4b53f584b33f9d1f9c7f914f18277261b0539..b5a78c1c094f2bd5248540ff2d1fef0316890d1a 100644 (file)
--- a/tcl/board/st_nucleo_f4.cfg
+++ b/tcl/board/st_nucleo_f4.cfg
@@ -1,4 +1,4 @@
-# This is for all ST NUCLEO with any STM32F. Know Boards at the moment:
+# This is for all ST NUCLEO with any STM32F4. Known boards at the moment:
 # STM32F401RET6
 # http://www.st.com/web/catalog/tools/FM116/SC959/SS1532/LN1847/PF260000
 # STM32F411RET6
@@ -10,5 +10,4 @@ transport select hla_swd
 
 source [find target/stm32f4x.cfg]
 
-# use hardware reset, connect under reset
-reset_config srst_only srst_nogate
+reset_config srst_only

diff --git a/tcl/board/stm320518_eval_stlink.cfg b/tcl/board/stm320518_eval_stlink.cfg
index 0e2ac598203fa3da1c2a1456ee2c9f7e9b534189..ce074cbf2a37e19fb3ba7d74b6f2e3466f3ae8a1 100644 (file)
--- a/tcl/board/stm320518_eval_stlink.cfg
+++ b/tcl/board/stm320518_eval_stlink.cfg
@@ -16,5 +16,4 @@ set CHIPNAME STM32F051R8T6
 
 source [find target/stm32f0x.cfg]
 
-# use hardware reset, connect under reset
-reset_config srst_only srst_nogate
+reset_config srst_only

diff --git a/tcl/board/stm3220g_eval_stlink.cfg b/tcl/board/stm3220g_eval_stlink.cfg
index 55856cf051e7e2158e2f91db32ff0ded127191d8..43a4df98601c5fff70f015942e5291d1fbf5cb3a 100644 (file)
--- a/tcl/board/stm3220g_eval_stlink.cfg
+++ b/tcl/board/stm3220g_eval_stlink.cfg
@@ -16,5 +16,4 @@ set CHIPNAME STM32F207IGH6
 
 source [find target/stm32f2x.cfg]
 
-# use hardware reset, connect under reset
-reset_config srst_only srst_nogate
+reset_config srst_only

diff --git a/tcl/board/stm3241g_eval_stlink.cfg b/tcl/board/stm3241g_eval_stlink.cfg
index 72b2d32ccd82201bb44c59c20e7893993fc1dab4..9c7ad5d95fa914d624261bcfafb3bc22fc0f61d7 100644 (file)
--- a/tcl/board/stm3241g_eval_stlink.cfg
+++ b/tcl/board/stm3241g_eval_stlink.cfg
@@ -16,5 +16,4 @@ set CHIPNAME STM32F417IGH6
 
 source [find target/stm32f4x.cfg]
 
-# use hardware reset, connect under reset
-reset_config srst_only srst_nogate
+reset_config srst_only

diff --git a/tcl/board/stm32429i_eval_stlink.cfg b/tcl/board/stm32429i_eval_stlink.cfg
index 117409aa2a28d2940dcb4beb408f089f1e662cfb..2b51cea675907cdca7554f0aeb7ebed4175f406d 100644 (file)
--- a/tcl/board/stm32429i_eval_stlink.cfg
+++ b/tcl/board/stm32429i_eval_stlink.cfg
@@ -16,5 +16,4 @@ set CHIPNAME STM32F429NIH6
 
 source [find target/stm32f4x.cfg]
 
-# use hardware reset, connect under reset
-reset_config srst_only srst_nogate
+reset_config srst_only

diff --git a/tcl/board/stm32439i_eval_stlink.cfg b/tcl/board/stm32439i_eval_stlink.cfg
index efc47f7d1a2b084c29900c00bb6777f828625254..5995fb1d286c81668d43b5abdeb725d87cee1bfc 100644 (file)
--- a/tcl/board/stm32439i_eval_stlink.cfg
+++ b/tcl/board/stm32439i_eval_stlink.cfg
@@ -16,5 +16,4 @@ set CHIPNAME STM32F439NIH6
 
 source [find target/stm32f4x.cfg]
 
-# use hardware reset, connect under reset
-reset_config srst_only srst_nogate
+reset_config srst_only

diff --git a/tcl/board/stm32f0discovery.cfg b/tcl/board/stm32f0discovery.cfg
index 66086cdd6713f233a8891b6e95802f714809d820..bae9a69ba0d40f43ca69c6bbc74e6d33927abf91 100644 (file)
--- a/tcl/board/stm32f0discovery.cfg
+++ b/tcl/board/stm32f0discovery.cfg
@@ -8,5 +8,4 @@ transport select hla_swd
 set WORKAREASIZE 0x2000
 source [find target/stm32f0x.cfg]
 
-# use hardware reset, connect under reset
-reset_config srst_only srst_nogate
+reset_config srst_only

diff --git a/tcl/board/stm32f3discovery.cfg b/tcl/board/stm32f3discovery.cfg
index 24a9261ffd67509d2c27a8d126f9288348528f89..5a17b4c992f609a81cc49df66d3918b050abd92c 100644 (file)
--- a/tcl/board/stm32f3discovery.cfg
+++ b/tcl/board/stm32f3discovery.cfg
@@ -7,5 +7,4 @@ transport select hla_swd
 
 source [find target/stm32f3x.cfg]
 
-# use hardware reset, connect under reset
-reset_config srst_only srst_nogate
+reset_config srst_only

diff --git a/tcl/board/stm32f429discovery.cfg b/tcl/board/stm32f429discovery.cfg
index 220298ecaaae87dfbeb1f4bc291f3e7b3d88fde0..eddaa9f6141bd21cd4935d8f512a9bac6b399324 100644 (file)
--- a/tcl/board/stm32f429discovery.cfg
+++ b/tcl/board/stm32f429discovery.cfg
@@ -9,5 +9,4 @@ transport select hla_swd
 
 source [find target/stm32f4x.cfg]
 
-# use hardware reset, connect under reset supported
-reset_config srst_only srst_nogate
+reset_config srst_only

diff --git a/tcl/board/stm32f4discovery.cfg b/tcl/board/stm32f4discovery.cfg
index 990ee3284b529de361ee0869fb1ab48f7e6a05a3..f5b52920434438f48c4d92f95e18ffb484e1a8e1 100644 (file)
--- a/tcl/board/stm32f4discovery.cfg
+++ b/tcl/board/stm32f4discovery.cfg
@@ -7,5 +7,4 @@ transport select hla_swd
 
 source [find target/stm32f4x.cfg]
 
-# use hardware reset, connect under reset
-reset_config srst_only srst_nogate
+reset_config srst_only

diff --git a/tcl/board/stm32l0discovery.cfg b/tcl/board/stm32l0discovery.cfg
index 57b8a60027cea87fce50d1ad23a98cc97a398d1e..a035062242f36e286d38f394744c083066c6e21c 100644 (file)
--- a/tcl/board/stm32l0discovery.cfg
+++ b/tcl/board/stm32l0discovery.cfg
@@ -8,5 +8,4 @@ transport select hla_swd
 set WORKAREASIZE 0x2000
 source [find target/stm32l0.cfg]
 
-# use hardware reset, connect under reset
-reset_config srst_only srst_nogate
+reset_config srst_only

diff --git a/tcl/board/stm32ldiscovery.cfg b/tcl/board/stm32ldiscovery.cfg
index b31a663a409a46f7d78bb71f7ddee0bffbc20832..8678d290bd144dd79672ce01258b32fdb212f0e8 100644 (file)
--- a/tcl/board/stm32ldiscovery.cfg
+++ b/tcl/board/stm32ldiscovery.cfg
@@ -8,5 +8,4 @@ transport select hla_swd
 set WORKAREASIZE 0x4000
 source [find target/stm32l1.cfg]
 
-# use hardware reset, connect under reset
-reset_config srst_only srst_nogate
+reset_config srst_only

diff --git a/tcl/board/stm32vldiscovery.cfg b/tcl/board/stm32vldiscovery.cfg
index 19b42aefca7bca6749361b7a4f7c32ad3a4805e9..970b5101e81ecb6b9e6a1bcb64e48c357582542c 100644 (file)
--- a/tcl/board/stm32vldiscovery.cfg
+++ b/tcl/board/stm32vldiscovery.cfg
@@ -8,3 +8,4 @@ transport select hla_swd
 set WORKAREASIZE 0x2000
 source [find target/stm32f1x.cfg]
 
+reset_config srst_only

diff --git a/tcl/target/k40.cfg b/tcl/target/k40.cfg
index a139dcdbee7a2aaa25425fad99ffefb6f9c8c7e6..b0f699401cb6bdc76c6be063e320093140e3d144 100644 (file)
--- a/tcl/target/k40.cfg
+++ b/tcl/target/k40.cfg
@@ -31,8 +31,7 @@ swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPU
 
 target create $_TARGETNAME cortex_m -chain-position $_CHIPNAME.cpu
 
-$_CHIPNAME.cpu configure -event examine-start { puts "START..." ; }
-$_CHIPNAME.cpu configure -event examine-end { puts "END..." ; }
+reset_config srst_nogate
 
 if {![using_hla]} {
    # if srst is not fitted use SYSRESETREQ to

diff --git a/tcl/target/k60.cfg b/tcl/target/k60.cfg
index a368e0b26dad73161ca6a8e24ab5e4a544ec02dc..0e7adc4a5f4488e9c60f1cb0c3e4feeb0423dde8 100644 (file)
--- a/tcl/target/k60.cfg
+++ b/tcl/target/k60.cfg
@@ -31,8 +31,7 @@ swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPU
 
 target create $_TARGETNAME cortex_m -chain-position $_CHIPNAME.cpu
 
-$_CHIPNAME.cpu configure -event examine-start { puts "START..." ; }
-$_CHIPNAME.cpu configure -event examine-end { puts "END..." ; }
+reset_config srst_nogate
 
 if {![using_hla]} {
    # if srst is not fitted use SYSRESETREQ to

diff --git a/tcl/target/kl25.cfg b/tcl/target/kl25.cfg
index 7b14ecc8ec17a25dc496ae2ba16854a271d4c748..b75e0a565d776f0c9c4aa1f6f17f60e110a8f797 100644 (file)
--- a/tcl/target/kl25.cfg
+++ b/tcl/target/kl25.cfg
@@ -55,6 +55,8 @@ flash bank $_FLASHNAME kinetis 0 0 0 0 $_TARGETNAME
 # specifies up to 1MHz for VLPR mode.
 adapter_khz 1000
 
+reset_config srst_nogate
+
 if {![using_hla]} {
    # if srst is not fitted use SYSRESETREQ to
    # perform a soft reset

diff --git a/tcl/target/stm32f0x.cfg b/tcl/target/stm32f0x.cfg
index 30ea717172fb2e762da2f53fb2abfdc513fb4fce..ff6d7f14a111ec35ff63c972ee438a37d90e476a 100644 (file)
--- a/tcl/target/stm32f0x.cfg
+++ b/tcl/target/stm32f0x.cfg
@@ -46,6 +46,8 @@ adapter_khz 1000
 
 adapter_nsrst_delay 100
 
+reset_config srst_nogate
+
 if {![using_hla]} {
    # if srst is not fitted use SYSRESETREQ to
    # perform a soft reset

diff --git a/tcl/target/stm32f1x.cfg b/tcl/target/stm32f1x.cfg
index 46d70b1ed6d93e8c27d31fe84b2db9427cf0a289..6a62992d263097b551284533b8ab280e4a8ecec0 100644 (file)
--- a/tcl/target/stm32f1x.cfg
+++ b/tcl/target/stm32f1x.cfg
@@ -86,6 +86,8 @@ if {[using_jtag]} {
  jtag_ntrst_delay 100
 }
 
+reset_config srst_nogate
+
 if {![using_hla]} {
     # if srst is not fitted use SYSRESETREQ to
     # perform a soft reset

diff --git a/tcl/target/stm32f2x.cfg b/tcl/target/stm32f2x.cfg
index 62e35a4c44ed2e19d52f8ed8e3ef226ff643da9c..0ac73a519988996a463f7e8c911a790632f47967 100644 (file)
--- a/tcl/target/stm32f2x.cfg
+++ b/tcl/target/stm32f2x.cfg
@@ -70,6 +70,8 @@ $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE
 set _FLASHNAME $_CHIPNAME.flash
 flash bank $_FLASHNAME stm32f2x 0 0 0 0 $_TARGETNAME
 
+reset_config srst_nogate
+
 if {![using_hla]} {
    # if srst is not fitted use SYSRESETREQ to
    # perform a soft reset

diff --git a/tcl/target/stm32f3x.cfg b/tcl/target/stm32f3x.cfg
index 4ad4bd5736ce8cc169ee51e7ec7fe77ec8fb3448..9547d8437c6371f2aa839a43c100d99d92bb6047 100644 (file)
--- a/tcl/target/stm32f3x.cfg
+++ b/tcl/target/stm32f3x.cfg
@@ -70,6 +70,8 @@ $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE
 set _FLASHNAME $_CHIPNAME.flash
 flash bank $_FLASHNAME stm32f1x 0 0 0 0 $_TARGETNAME
 
+reset_config srst_nogate
+
 if {![using_hla]} {
    # if srst is not fitted use SYSRESETREQ to
    # perform a soft reset

diff --git a/tcl/target/stm32f4x.cfg b/tcl/target/stm32f4x.cfg
index faa6a7e595f0fd65dd5f10fd4d77dc2f80f3e820..fd5cab6a1c74390839aab7842a29606e6c627a75 100644 (file)
--- a/tcl/target/stm32f4x.cfg
+++ b/tcl/target/stm32f4x.cfg
@@ -82,6 +82,8 @@ if {[using_jtag]} {
  jtag_ntrst_delay 100
 }
 
+reset_config srst_nogate
+
 if {![using_hla]} {
    # if srst is not fitted use SYSRESETREQ to
    # perform a soft reset

diff --git a/tcl/target/stm32l0.cfg b/tcl/target/stm32l0.cfg
index 45b3c364cff98a49191c128f05a28042b867e221..fd8f951bd3fc280390ec1342b1362a011a8d4b1d 100644 (file)
--- a/tcl/target/stm32l0.cfg
+++ b/tcl/target/stm32l0.cfg
@@ -46,6 +46,8 @@ $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE
 set _FLASHNAME $_CHIPNAME.flash
 flash bank $_FLASHNAME stm32lx 0x08000000 0 0 0 $_TARGETNAME
 
+reset_config srst_nogate
+
 if {![using_hla]} {
    # if srst is not fitted use SYSRESETREQ to
    # perform a soft reset

diff --git a/tcl/target/stm32l1.cfg b/tcl/target/stm32l1.cfg
index ccbec09d2ededcdb7aeccac3547eb3a679b0afef..8591830cc176d0d8ca41afa5fbb1c0c82fc77e84 100644 (file)
--- a/tcl/target/stm32l1.cfg
+++ b/tcl/target/stm32l1.cfg
@@ -75,6 +75,8 @@ $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE
 set _FLASHNAME $_CHIPNAME.flash
 flash bank $_FLASHNAME stm32lx 0x08000000 0 0 0 $_TARGETNAME
 
+reset_config srst_nogate
+
 if {![using_hla]} {
    # if srst is not fitted use SYSRESETREQ to
    # perform a soft reset

diff --git a/tcl/target/stm32w108xx.cfg b/tcl/target/stm32w108xx.cfg
index 864917f4fcec5256c0487f2724ae720dbe271e19..1a1913541401791e3e2ae04357393da17d787ea2 100644 (file)
--- a/tcl/target/stm32w108xx.cfg
+++ b/tcl/target/stm32w108xx.cfg
@@ -63,6 +63,8 @@ set _FLASHNAME $_CHIPNAME.flash
 # 64k (0x10000) of flash
 flash bank $_FLASHNAME em357 0x08000000 0x10000 0 0 $_TARGETNAME
 
+reset_config srst_nogate
+
 if {![using_hla]} {
    cortex_m reset_config sysresetreq
 }