armv7m: Fix memory leak in register caching.

Change-Id: I184042d277a52f3940d6d6c13f3d94afc557933d
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
[andreas.fritiofson@gmail.com: don't check pointers before free()]
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/2881
Tested-by: jenkins

diff --git a/src/target/armv7m.c b/src/target/armv7m.c
index ccb3e5456e5037abb104b830d0fad151be416f14..15de8cd9c71e3b7d2aff2d8d1496c2fe4cf5cc37 100644 (file)
--- a/src/target/armv7m.c
+++ b/src/target/armv7m.c
@@ -622,6 +622,34 @@ struct reg_cache *armv7m_build_reg_cache(struct target *target)
        return cache;
 }
 
        return cache;
 }
 

+void armv7m_free_reg_cache(struct target *target)
+{
+       struct armv7m_common *armv7m = target_to_armv7m(target);
+       struct arm *arm = &armv7m->arm;
+       struct reg_cache *cache;
+       struct reg *reg;
+       unsigned int i;
+
+       cache = arm->core_cache;
+
+       if (!cache)
+               return;
+
+       for (i = 0; i < cache->num_regs; i++) {
+               reg = &cache->reg_list[i];
+
+               free(reg->feature);
+               free(reg->reg_data_type);
+               free(reg->value);
+       }
+
+       free(cache->reg_list[0].arch_info);
+       free(cache->reg_list);
+       free(cache);
+
+       arm->core_cache = NULL;
+}
+

 static int armv7m_setup_semihosting(struct target *target, int enable)
 {
        /* nothing todo for armv7m */
 static int armv7m_setup_semihosting(struct target *target, int enable)
 {
        /* nothing todo for armv7m */

diff --git a/src/target/armv7m.h b/src/target/armv7m.h
index 19744604e004ffe4a6b607ec881ab25f689f14ec..4ecf102c5c547fd066353cb59803a7ba6cedbfde 100644 (file)
--- a/src/target/armv7m.h
+++ b/src/target/armv7m.h
@@ -186,6 +186,8 @@ struct armv7m_algorithm {
 };
 
 struct reg_cache *armv7m_build_reg_cache(struct target *target);
 };
 
 struct reg_cache *armv7m_build_reg_cache(struct target *target);

+void armv7m_free_reg_cache(struct target *target);
+

 enum armv7m_mode armv7m_number_to_mode(int number);
 int armv7m_mode_to_number(enum armv7m_mode mode);
 
 enum armv7m_mode armv7m_number_to_mode(int number);
 int armv7m_mode_to_number(enum armv7m_mode mode);
 

diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 2cb83a496fe85bb94d419bd35bf70d27cb35bfd6..87956717d3a195e02ce067e74331af64f2976a18 100644 (file)
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -1694,7 +1694,10 @@ void cortex_m_deinit_target(struct target *target)
        struct cortex_m_common *cortex_m = target_to_cm(target);
 
        free(cortex_m->fp_comparator_list);
        struct cortex_m_common *cortex_m = target_to_cm(target);
 
        free(cortex_m->fp_comparator_list);

+

        cortex_m_dwt_free(target);
        cortex_m_dwt_free(target);

+       armv7m_free_reg_cache(target);
+

        free(cortex_m);
 }
 
        free(cortex_m);
 }
 


@@ -1924,10 +1927,14 @@ int cortex_m_examine(struct target *target)
                    armv7m->arm.core_cache->num_regs > ARMV7M_NUM_CORE_REGS_NOFP) {
                        /* free unavailable FPU registers */
                        size_t idx;
                    armv7m->arm.core_cache->num_regs > ARMV7M_NUM_CORE_REGS_NOFP) {
                        /* free unavailable FPU registers */
                        size_t idx;

+

                        for (idx = ARMV7M_NUM_CORE_REGS_NOFP;
                             idx < armv7m->arm.core_cache->num_regs;
                        for (idx = ARMV7M_NUM_CORE_REGS_NOFP;
                             idx < armv7m->arm.core_cache->num_regs;

-                            idx++)
+                            idx++) {

                                free(armv7m->arm.core_cache->reg_list[idx].value);
                                free(armv7m->arm.core_cache->reg_list[idx].value);

+                               free(armv7m->arm.core_cache->reg_list[idx].feature);
+                               free(armv7m->arm.core_cache->reg_list[idx].reg_data_type);
+                       }

                        armv7m->arm.core_cache->num_regs = ARMV7M_NUM_CORE_REGS_NOFP;
                }
 
                        armv7m->arm.core_cache->num_regs = ARMV7M_NUM_CORE_REGS_NOFP;
                }