target/armv7m: fix static analyzer warning 56/6256/3
authorTomas Vanek <vanekt@fbl.cz>
Sun, 16 May 2021 08:05:02 +0000 (10:05 +0200)
committerTomas Vanek <vanekt@fbl.cz>
Tue, 18 May 2021 08:03:28 +0000 (09:03 +0100)
Despite of assert(is_packed) clang static analyser complains on use
of the uninitialized offset variable.

Cross compiling with latest x86_64-w64-mingw32-gcc hits warnings
src/target/armv7m.c: In function ‘armv7m_read_core_reg’:
src/target/armv7m.c:337:54: error: ‘reg32_id’ may be used
    uninitialized in this function [-Werror=maybe-uninitialized]

It happens because mingw32 defines assert() without the attribute
"noreturn", whatever NDEBUG is defined or not.

Replace assert(is_packed) by if (is_packed) conditional and call
assert(false) in the else branch.

Change-Id: Id3c7dcccb65106e28be200b9a4d2b642f4d31019
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/6256
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Andrzej Sierżęga <asier70@gmail.com>
src/target/armv7m.c

index 2bcb8abae0e050eb5bf973556b2633f2a62c1a7e..11770b5b5a12e7cd81e73e87503e8bb95f119e59 100644 (file)
@@ -329,11 +329,17 @@ static int armv7m_read_core_reg(struct target *target, struct reg *r,
 
        if (r->size <= 8) {
                /* any 8-bit or shorter register is packed */
-               uint32_t offset = 0;    /* silence false gcc warning */
+               uint32_t offset;
                unsigned int reg32_id;
 
                bool is_packed = armv7m_map_reg_packing(num, &reg32_id, &offset);
-               assert(is_packed);
+               if (!is_packed) {
+                       /* We should not get here as all 8-bit or shorter registers
+                        * are packed */
+                       assert(false);
+                       /* assert() does nothing if NDEBUG is defined */
+                       return ERROR_FAIL;
+               }
                struct reg *r32 = &armv7m->arm.core_cache->reg_list[reg32_id];
 
                /* Read 32-bit container register if not cached */
@@ -394,11 +400,17 @@ static int armv7m_write_core_reg(struct target *target, struct reg *r,
 
        if (r->size <= 8) {
                /* any 8-bit or shorter register is packed */
-               uint32_t offset = 0;    /* silence false gcc warning */
+               uint32_t offset;
                unsigned int reg32_id;
 
                bool is_packed = armv7m_map_reg_packing(num, &reg32_id, &offset);
-               assert(is_packed);
+               if (!is_packed) {
+                       /* We should not get here as all 8-bit or shorter registers
+                        * are packed */
+                       assert(false);
+                       /* assert() does nothing if NDEBUG is defined */
+                       return ERROR_FAIL;
+               }
                struct reg *r32 = &armv7m->arm.core_cache->reg_list[reg32_id];
 
                if (!r32->valid) {

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)