icepick-d: extend access to core control register

The ICEPick-D jtag router has core control registers
that provide the same (or similar) functionality as
the tap control register, for individual cores
accessible through the same tap (e.g. through a DAP).

Core control registers are located at address "0x60 +
core-id" of the ROUTER address space (IR=ROUTER).

It is sometimes helpful or even necessary to modify the
core control register. This patch renames the
"icepick_d_coreid" function to the more appropriate
"icepick_d_core_control" and adds a "value" argument
that allows writing of arbitrary value.
"icepick_d_tapenable" is extended by an optional value
argument so that core control can be written as the tap
is enabled.

Change-Id: I0e7f91b596cb5075364c6c233348508f58e0a901
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4141
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>

diff --git a/tcl/target/icepick.cfg b/tcl/target/icepick.cfg
index abd7b6a084db6c5468edc49db3acffcaf97241c1..0f160bb1073c2342391c3ba5cd9c373b8ad83730 100644 (file)
--- a/tcl/target/icepick.cfg
+++ b/tcl/target/icepick.cfg
@@ -63,7 +63,8 @@ proc icepick_c_router {jrc rw block register payload} {
        irscan $jrc [CONST IR_ROUTER] -endstate IRPAUSE
 
        # ROUTER instructions are 32 bits wide
        irscan $jrc [CONST IR_ROUTER] -endstate IRPAUSE
 
        # ROUTER instructions are 32 bits wide

-       set old_dr_value [drscan $jrc 32 $new_dr_value -endstate DRPAUSE]
+       set old_dr_value 0x[drscan $jrc 32 $new_dr_value -endstate DRPAUSE]
+#      echo "\tOld router value:\t0x[format %x $old_dr_value]"

 }
 
 # Configure the icepick control register
 }
 
 # Configure the icepick control register


@@ -109,15 +110,15 @@ proc icepick_c_tapenable {jrc port} {
 
 # jrc  == TAP name for the ICEpick
 # coreid== core id number 0..15 (not same as port number!)
 
 # jrc  == TAP name for the ICEpick
 # coreid== core id number 0..15 (not same as port number!)

-proc icepick_d_set_coreid {jrc coreid } {
-       icepick_c_router $jrc 1 0x6 $coreid 0x2008
+proc icepick_d_set_core_control {jrc coreid value } {
+       icepick_c_router $jrc 1 0x6 $coreid $value

 }
 
 # jrc  == TAP name for the ICEpick
 # port == a port number, 0..15
 # Follow the sequence described in
 # http://processors.wiki.ti.com/images/f/f6/Router_Scan_Sequence-ICEpick-D.pdf
 }
 
 # jrc  == TAP name for the ICEpick
 # port == a port number, 0..15
 # Follow the sequence described in
 # http://processors.wiki.ti.com/images/f/f6/Router_Scan_Sequence-ICEpick-D.pdf

-proc icepick_d_tapenable {jrc port coreid} {
+proc icepick_d_tapenable {jrc port coreid { value 0x2008 } } {

        # First CONNECT to the ICEPick
        icepick_c_connect $jrc
        icepick_c_setup $jrc
        # First CONNECT to the ICEPick
        icepick_c_connect $jrc
        icepick_c_setup $jrc


@@ -125,8 +126,8 @@ proc icepick_d_tapenable {jrc port coreid} {
        # Select the port
        icepick_c_router $jrc 1 0x2 $port 0x2108
 
        # Select the port
        icepick_c_router $jrc 1 0x2 $port 0x2108
 

-       # Set 4 bit core ID to the Cortex-A
-       icepick_d_set_coreid $jrc $coreid
+       # Set icepick core control for $coreid
+       icepick_d_set_core_control $jrc $coreid $value

 
        # Enter the bypass state
        irscan $jrc [CONST IF_BYPASS] -endstate RUN/IDLE
 
        # Enter the bypass state
        irscan $jrc [CONST IF_BYPASS] -endstate RUN/IDLE