+# SPDX-License-Identifier: GPL-2.0-or-later
+
# 1986ВЕ1Т
# http://milandr.ru/index.php?mact=Products,cntnt01,details,0&cntnt01productid=236&cntnt01returnid=68
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Analog Devices ADSP-SC58x (ARM Cortex-A5 plus one or two SHARC+ DSPs)
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# This file was created using as references the stm32f1x.cfg and aduc702x.cfg
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This is the config for an Allwinner V3/V3s (sun8iw8).
#
# Notes:
+# SPDX-License-Identifier: GPL-2.0-or-later
+
if { [info exists CHIPNAME] } {
set _CHIPNAME $_CHIPNAME
} else {
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Altera cyclone V SoC family, 5Cxxx
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Intel (Altera) Arria10 FPGA SoC
if { [info exists CHIPNAME] } {
+# SPDX-License-Identifier: GPL-2.0-or-later
+
source [find target/icepick.cfg]
if { [info exists CHIPNAME] } {
+# SPDX-License-Identifier: GPL-2.0-or-later
+
source [find target/icepick.cfg]
source [find mem_helper.tcl]
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Copyright (C) 2010-2011 by Karl Kurbjun
# Copyright (C) 2009-2011 by Øyvind Harboe
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Atheros AR71xx MIPS 24Kc SoC.
# tested on PB44 refererence board
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Configuration script for Arm CoreLink SSE-200 Subsystem based IoT SoCs.
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# armada370 -- support for the Marvell Armada/370 CPU family
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Atmel AT32AP7000
#
# This is the only core in the now-inactive high end AVR32 product line,
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# AT91R40008 target configuration file
# TRST is tied to SRST on the AT91X40 family.
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Atmel AT91rm9200
# http://atmel.com/products/at91/
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for ATMEL sam3, a Cortex-M3 chip
#
# at91sam3u4e
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# common stuff
source [find target/at91sam3ax_xx.cfg]
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# common stuff
source [find target/at91sam3ax_xx.cfg]
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for ATMEL sam3, a Cortex-M3 chip
#
# at91sam3A4C
+# SPDX-License-Identifier: GPL-2.0-or-later
#
# Configuration for Atmel's SAM3N series
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for ATMEL sam3, a Cortex-M3 chip
#
# at91sam3s4c
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# common stuff
source [find target/at91sam3uxx.cfg]
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# common stuff
source [find target/at91sam3uxx.cfg]
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# common stuff
source [find target/at91sam3uxx.cfg]
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# common stuff
source [find target/at91sam3uxx.cfg]
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# common stuff
source [find target/at91sam3uxx.cfg]
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# common stuff
source [find target/at91sam3uxx.cfg]
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for ATMEL sam3, a Cortex-M3 chip
#
# at91sam3u4e
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# script for ATMEL sam4, a Cortex-M4 chip
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for ATMEL sam4c32, a Cortex-M4 chip
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for ATMEL sam4c, a Cortex-M4 chip
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for ATMEL sam4l, a Cortex-M4 chip
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for ATMEL sam4, a Cortex-M4 chip
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for ATMEL sam4sd32, a Cortex-M4 chip
#
+# SPDX-License-Identifier: GPL-2.0-or-later
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# ATMEL sam7se512
# Example: the "Elektor Internet Radio" - EIR
# http://www.ethernut.de/en/hardware/eir/index.html
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#use combined on interfaces or targets that can't set TRST/SRST separately
reset_config srst_only srst_pulls_trst
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#use combined on interfaces or targets that can't set TRST/SRST separately
reset_config srst_only srst_pulls_trst
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#use combined on interfaces or targets that can't set TRST/SRST separately
reset_config srst_only srst_pulls_trst
+# SPDX-License-Identifier: GPL-2.0-or-later
+
######################################
# Target: Atmel AT91SAM9
######################################
+# SPDX-License-Identifier: GPL-2.0-or-later
+
######################################
# Target: Atmel AT91SAM9260
######################################
+# SPDX-License-Identifier: GPL-2.0-or-later
+
######################################
# Target: Atmel AT91SAM9260
######################################
+# SPDX-License-Identifier: GPL-2.0-or-later
+
######################################
# Target: Atmel AT91SAM9261
######################################
+# SPDX-License-Identifier: GPL-2.0-or-later
+
######################################
# Target: Atmel AT91SAM9263
######################################
+# SPDX-License-Identifier: GPL-2.0-or-later
+
######################################
# Target: Atmel AT91SAM9G10
######################################
+# SPDX-License-Identifier: GPL-2.0-or-later
+
######################################
# Target: Atmel AT91SAM9G20
######################################
+# SPDX-License-Identifier: GPL-2.0-or-later
+
######################################
# Target: Atmel AT91SAM9G45
######################################
+# SPDX-License-Identifier: GPL-2.0-or-later
+
######################################
# Target: Atmel AT91SAM9RL
######################################
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# script for Atmel SAMD, SAMR, SAML or SAMC, a Cortex-M0 chip
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for the ATMEL samg5x Cortex-M4F chip family
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
if { [info exists CHIPNAME] } {
set _CHIPNAME $_CHIPNAME
} else {
+# SPDX-License-Identifier: GPL-2.0-or-later
+
if { [info exists CHIPNAME] } {
set _CHIPNAME $_CHIPNAME
} else {
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# The Atheros AR9331 is a highly integrated and cost effective
# IEEE 802.11n 1x1 2.4 GHz System- on-a-Chip (SoC) for wireless
# local area network (WLAN) AP and router platforms.
+# SPDX-License-Identifier: GPL-2.0-or-later
+
if { [info exists CHIPNAME] } {
set _CHIPNAME $_CHIPNAME
} else {
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# for avr
set _CHIPNAME avr
+# SPDX-License-Identifier: GPL-2.0-or-later
+
set _CHIPNAME avr
set _ENDIAN little
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Microchip (former Atmel) SAM E54, E53, E51 and D51 devices
# with a Cortex-M4 core
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Microchip (formerly Atmel) SAM L1x target
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# ATMEL SAMV, SAMS, and SAME chips are Cortex-M7 parts
# The chips are very similar; the SAMV series just has
# more peripherals and seems like the "flagship" of the
+# SPDX-License-Identifier: GPL-2.0-or-later
+
set _CHIPNAME avr32
set _ENDIAN big
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# BCM281xx
if { [info exists CHIPNAME] } {
+# SPDX-License-Identifier: GPL-2.0-or-later
+
set _CHIPNAME bcm4706
set _CPUID 0x1008c17f
+# SPDX-License-Identifier: GPL-2.0-or-later
+
set _CHIPNAME bcm4718
set _LVTAPID 0x1471617f
set _CPUID 0x0008c17f
+# SPDX-License-Identifier: GPL-2.0-or-later
+
echo "Forcing reset_config to none to prevent OpenOCD from pulling SRST after the switch from LV is already performed"
reset_config none
+# SPDX-License-Identifier: GPL-2.0-or-later
+
set _CHIPNAME bcm5352e
set _CPUID 0x0535217f
+# SPDX-License-Identifier: GPL-2.0-or-later
+
set _CHIPNAME bcm6348
set _CPUID 0x0634817f
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# BlueField SoC Target
set _CHIPNAME bluefield
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# bluenrg-1/2 and bluenrg-lp devices support only SWD transports.
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# c100 config.
# This is ARM1136 dual core
# this script only configures one core (that is used to run Linux)
+# SPDX-License-Identifier: GPL-2.0-or-later
# board(-config) specific parameters file.
+# SPDX-License-Identifier: GPL-2.0-or-later
proc helpC100 {} {
echo "List of useful functions for C100 processor:"
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Note that I basically converted
# u-boot/include/asm-arm/arch/comcerto_100.h
# defines
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Config for Texas Instruments low power RF SoC CC2538
# http://www.ti.com/lit/pdf/swru319
+# SPDX-License-Identifier: GPL-2.0-or-later
+
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Utility code for DaVinci-family chips
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
######################################
# Target: Marvell Dragonite CPU core
######################################
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Script for freescale DSP56321
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Script for freescale DSP568013
if { [info exists CHIPNAME] } {
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Script for freescale DSP568037
if { [info exists CHIPNAME] } {
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Silicon Labs (formerly Energy Micro) EFM32 target
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Target configuration for the Silicon Labs EM357 chips
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Target configuration for the Silicon Labs EM358 chips
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Cirrus Logic EP9301 processor on an Olimex CS-E9301 board.
if { [info exists CHIPNAME] } {
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# EnSilica eSi-32xx SoC (eSi-RISC Family)
# http://www.ensilica.com/risc-ip/
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Samsung Exynos 5250 - dual-core ARM Cortex-A15
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#Script for faux target - used for testing
if { [info exists CHIPNAME] } {
+# SPDX-License-Identifier: GPL-2.0-or-later
+
######################################
# Target: Marvell Feroceon CPU core
######################################
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# MB9BF506
# Fujitsu Cortex-M3 with 512kB Flash and 64kB RAM
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Spansion FM4 (ARM Cortex-M4)
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Spansion FM4 MB9BFxxx (ARM Cortex-M4)
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Spansion FM4 S6E2CC (ARM Cortex-M4)
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# GigaDevice GD32VF103 target
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Support for General Plus GP326XXXA chips
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Hisilicon Hi3798 Target
if { [info exists CHIPNAME] } {
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Hisilicon Hi6220 Target
if { [info exists CHIPNAME] } {
+# SPDX-License-Identifier: GPL-2.0-or-later
+
################################################################################
# Author: Michael Trensch (MTrensch@googlemail.com)
################################################################################
+# SPDX-License-Identifier: GPL-2.0-or-later
+
################################################################################
# Author: Michael Trensch (MTrensch@googlemail.com)
################################################################################
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#Hilscher netX 500 CPU
if { [info exists CHIPNAME] } {
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Copyright (C) 2011 by Karl Kurbjun
# Copyright (C) 2009 by David Brownell
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# utility fn's for Freescale i.MX series
global TARGETNAME
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#use combined on interfaces or targets that can't set TRST/SRST separately
#
# Hmmm.... should srst_pulls_trst be used here like i.MX27???
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# imx25 config
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# page 3-34 of "MCIMC27 Multimedia Applications Processor Reference Manual, Rev 0.3"
# SRST pulls TRST
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# i.MX28 config file.
# based off of the imx21.cfg file.
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# imx31 config
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# imx35 config
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Freescale i.MX51
if { [info exists CHIPNAME] } {
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Freescale i.MX53
if { [info exists CHIPNAME] } {
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Freescale i.MX6 series
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Freescale i.MX6SoloX
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Freescale i.MX6UltraLite series: 6UL 6ULL 6ULZ
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# NXP i.MX7ULP: Cortex-A7 + Cortex-M4
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# configuration file for NXP i.MX8M family of SoCs
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# NXP i.MX8QuadMax
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Infineon TLE987x family (Arm Cortex-M3 @ up to 40 MHz)
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for Insilica IS-5114
# AKA: Atmel AT76C114 - an ARM946 chip
# ATMEL sold his product line to Insilica...
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#xscale ixp42x CPU
if { [info exists CHIPNAME] } {
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# K1921VK01T
# http://niiet.ru/chips/nis?id=354
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Freescale Kinetis K40 devices
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Freescale Kinetis K60 devices
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Freescale Kinetis KE0x and KEAx series devices
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# NXP (Freescale) Kinetis KE1xF devices
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# NXP (Freescale) Kinetis KE1xZ devices
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Freescale Kinetis KL25 devices
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Freescale Kinetis KL46 devices
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# NXP (former Freescale) Kinetis KL series devices
# Also used for Cortex-M0+ equipped members of KVx and KE1xZ series
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# ARM920T CPU
if { [info exists CHIPNAME] } {
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# NXP (former Freescale) Kinetis Kx series devices
# Also used for Cortex-M4 equipped members of KVx and KE1xF series
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# NXP LPC11xx Cortex-M0 with at least 1kB SRAM
set CHIPNAME lpc11xx
set CHIPSERIES lpc1100
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# NXP LPC12xx Cortex-M0 with at least 4kB SRAM
set CHIPNAME lpc12xx
set CHIPSERIES lpc1200
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# NXP LPC13xx Cortex-M3 with at least 4kB SRAM
set CHIPNAME lpc13xx
set CHIPSERIES lpc1300
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# NXP LPC17xx Cortex-M3 with at least 8kB SRAM
set CHIPNAME lpc17xx
set CHIPSERIES lpc1700
+# SPDX-License-Identifier: GPL-2.0-or-later
+
source [find target/swj-dp.tcl]
adapter speed 500
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Main file for NXP LPC1xxx/LPC40xx series Cortex-M0/0+/3/4F parts
#
# !!!!!!
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# NXP LPC2103 ARM7TDMI-S with 32kB flash and 8kB SRAM, clocked with 12MHz crystal
source [find target/lpc2xxx.cfg]
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# NXP LPC2124 ARM7TDMI-S with 256kB flash and 16kB SRAM, clocked with 12MHz crystal
source [find target/lpc2xxx.cfg]
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# NXP LPC2129 ARM7TDMI-S with 256kB flash and 16kB SRAM, clocked with 12MHz crystal
source [find target/lpc2xxx.cfg]
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# NXP LPC2148 ARM7TDMI-S with 512kB flash (12kB used by bootloader) and 40kB SRAM (8kB for USB DMA), clocked with 12MHz crystal
source [find target/lpc2xxx.cfg]
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# NXP LPC2294 ARM7TDMI-S with 256kB flash and 16kB SRAM, clocked with 12MHz crystal
source [find target/lpc2xxx.cfg]
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# NXP LPC2378 ARM7TDMI-S with 512kB flash (8kB used by bootloader) and 56kB SRAM (16kB for ETH, 8kB for DMA), clocked with 4MHz internal oscillator
source [find target/lpc2xxx.cfg]
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# NXP LPC2460 ARM7TDMI-S with 98kB SRAM (16kB for ETH, 16kB for DMA, 2kB for RTC), clocked with 4MHz internal oscillator
source [find target/lpc2xxx.cfg]
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# NXP LPC2478 ARM7TDMI-S with 512kB flash (8kB used by bootloader) and 98kB SRAM (16kB for ETH, 16kB for DMA, 2kB for RTC), clocked with 4MHz internal oscillator
source [find target/lpc2xxx.cfg]
+# SPDX-License-Identifier: GPL-2.0-or-later
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Common setup for the LPC2xxx parts
# parameters:
+# SPDX-License-Identifier: GPL-2.0-or-later
+
######################################
# Target: NXP lpc3131
######################################
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# lpc3250 config
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# NXP LPC40xx Cortex-M4F with at least 16kB SRAM
set CHIPNAME lpc40xx
set CHIPSERIES lpc4000
+# SPDX-License-Identifier: GPL-2.0-or-later
+
source [find target/swj-dp.tcl]
adapter speed 500
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# NXP LPC4357
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# NXP LPC4370 - 1x ARM Cortex-M4 + 2x ARM Cortex-M0 @ up to 204 MHz each
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# NXP LPC84x Cortex-M0+ with at least 8kB SRAM
if { ![info exists CHIPNAME] } {
set CHIPNAME lpc84x
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# NXP LPC8Nxx NHS31xx Cortex-M0+ with 8kB SRAM
# Copyright (C) 2018 by Jean-Christian de Rivaz
# Based on NXP proposal https://community.nxp.com/message/1011149
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# NXP LPC8xx Cortex-M0+ with at least 1kB SRAM
if { ![info exists CHIPNAME] } {
set CHIPNAME lpc8xx
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# NXP LS1012A
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Marvell Armada 3710
set CORES 1
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Marvell Armada 3720
set CORES 2
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Main file for Marvell Armada 3700 series targets
#
# !!!!!!
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Maxim Integrated MAX32620 OpenOCD target configuration file
# www.maximintegrated.com
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Maxim Integrated MAX32625 OpenOCD target configuration file
# www.maximintegrated.com
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Maxim Integrated MAX3263X OpenOCD target configuration file
# www.maximintegrated.com
+# SPDX-License-Identifier: GPL-2.0-or-later
+
source [find bitsbytes.tcl]
source [find cpu/arm/arm7tdmi.tcl]
source [find memory.tcl]
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# MDR32F9Q2I (1986ВЕ92У)
# http://milandr.ru/index.php?mact=Products,cntnt01,details,0&cntnt01productid=57&cntnt01returnid=68
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Andes Core
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Andes Core
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Andes Core
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# NXP NHS31xx Cortex-M0+ with 8kB SRAM
set CHIPNAME nhs31xx
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# script for Nordic nRF51 series, a Cortex-M0 chip
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Nordic nRF52 series: ARM Cortex-M4 @ 64 MHz
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Nuvoton nuc910 (previously W90P910) based soc
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for Nuvoton MuMicro Cortex-M0 Series
# Adapt based on what transport is active.
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Texas Instruments OMAP 2420
# http://www.ti.com/omap
# as seen in Nokia N8x0 tablets
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# TI OMAP3530
# http://focus.ti.com/docs/prod/folders/print/omap3530.html
# Other OMAP3 chips remove DSP and/or the OpenGL support
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# OMAP4430
if { [info exists CHIPNAME] } {
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# OMAP4460
if { [info exists CHIPNAME] } {
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# TI OMAP5912 dual core processor
# http://focus.ti.com/docs/prod/folders/print/omap5912.html
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Texas Instruments DaVinci family: OMAPL138
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
set _ENDIAN big
if { [info exists CHIPNAME] } {
+# SPDX-License-Identifier: GPL-2.0-or-later
+
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for Cypress PSoC 4 devices
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Cypress PSoC 5LP
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Configuration script for Cypress PSoC6 family of microcontrollers (CY8C6xxx)
# PSoC6 is a dual-core device with CM0+ and CM4 cores. Both cores share
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# PXA255 chip ... originally from Intel, PXA line was sold to Marvell.
# This chip is now at end-of-life. Final orders have been taken.
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#Marvell/Intel PXA270 Script
if { [info exists CHIPNAME] } {
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Marvell PXA3xx
if { [info exists CHIPNAME] } {
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# The QCA4531 is a two stream (2x2) 802.11b/g/n single-band programmable
# Wi-Fi System-on-Chip (SoC) for the Internet of Things (IoT).
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
+# SPDX-License-Identifier: GPL-2.0-or-later
+
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
+# SPDX-License-Identifier: GPL-2.0-or-later
+
Prerequisites:
The users of OpenOCD as well as computer programs interacting with OpenOCD are expecting that certain commands
do the same thing across all the targets.
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Renesas RZ/A1H
# https://www.renesas.com/eu/en/products/microcontrollers-microprocessors/rz/rza/rza1h.html
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Renesas R-Car Generation 2 SOCs
# - There are a combination of Cortex-A15s and Cortex-A7s for each Gen2 SOC
# - Each SOC can boot through any of the, up to 2, core types that it has
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Renesas R-Car Generation 3 SOCs
# - There are a combination of Cortex-A57s, Cortex-A53s, and Cortex-R7 for each Gen3 SOC
# - Each SOC can boot through any of the, up to 3, core types that it has
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Renesas R-Car Gen2 Evaluation Board common settings
reset_config trst_and_srst srst_nogate
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Renesas Synergy S7 G2 w/ ARM Cortex-M4 @ 240 MHz
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Rockchip RK3308 Target
# https://rockchip.fr/RK3308%20datasheet%20V1.5.pdf
# https://dl.radxa.com/rockpis/docs/hw/datasheets/Rockchip%20RK3308TRM%20V1.1%20Part1-20180810.pdf
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Found on the 'TinCanTools' Hammer board.
if { [info exists CHIPNAME] } {
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Target configuration for the Samsung 2440 system on chip
# Tested on a S3C2440 Evaluation board by keesj
# Processor : ARM920Tid(wb) rev 0 (v4l)
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Target configuration for the Samsung 2450 system on chip
# Processor : ARM926ejs (wb) rev 0 (v4l)
# Info: JTAG tap: s3c2450.cpu tap/device found: 0x07926F0F
+# SPDX-License-Identifier: GPL-2.0-or-later
+
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# -*- tcl -*-
# Target configuration for the Samsung s3c6410 system on chip
# Tested on a SMDK6410
+# SPDX-License-Identifier: GPL-2.0-or-later
+
reset_config srst_only srst_pulls_trst
if { [info exists CHIPNAME] } {
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Silicon Laboratories SiM3x Cortex-M3
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for Sigma Designs SMP8634 (eventually even SMP8635)
if { [info exists CHIPNAME] } {
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Target configuration for the ST SPEAr3xx family of system on chip
# Supported SPEAr300, SPEAr310, SPEAr320
# http://www.st.com/spear
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# TI/Luminary Stellaris LM3S chip family
# Some devices have errata in returning their device class.
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for stm32f0x family
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for stm32f1x family
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for stm32f2x family
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for stm32f3x family
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for stm32f4x family
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for stm32f7x family
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for stm32g0x family
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for stm32g4x family
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for stm32h7x family
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for stm32h7x family (dual flash bank)
# STM32H7xxxI 2Mo have a dual bank flash.
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# M0+ devices only have SW-DP, but swj-dp code works, just don't
# set any jtag related features
+# SPDX-License-Identifier: GPL-2.0-or-later
+
source [find target/stm32l0.cfg]
# Add the second flash bank.
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# stm32l1 devices support both JTAG and SWD transports.
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
source [find target/stm32l1.cfg]
# The stm32l1x 384kb have a dual bank flash.
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for stm32l4x family
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# STMicroelectronics STM32MP13x (Single Cortex-A7)
# http://www.st.com/stm32mp1
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# STMicroelectronics STM32MP15x (Single/Dual Cortex-A7 plus Cortex-M4)
# http://www.st.com/stm32mp1
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Target configuration for the ST STM32W108xx chips
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for stm32wbx family
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for stm32wlx family
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for stm32xl family (dual flash bank)
source [find target/stm32f1x.cfg]
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for stm8l family
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#config script for STM8L152
set EEPROMSTART 0x1000
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for stm8s family
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#config script for STM8S003
set FLASHEND 0x9FFF
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#config script for STM8S103
set FLASHEND 0x9FFF
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#config script for STM8S105
proc stm8_reset_rop {} {
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#start slow, speed up after reset
adapter speed 10
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#STR730 CPU
adapter speed 3000
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#STR750 CPU
if { [info exists CHIPNAME] } {
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# script for str9
if { [info exists CHIPNAME] } {
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# ARM Debug Interface V5 (ADI_V5) utility
# ... Mostly for SWJ-DP (not SW-DP or JTAG-DP, since
# SW-DP and JTAG-DP targets don't need to switch based
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Synwit SWM050
source [find target/swj-dp.tcl]
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Test script to check that syntax error in reset
# script is reported properly.
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# This script tests a syntax error in the startup
# config script
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Texas Instruments AR7 SOC - used in many adsl modems.
# http://www.linux-mips.org/wiki/AR7
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# A start sequence to change from cJTAG to 4-pin JTAG
# This is needed for CC2538 and CC26xx to be able to communicate through JTAG
# Read section 6.3 in http://www.ti.com/lit/pdf/swru319 for more information.
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# TI Calypso (lite) G2 C035 Digital Base Band chip
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Texas Instruments CC13x0 - ARM Cortex-M3
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Texas Instruments CC13x2 - ARM Cortex-M4
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Texas Instruments CC26x0 - ARM Cortex-M3
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Texas Instruments CC26x2 - ARM Cortex-M4
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Texas Instruments CC3220SF - ARM Cortex-M4
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Texas Instruments CC32xx - ARM Cortex-M4
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Texas Instruments DaVinci family: TMS320DM355
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Texas Instruments DaVinci family: TMS320DM365
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Texas Instruments DaVinci family: TMS320DM6446
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Texas Instruments MSP432 - ARM Cortex-M4F @ up to 48 MHz
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
source [find target/ti_tms570.cfg]
+# SPDX-License-Identifier: GPL-2.0-or-later
+
adapter speed 1500
if { [info exists CHIPNAME] } {
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# TMS570LS20216, TMS570LS20206, TMS570LS10216
# TMS570LS10206, TMS570LS10116, TMS570LS10106
set DAP_TAPID 0x0B7B302F
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# TMS570LS3137
set DAP_TAPID 0x0B8A002F
set JRC_TAPID 0x0B8A002F
+# SPDX-License-Identifier: GPL-2.0-or-later
+
######################################
# Target: Toshiba TMPA900
######################################
+# SPDX-License-Identifier: GPL-2.0-or-later
+
######################################
# Target: Toshiba TMPA910
######################################
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Texas Instruments (TI) TNETC4401, MIPS32 DOCSIS-tailored SoC (4Kc-based)
# Used in Knovative KC-100 and Motorola Surfboard SB5120 cable modems.
# Datasheet: https://brezn.muc.ccc.de/~mazzoo/DOCSIS/tnetc4401.pdf
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Copyright (C) ST-Ericsson SA 2011
# Author : michel.jaouen@stericsson.com
# U8500 target
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Freescale Vybrid VF610
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# target configuration for
# Xilinx ZynqMP (UltraScale+ / A53)
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Infineon XMC1100/XMC1200/XMC1300 family (ARM Cortex-M0 @ 32 MHz)
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Infineon XMC4100/XMC4200/XMC4400/XMC4500 family (ARM Cortex-M4 @ 80-120 MHz)
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# XMOS xCORE-XA XS1-XAU8A-10: ARM Cortex-M3 @ 48 MHz
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Xilinx Zynq-7000 All Programmable SoC
#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# СБИС К1879ХБ1Я
# http://www.module.ru/catalog/micro/mikroshema_dekodera_cifrovogo_televizionnogo_signala_sbis_k1879hb1ya/
Code Review / openocd.git / commitdiff