From: Matthias Welwarsky Date: Thu, 6 Apr 2017 06:47:03 +0000 (+0200) Subject: cortex_a: faster debug init X-Git-Tag: v0.11.0-rc1~1235 X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=commitdiff_plain;h=78a4b6607ef29b901bffaf506da024bf4d0823a6 cortex_a: faster debug init Don't use atomic dap operations when not necessary Change-Id: Idc6dcd2bda95f7994852df4ae2a588976f4c9010 Signed-off-by: Matthias Welwarsky Reviewed-on: http://openocd.zylin.com/4142 Tested-by: jenkins Reviewed-by: Matthias Welwarsky --- diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c index 5d90e3416c..672a300ec4 100644 --- a/src/target/cortex_a.c +++ b/src/target/cortex_a.c @@ -206,23 +206,27 @@ static int cortex_a_init_debug_access(struct target *target) /* lock memory-mapped access to debug registers to prevent * software interference */ - retval = mem_ap_write_atomic_u32(armv7a->debug_ap, + retval = mem_ap_write_u32(armv7a->debug_ap, armv7a->debug_base + CPUDBG_LOCKACCESS, 0); if (retval != ERROR_OK) return retval; /* Disable cacheline fills and force cache write-through in debug state */ - retval = mem_ap_write_atomic_u32(armv7a->debug_ap, + retval = mem_ap_write_u32(armv7a->debug_ap, armv7a->debug_base + CPUDBG_DSCCR, 0); if (retval != ERROR_OK) return retval; /* Disable TLB lookup and refill/eviction in debug state */ - retval = mem_ap_write_atomic_u32(armv7a->debug_ap, + retval = mem_ap_write_u32(armv7a->debug_ap, armv7a->debug_base + CPUDBG_DSMCR, 0); if (retval != ERROR_OK) return retval; + retval = dap_run(armv7a->debug_ap->dap); + if (retval != ERROR_OK) + return retval; + /* Enabling of instruction execution in debug mode is done in debug_entry code */ /* Resync breakpoint registers */