From: Tomas Vanek Date: Thu, 15 Jun 2017 09:03:32 +0000 (+0200) Subject: arm_adi_v5: reduce some CSW writes X-Git-Tag: v0.11.0-rc1~1299 X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=commitdiff_plain;h=81a33244df232a27a0f42f39aa34141009da3c3d;ds=sidebyside arm_adi_v5: reduce some CSW writes MEM-AP access through banked data registers MEM_AP_REG_BD0..3 does not increment TAR regardless of the current autoincrement mode. mem_ap_read_u32() and mem_ap_write_u32() can keep the current autoincrement mode instead of switching autoincrement off. Change-Id: Ib7ec688d3e04f1da678363cd2819ce90e8910e58 Signed-off-by: Tomas Vanek Reviewed-on: http://openocd.zylin.com/4163 Tested-by: jenkins Reviewed-by: Andreas Bolsch Reviewed-by: Christopher Head Reviewed-by: Andreas Fritiofson --- diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c index a0d0f4ef04..ae6c2c629f 100644 --- a/src/target/arm_adi_v5.c +++ b/src/target/arm_adi_v5.c @@ -221,7 +221,8 @@ int mem_ap_read_u32(struct adiv5_ap *ap, uint32_t address, /* Use banked addressing (REG_BDx) to avoid some link traffic * (updating TAR) when reading several consecutive addresses. */ - retval = mem_ap_setup_transfer(ap, CSW_32BIT | CSW_ADDRINC_OFF, + retval = mem_ap_setup_transfer(ap, + CSW_32BIT | (ap->csw_value & CSW_ADDRINC_MASK), address & 0xFFFFFFF0); if (retval != ERROR_OK) return retval; @@ -272,7 +273,8 @@ int mem_ap_write_u32(struct adiv5_ap *ap, uint32_t address, /* Use banked addressing (REG_BDx) to avoid some link traffic * (updating TAR) when writing several consecutive addresses. */ - retval = mem_ap_setup_transfer(ap, CSW_32BIT | CSW_ADDRINC_OFF, + retval = mem_ap_setup_transfer(ap, + CSW_32BIT | (ap->csw_value & CSW_ADDRINC_MASK), address & 0xFFFFFFF0); if (retval != ERROR_OK) return retval;