openocd.git
9 months agostlink: skip rw-misc commands with TCP server 08/6608/3
Antonio Borneo [Sat, 14 Aug 2021 12:48:50 +0000 (14:48 +0200)]
stlink: skip rw-misc commands with TCP server

The main purpose of TCP server is to allow multiple clients to
connect and share the same physical stlink.
The commands RW MISC don't lock the communication between command
and answer, thus cannot prevent another client to break this
sequence. The commands are not supposed to be used in shared mode.

Prevent the use of RW MISC commands on a (possibly) shared TCP
backend.
This degrades the overall performance, but the shared mode already
adds its own overhead, so this is not really an issue.

Change-Id: I713d912a269664859c8142932a9905d24b6d3caa
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6608
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
9 months agostlink: add support for rw-misc commands 07/6607/3
Antonio Borneo [Thu, 29 Jul 2021 15:54:31 +0000 (17:54 +0200)]
stlink: add support for rw-misc commands

Firmware versions V2J32 and V3J2 introduce the commands RW-MISC
to put in a single USB packet a sequence of mem_ap read/write.
These commands provide a significant speed improvement while
accessing the debug unit at scattered addresses.

Add the low level commands and extend high level implementation.

Skip for the moment the command to read the max number of items
allowed by the firmware and use some hardcoded values.

Change-Id: I8adc630cc0de733511e9d94533cbfe9f3b301a83
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6607
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
9 months agostlink: dequeue CSW write only if it doesn't change csw_default 06/6606/2
Antonio Borneo [Thu, 29 Jul 2021 16:38:20 +0000 (18:38 +0200)]
stlink: dequeue CSW write only if it doesn't change csw_default

The stlink commands for buffer read/write carry the associated CSW
value that has to be used. We can dequeue any CSW write request
and add the CSW in the following buffer read/write.

In preparation to next patch that uses stlink commands misc-rw
(commands that don't handle CSW value), let's dequeue only those
CSW write that don't change csw_default.

Keep a local cache of last csw_default.
Tag the queued CSW writes that change csw_default.
Dequeue only the un-tagged CSW writes.

On buffer read/write commands, limiting the dequeued CSW write
surely adds a performance penalty. But csw_default is not changed
often so the penalty is not significant.

Change-Id: I538d257fe3c434fc97587846d759951384327f02
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6606
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
9 months agostlink: add support for native no_addr_incr commands 05/6605/2
Antonio Borneo [Sun, 25 Jul 2021 21:46:55 +0000 (23:46 +0200)]
stlink: add support for native no_addr_incr commands

Firmware versions V2J26 and V3J1 introduce the command
STLINK_DEBUG_WRITEMEM_32BIT_NO_ADDR_INC
Firmware versions V2J32 and V3J2 introduce the command
STLINK_DEBUG_READMEM_32BIT_NO_ADDR_INC

These new commands can provide speed improvement to Cortex-A
memory download (its debug port use a FIFO for data transfer).

Add the low level commands and extend high level implementation.

Change-Id: I3b65acbeaec3bd305f5568b9ee4bc9495b113448
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6605
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
9 months agostlink: collapse consecutive mem AP r/w in a single command 04/6604/2
Antonio Borneo [Sun, 25 Jul 2021 15:31:53 +0000 (17:31 +0200)]
stlink: collapse consecutive mem AP r/w in a single command

Detect a sequence of memory AP operations that can be issued as a
single stlink command.
This improves the data throughput during memory transfer.

Change-Id: Ifa4488513346fc7cd0c9317b7d24ef510ccfd959
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6604
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
9 months agostlink: detect mem_ap R/W and dequeue set TAR and CSW 03/6603/2
Antonio Borneo [Thu, 22 Jul 2021 21:50:33 +0000 (23:50 +0200)]
stlink: detect mem_ap R/W and dequeue set TAR and CSW

By using the stlink commands for memory read write we can gain
some performance, but only when TAR and/or CSW are changed.
During long transfers with constant CSW and TAR auto-incremented
there is no gain, since the same amount of USB/TCP packet is used.
Plus, by dropping ADIv5 packed transfers the performance is lower
on 8 and 16 bits transfers.
This changes opens the opportunity for collapsing memory burst
accesses in a single stlink USB/TCP packet.

Initialize the values of enum queue_cmd to easily extract the word
size through a macro, even if this is not used here.

Change-Id: I6661a00d468a1591a253cba9feb3bdb3f7474f5a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6603
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
9 months agostlink: expose ap number and csw in memory r/w 02/6602/2
Antonio Borneo [Wed, 5 Feb 2020 15:20:37 +0000 (16:20 +0100)]
stlink: expose ap number and csw in memory r/w

Recent versions of stlink firmware allow accessing access port
other than zero and setting the CSW.

Modify the internal API to provide ap_num and csw.
There is no interest to modify HLA to use ap_num and csw, so set
and use some backward compatible defaults.

Change-Id: I3f6dfc6c670d19467d9f5e717c6c956db6faf7f3
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6602
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
9 months agostlink: add queue in dap-direct mode 01/6601/2
Antonio Borneo [Thu, 22 Jul 2021 13:08:36 +0000 (15:08 +0200)]
stlink: add queue in dap-direct mode

Implement a minimalist queue for DP/AP commands and reorganize the
code to use it.
There is no performance improvement; the queue elements are still
sent one-by-one on USB or on TCP during dap_run().

Change-Id: I8353563e59f883624bcc0fbe8b54955e4f27ccfa
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6601
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
9 months agostlink: check buffer size on 16 and 32 bit memory transfer 00/6600/2
Antonio Borneo [Sun, 25 Jul 2021 15:51:49 +0000 (17:51 +0200)]
stlink: check buffer size on 16 and 32 bit memory transfer

Both HLA and ADIv5 layers limit the memory transfer within blocks
whose boundaries are aligned at 1024 or 4096 bytes.
New stlink firmware handle the ADIv5 TAR autoincrement, making
possible to send memory transfers across the boundary of 1024 or
4096 byte. OpenOCD doesn't use this feature yet.

Use the correct buffer size in the code, even if it is not used.
While there, split SWIM buffer size from JTAG/SWD case; stlink has
a dedicated command to retrieve SWIM buffer size, but currently
not implemented in OpenOCD.

Change-Id: Id46c0356ef21cead08726c044a1cd9725fd4f923
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6600
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
9 months agoflash/nor/stm32lx: fixed writes at high adapter speeds 98/5598/3
Jimmy [Thu, 23 Apr 2020 10:58:58 +0000 (18:58 +0800)]
flash/nor/stm32lx: fixed writes at high adapter speeds

The busy flag must be polled after each half-page write.
At low clock speeds, no issue is observed when the poll
is omitted, because the writes complete before the next
write begins. But at high clock speeds the subsequent
writes would overlap and cause the operation to fail.

The status polls are done on the target for efficiency,
since the half-pages are very small.

Change-Id: Ia1e9b4a6a71930549b3d84a902744ce6e596301b
Signed-off-by: Jimmy <nhminus@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/5598
Tested-by: jenkins
Reviewed-by: Jelle De Vleeschouwer
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Andrzej Sierżęga <asier70@gmail.com>
9 months agojtag/core: remove unused variable 38/6638/2
Antonio Borneo [Thu, 7 Oct 2021 10:04:46 +0000 (12:04 +0200)]
jtag/core: remove unused variable

Commit e3f3f60a02ab ("adapter speed: require init script setting
and centralize activation from drivers to core.c") has already
dropped the only use of variable 'jtag_speed'.

Remove the variable.

Change-Id: Iff096df0022982cf90795aa62d6b3406203f7b14
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6638
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
9 months agojtag/aice: remove unused exported struct aice_interface_param_s 37/6637/2
Antonio Borneo [Fri, 8 Oct 2021 16:15:12 +0000 (18:15 +0200)]
jtag/aice: remove unused exported struct aice_interface_param_s

The struct aice_interface_param_s is declared but is never
referenced.
Drop it.

Change-Id: I4e6493d4baf292bb55dbd40228d4fa7c9e2afab5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6637
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
9 months agohla: improve readability of struct hl_interface_s initialization 36/6636/2
Antonio Borneo [Mon, 16 Sep 2019 08:50:04 +0000 (10:50 +0200)]
hla: improve readability of struct hl_interface_s initialization

The initialization is barely readable, while actually only few
fields are set with value nor zero nor NULL.

Rewrite the initialization using C99 struct designations.

Change-Id: I4d288e6536ebe7110a184db6540223fc67361ec3
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6636
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
9 months agoriscv: use relative path to include contrib's data 35/6635/2
Antonio Borneo [Fri, 8 Oct 2021 16:43:06 +0000 (18:43 +0200)]
riscv: use relative path to include contrib's data

Doxygen cannot resolve the path of the files in folder contrib.
Use a path relative to current folder, as done in other files.

Change-Id: If39b416ed422b4854dd108777fa32dd4c809450a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6635
Tested-by: jenkins
Reviewed-by: Tim Newsome <tim@sifive.com>
9 months agoopenocd: remove 'src' prefix from #include path 34/6634/2
Antonio Borneo [Wed, 6 Oct 2021 21:27:16 +0000 (23:27 +0200)]
openocd: remove 'src' prefix from #include path

There is no reason to add the 'src' prefix.
Remove it.

Change-Id: Id7d7ee8b3807fb90381cc1d6d545321020bc06c1
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6634
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
9 months agoUpstream a whole host of RISC-V changes. 29/6529/4
Tim Newsome [Wed, 1 Sep 2021 22:00:46 +0000 (15:00 -0700)]
Upstream a whole host of RISC-V changes.

Made no attempt to separate this out into reviewable chunks, since this
is all RISC-V-specific code developed at
https://github.com/riscv/riscv-openocd

Memory sample and repeat read functionality was left out of this change
since it requires some target-independent changes that I'll upstream
some other time.

Change-Id: I92917c86d549c232cbf36ffbfefc93331c05accd
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6529
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
9 months agotcl/stm32mp15x: freeze watchdog, recover SWD after power cycle 99/6599/2
Antonio Borneo [Wed, 7 Apr 2021 17:21:27 +0000 (19:21 +0200)]
tcl/stm32mp15x: freeze watchdog, recover SWD after power cycle

Freeze the IWDG watchdog when cores are halted to prevent a reset
while debugging.

The PMIC present on some board senses the nsrst and forces a power
cycle to the target. The power cycle causes the SWJ-DP to restart
in JTAG mode. If the debugger is using SWD, the mismatch triggers
an error after the reset command.
Ignore the error detected by 'dap init' and proceed executing the
handler. The error in 'dap init' will force a reconnect during the
following 'dap apid', restoring the SWD functionality.

Change-Id: I04fcda6a5b8a1b080ab4e8890ecd0754d5ed12d9
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6599
Tested-by: jenkins
9 months agoflash/nor/psoc6: fix doxygen comment 20/6620/2
Antonio Borneo [Sat, 2 Oct 2021 12:22:06 +0000 (14:22 +0200)]
flash/nor/psoc6: fix doxygen comment

Commit 64c2e03b23d9 ("flash/nor: improved API of flash_driver.info
& fixed buffer overruns") changes the prototype of the function
psoc6_get_info() but didn't update the list of parameters in the
doxygen comment.

Fix the doxygen comment.

Change-Id: I1dce018b60d080973c5e351490d4d7baba422d74
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: 64c2e03b23d9 ("flash/nor: improved API of flash_driver.info & fixed buffer overruns")
Reviewed-on: https://review.openocd.org/c/openocd/+/6620
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
9 months agocommand: document enum command_mode 93/6593/3
Antonio Borneo [Wed, 22 Sep 2021 21:14:22 +0000 (23:14 +0200)]
command: document enum command_mode

Add the description to doxygen documentation.

Change-Id: Iec04b4a37088e1b3b52ca84102820f450528b5b9
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6593
Tested-by: jenkins
9 months agomips64_pracc: fix three dead assignments 92/6592/2
Antonio Borneo [Wed, 22 Sep 2021 17:21:39 +0000 (19:21 +0200)]
mips64_pracc: fix three dead assignments

Clang scan-build complains for three dead assignments:
Although the value stored to 'data' is used in the
enclosing expression, the value is never actually read
from 'data'

Value stored to 'address' is never read

Remove the useless assignment and the variable 'data'.

Change-Id: Ie8dcb74b1c1aa5eea1acd06b3c45c5b44954c9e7
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6592
Tested-by: jenkins
9 months agotarget/lakemont: fix dead assignment 91/6591/2
Antonio Borneo [Wed, 22 Sep 2021 17:14:29 +0000 (19:14 +0200)]
target/lakemont: fix dead assignment

Clang scan-build complains for a dead assignment:
Value stored to 'tapstatus' is never read

Remove the assignment and add a comment to point for a potential
removal of the line.

Change-Id: Iad2fdc7e6faf650e24cc086ee74c745acb0d1c73
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6591
Tested-by: jenkins
9 months agoarmv8: fix five dead assignments 90/6590/2
Antonio Borneo [Wed, 22 Sep 2021 17:09:29 +0000 (19:09 +0200)]
armv8: fix five dead assignments

Clang scan-build complains for five dead assignments:
Value stored to 'retval' is never read

Check the returned value and propagate the error.

Change-Id: I01172887a056d6f39ddcf2807848423970db1e89
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6590
Tested-by: jenkins
9 months agoarm_semihosting: fix two dead assignments 89/6589/2
Antonio Borneo [Wed, 22 Sep 2021 16:59:38 +0000 (18:59 +0200)]
arm_semihosting: fix two dead assignments

Clang scan-build complains for two dead assignments:
Value stored to 'r' is never read

Use the variable in the following line, instead of re-computing
the pointer.

Change-Id: I5d4069872be9da85fb28bbe0a82020b90f1efe46
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6589
Tested-by: jenkins
9 months agoarm_tpiu_swo: fix two dead assignments 88/6588/2
Antonio Borneo [Wed, 22 Sep 2021 16:51:26 +0000 (18:51 +0200)]
arm_tpiu_swo: fix two dead assignments

Clang scan-build complains for two dead assignments:
Value stored to 'retval' is never read

Since the timer callback should not return error, print an error
message if the data cannot be send out. Add a FIXME comment
because in current code there is no string/name to report which
connection has failed.

In command tpiu enable check the returned value and propagate the
error.

Change-Id: I9a89e4c4f7b677e8222b2df09a31b2478ac9ca4f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6588
Tested-by: jenkins
9 months agojtag/core: fix unused assignment 87/6587/2
Antonio Borneo [Wed, 22 Sep 2021 16:39:57 +0000 (18:39 +0200)]
jtag/core: fix unused assignment

Clang scan-build complains about a variable assigned but never
used.
Although the value stored to 'val' is used in the
enclosing expression, the value is never actually read
from 'val'

Remove the dead assignment. While there, reduce the scope of the
variable by declaring the variable at the point of first use.

Change-Id: Ibe2b55a7d70597833cfa7f3d843e7c3d2407f2df
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6587
Tested-by: jenkins
10 months agogitignore: Add GNU Global tag files 41/6541/3
Yasushi SHOJI [Sun, 5 Sep 2021 12:59:57 +0000 (21:59 +0900)]
gitignore: Add GNU Global tag files

This commit adds GNU Global[1] tag files to .gitignore.

[1]: https://www.gnu.org/software/global/

Change-Id: Ia09fb359cfdfeadd9538cf6352d353e6475e85c7
Signed-off-by: Yasushi SHOJI <yashi@spacecubics.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6541
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
10 months agohelper: Remove src/helper from include dirs 07/6507/4
Yasushi SHOJI [Sun, 29 Aug 2021 09:18:01 +0000 (18:18 +0900)]
helper: Remove src/helper from include dirs

The header files under src/helper/ can currently be included with
either

    #include <bits.h>
    or
    #include <helper/bits.h>

This is because we specify both "src/" and "src/helper/" directories
as include directories.  Some files name under "src/helper/", such as
types.h, log.h, and util.h are too generic and could be ambiguous
depending on the search path.

This commit remove "src/helper/" from our include dir and make C files
include explicitly.

Change-Id: I38fc9b96ba01a513d4a72757d40007e21b502f25
Signed-off-by: Yasushi SHOJI <yashi@spacecubics.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6507
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
10 months agouint64_t->target_addr_t for stack pointers. 86/6586/3
Tim Newsome [Tue, 21 Sep 2021 18:43:21 +0000 (11:43 -0700)]
uint64_t->target_addr_t for stack pointers.

This might be incomplete. It's just a quick attempt to reduce some of
the difference between riscv-openocd and mainline. Other stack pointers
can be updated as I come across them.

Change-Id: Id3311b8a1bb0667f309a26d36b67093bfeb8380a
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6586
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
10 months agostlink-dap: add 'cmd' to send arbitrary commands 64/6564/3
Antonio Borneo [Tue, 16 Mar 2021 23:02:16 +0000 (00:02 +0100)]
stlink-dap: add 'cmd' to send arbitrary commands

Either for testing new commands and to retrieve information that
don't fit in any specific place of OpenOCD, for example monitoring
the target's VDD power supply from a TCL script.

Change-Id: Id43ced92c799b115bb1da1c236090b0752329051
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6564
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
10 months agoudev: add ASIX Presto programmer 63/6563/2
Antonio Borneo [Sun, 19 Sep 2021 19:52:44 +0000 (21:52 +0200)]
udev: add ASIX Presto programmer

The driver is in OpenOCD since 2007, but the USB VID/PID have
never been listed in udev rules.

Change-Id: I77df469929dd7f6b6483678c0e76f22c30a7614c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6563
Tested-by: jenkins
10 months agotarget: reset target examined flag if target::examine() fails 48/6548/4
Tarek BOCHKATI [Tue, 7 Sep 2021 13:25:32 +0000 (14:25 +0100)]
target: reset target examined flag if target::examine() fails

For example: before this change in cortex_m_examine, if we fail reading CPUID
we return a failure code but target was set to examined which is not consistent.

Change-Id: I9f0ebe8f811849e54d1b350b0db506cb3fdd58f4
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6548
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
10 months agotarget/cortex_m: enhance multi-core examine logs 53/6553/2
Tarek BOCHKATI [Wed, 8 Sep 2021 11:49:50 +0000 (12:49 +0100)]
target/cortex_m: enhance multi-core examine logs

Giving the example of STM32WL55x the examine log is the following:
  Info : stm32wlx.cpu0: hardware has 6 breakpoints, 4 watchpoints
  Info : stm32wlx.cpu1: hardware has 4 breakpoints, 2 watchpoints

After this change the examine log becomes:
  Info : stm32wlx.cpu0: Cortex-M4 r0p1 processor detected
  Info : stm32wlx.cpu0: target has 6 breakpoints, 4 watchpoints
  Info : stm32wlx.cpu1: Cortex-M0+ r0p1 processor detected
  Info : stm32wlx.cpu1: target has 4 breakpoints, 2 watchpoints

Change-Id: I1873a75eb76f0819342c441129427b38e984f0df
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6553
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
10 months agotcl/stm32wlx.cfg: comply with new jimtcl expr syntax 57/6557/3
Tarek BOCHKATI [Tue, 14 Sep 2021 20:26:47 +0000 (21:26 +0100)]
tcl/stm32wlx.cfg: comply with new jimtcl expr syntax

Change-Id: I2e9fd528817b14396c7643801aeea5c8dde668e0
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6557
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
10 months agodriver/linuxgpiod: add support for opendrain srst 59/6559/2
Alex Crawford [Thu, 16 Sep 2021 17:00:25 +0000 (10:00 -0700)]
driver/linuxgpiod: add support for opendrain srst

Some MCUs (e.g. the STM32F3) directly expose the internal reset line to
an external pin. When this signal is driven by a push/pull line, it can
actually be inhibited by the external driver. This results in a setup
where the MCU cannot reset itself, for example, by a watchdog timeout or
a sysreset request. To fix this condition, support for open drain output
on the SRST line is required.

Note that because `reset_config srst_open_drain` is the default, all
users of this adapter will switch over to an open drain output unless
explicitly configured otherwise.

Signed-off-by: Alex Crawford <openocd@code.acrawford.com>
Change-Id: I89b39b03aa03f826ed3c45793412780448940bcc
Reviewed-on: https://review.openocd.org/c/openocd/+/6559
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
10 months agoSpeed up remote bitbang. 34/6534/3
Tim Newsome [Thu, 2 Sep 2021 18:11:30 +0000 (11:11 -0700)]
Speed up remote bitbang.

1. Use TCP_NODELAY, which makes things twice as fast.
2. Get rid of a bunch of unnecessary socket block/non-block calls, which
improves speed another 10% or so.

Change-Id: I415db5746d55374a14564b1973b81e3517f5cb67
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6534
Tested-by: jenkins
Reviewed-by: Jan Matyas <matyas@codasip.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
10 months agoopenocd: prevent jimtcl error message while testing commands 62/6562/2
Antonio Borneo [Fri, 17 Sep 2021 16:37:41 +0000 (18:37 +0200)]
openocd: prevent jimtcl error message while testing commands

The jimtcl API Jim_GetCommand() sets an error message when the
command is not found and flag JIM_ERRMSG is set.
OpenOCD is checking if the command has already been registered,
thus 'command not found' is the desired case.

Pass flag JIM_NONE to prevent jimtcl from setting the error
message.

Change-Id: I3329c2f8722eda0cc9a5f9cbd888a37915b46107
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6562
Tested-by: jenkins
10 months agoarm_tpiu_swo: fix support for deprecated 'tpiu' command before 'init' 61/6561/2
Antonio Borneo [Fri, 17 Sep 2021 16:47:20 +0000 (18:47 +0200)]
arm_tpiu_swo: fix support for deprecated 'tpiu' command before 'init'

Commit dc7b32ea4a00 ("armv7m_trace: get rid of the old tpiu code")
is not handling correctly the old 'tpiu' command if it is run
during the config phase (before command 'init').

Move the call to the old event handler 'trace-config' in function
jim_arm_tpiu_swo_enable(), so it is correctly executed after
'init'.

Add the call to the old event handler 'trace-config' also during
jim_arm_tpiu_swo_disable(), to match the old behaviour.

Add more information while alerting that the event 'trace-config'
is deprecated.

Change-Id: If831d9159b4634c74e19c04099d041a6e2be3f2a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: dc7b32ea4a00 ("armv7m_trace: get rid of the old tpiu code")
Reviewed-on: https://review.openocd.org/c/openocd/+/6561
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
10 months agoarm_adi_v5: drop ANY_ID from table dap_part_nums 54/6454/3
Antonio Borneo [Fri, 20 Aug 2021 22:35:32 +0000 (00:35 +0200)]
arm_adi_v5: drop ANY_ID from table dap_part_nums

The initial version of the table dap_part_nums contains only the
part number of the device and not the manufacturer ID.
This causes collisions between devices with same part number but
from different manufacturer.
The table has been extended to include the manufacturer JEDEC code
in commit 2f131d3c3004 ("ARM ADIv5: CoreSight ROM decode part
number and designer id").
For two old/legacy table's entries reported without manufacturer
code it was defined a special ANY_ID manufacturer, meaning skip
the check for manufacturer!
The two legacy entries report the comment "from OMAP3 memmap", and
thanks to the associated string has been possible through Google
to identify a Master Report [1] about using OpenOCD with the OMAP3
in a BeagleBoard. The ROM table is printed with OpenOCD command
"dap info 1" at page 8 and reports the Peripheral ID required to
extract the manufacturer ID that, out of any surprise, belong to
Texas Instruments.

Set the two missing manufacturer ID to Texas Instruments JEDEC
code.

Remove the now redundant definition and use of ANY_ID.

While revisiting this old code, remove also the useless comment
"0x113: what?". It was introduced in commit ddade10d4a93 ("ARM
ADIv5: "dap info" gets more readable") and from the same dump in
[1] it's clearly another element in OMAP3. It is listed as entry
0x8 in the ROM table and there is no further info available.
OpenOCD will anyway list it as:
Designer is 0x017, Texas Instruments
Part is 0x113, Unrecognized
Another link https://elinux.org/BeagleBoardOpenOCD reports the
text "Part number 0x113: This is ????", which sounds familiar!
No public document from Texas Instruments reports what is this
device at address 0x54012000.

[1] Warren Clay Grant - University of Texas at Austin
    "Implementation of an Open Source JTAG Debugging Development
    Chain for the BeagleBoard ARM® Cortex A-8" - May 2012
Link: https://repositories.lib.utexas.edu/bitstream/handle/2152/ETD-UT-2012-05-5478/GRANT-MASTERS-REPORT.pdf
Change-Id: I7e007addbb5c6e90303e4e8c110c7d27810fbe9c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6454
Tested-by: jenkins
Reviewed-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
10 months agoarm_adi_v5: add arm Neoverse N2 part numbers 53/6453/3
Antonio Borneo [Thu, 19 Aug 2021 16:02:14 +0000 (18:02 +0200)]
arm_adi_v5: add arm Neoverse N2 part numbers

Change-Id: Ib7a8c9d460f12762f6d106e9331e84b6d2dec213
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6453
Tested-by: jenkins
Reviewed-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
10 months agoarm_adi_v5: add arm Neoverse N1 part numbers 52/6452/3
Kevin Burke [Thu, 19 Aug 2021 15:44:38 +0000 (17:44 +0200)]
arm_adi_v5: add arm Neoverse N1 part numbers

Split from change https://review.openocd.org/6077/

Change-Id: I5e3d3736beb741de3940ea6e23b0ccbf47e8dec7
Signed-off-by: Kevin Burke <kevinb@os.amperecomputing.com>
Signed-off-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6452
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
10 months agoarm_adi_v5: add arm Cortex-R52 part numbers 51/6451/3
Antonio Borneo [Thu, 19 Aug 2021 16:22:28 +0000 (18:22 +0200)]
arm_adi_v5: add arm Cortex-R52 part numbers

Extract new part numbers from Arm Cortex-R52 Processor Technical
Reference Manual Revision r1p3 and add them to the array
dap_partnums.

Change-Id: I8020f36de587951af60422ef33d7e438dc7d9d53
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6451
Tested-by: jenkins
Reviewed-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
10 months agoarm_adi_v5: add arm SoC-600 part numbers 50/6450/3
Antonio Borneo [Mon, 16 Aug 2021 22:13:05 +0000 (00:13 +0200)]
arm_adi_v5: add arm SoC-600 part numbers

Extract new part numbers from ARM CoreSight System-on-Chip SoC-600
Technical Reference Manual Revision r4p1 and add them to the array
dap_partnums.

Change-Id: I88d8aa3c084f6e832b75032e75bfb6d377a08360
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6450
Tested-by: jenkins
Reviewed-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
10 months agoarm_adi_v5: add helper to search for part number 49/6449/3
Antonio Borneo [Mon, 16 Aug 2021 23:05:39 +0000 (01:05 +0200)]
arm_adi_v5: add helper to search for part number

Improve code readability and prepare to re-use the helper.

Change-Id: Iee5e01047c82be3dd86707f5c283f0b20cc4070d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6449
Tested-by: jenkins
Reviewed-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
10 months agoarm_adi_v5: move in a separate function devtype decode/display 48/6448/5
Kevin Burke [Tue, 10 Aug 2021 14:26:42 +0000 (16:26 +0200)]
arm_adi_v5: move in a separate function devtype decode/display

For readability, move in a separate function the decoding and the
display of devtype register.
The function will be reused with ADIv6.

Split from change https://review.openocd.org/6077/

Change-Id: I7a26a2c9759d5db5f9acfae5c169b90b3deb2f18
Signed-off-by: Kevin Burke <kevinb@os.amperecomputing.com>
Signed-off-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6448
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
10 months agoarm_adi_v5: simplify handling of AP type 47/6447/5
Antonio Borneo [Tue, 10 Aug 2021 16:09:28 +0000 (18:09 +0200)]
arm_adi_v5: simplify handling of AP type

The complete AP type should include 'class' and 'manufacturer'.

Cleanup the definition of AP type from AP_REG_IDR register.
Include the check of 'class', together with manufacturer and type.
Add the new MEM-AP from ARM IHI0074C.

Change-Id: Ic8db7c040108ba237b54f73b1abe24b8b853699b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6447
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
10 months agoarm_coresight: add include file and use it 46/6446/5
Antonio Borneo [Sun, 8 Aug 2021 14:46:30 +0000 (16:46 +0200)]
arm_coresight: add include file and use it

Several magic numbers related to ARM CoreSight specification
IHI0029E are spread around OpenOCD code.

Define through macros the ARM CoreSight magic numbers and collect
them in a single include file.
Use the new macros wherever possible.

Change-Id: I9b0c1c651ce4ffbaf08d31791ef16e95983ee4cb
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6446
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
10 months agoarmv7m.h: relax dependency from 'arm_adi_v5.h' 68/6468/4
Antonio Borneo [Mon, 16 Aug 2021 17:08:23 +0000 (19:08 +0200)]
armv7m.h: relax dependency from 'arm_adi_v5.h'

The include file 'armv7m.h' includes 'arm_adi_v5.h' only to get
the definition of 'struct adiv5_ap', but doesn't need the struct
content.

Reducing the cross dependencies speeds-up the compile time during
code development by avoiding re-compiling file.

Relax the dependency by locally declaring 'struct adiv5_ap' in
'armv7m.h' and remove the include of 'arm_adi_v5.h'.
Fix the other files that have now lost the includes file that
'arm_adi_v5.h' depends from.

Change-Id: Ic0d40b17db6045fa43f348bda83eaf211a6b347d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6468
Tested-by: jenkins
Reviewed-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
10 months agoPartially Revert "flash/stm32l4x: introduce flash programming without loader" 69/6569/5
Oleksij Rempel [Wed, 15 Sep 2021 09:34:21 +0000 (10:34 +0100)]
Partially Revert "flash/stm32l4x: introduce flash programming without loader"

This partially reverts commit 1247eee4e6e5.

There is no reasonable use cases where work-area should be enabled
and working, and it can't be used for the flash loader.

Instead of introducing driver specific property, users can disable
flash load by disabling work-area, for example by setting it to 0.

But still we keep the function stm32l4_write_block_without_loader
to be used when workarea is not available (no sufficient size or zero)

Change-Id: Ibb046c74df354c6067bac978e8ef7efb47d9fd2b
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6569
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
10 months agoflash/stm32l4x: fix dual bank support for STM32L552xC devices 38/6538/4
Tarek BOCHKATI [Thu, 2 Sep 2021 11:03:59 +0000 (12:03 +0100)]
flash/stm32l4x: fix dual bank support for STM32L552xC devices

For STM32L552xC devices with 256K flash:
  dual bank mode is activated if DB256 is set
  page size is 2KB if DBANK is set

For parts with 512K (aka STM32L5x2xE):
  DBANK controls both of dual/single bank mode and page size as well.

Change-Id: I8be668d5552fefe81acffaf2e3e35ef5e938162e
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reported-by: Patrik Bachan <diggit@users.sourceforge.net>
Fixes: https://sourceforge.net/p/openocd/tickets/317/
Reviewed-on: https://review.openocd.org/c/openocd/+/6538
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
10 months agohelper/command: fix echo return values 49/6549/2
Tarek BOCHKATI [Wed, 11 Aug 2021 00:14:21 +0000 (01:14 +0100)]
helper/command: fix echo return values

the echo command is managed through command handler and not jim_handler
to be consistent rename the handler from jim_echo to handle_echo
and update the return values

Fixes: 4747af362de0 (JIM: document "echo" command)
Change-Id: I5ae87ea802d8430b573fb83daa6b35490b5d5775
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6549
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
10 months agojep106.inc: Update to revision JEP106BC 51/6551/4
Florian Zaruba [Tue, 7 Sep 2021 16:22:13 +0000 (18:22 +0200)]
jep106.inc: Update to revision JEP106BC

Signed-off-by: Florian Zaruba <florian@openhwgroup.org>
Change-Id: I566eb331b2884de3df5ad3f02c2ec7961539257b
Reviewed-on: https://review.openocd.org/c/openocd/+/6551
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
10 months agostlink: Add PID for V3 device without MSD 55/6555/3
Andreas Sandberg [Wed, 8 Sep 2021 22:09:51 +0000 (23:09 +0100)]
stlink: Add PID for V3 device without MSD

Add the 0x3754 PID used by some STLINK-V3 devices when MSD has been
disabled. This PID has been observed on a Nucleo-G431RB board.

Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Change-Id: Idb85874fa5a9dff5940bae7e95426a956693b976
Reviewed-on: https://review.openocd.org/c/openocd/+/6555
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
10 months agohla: Increase HLA_MAX_USB_IDS 54/6554/2
Andreas Sandberg [Wed, 8 Sep 2021 22:14:34 +0000 (23:14 +0100)]
hla: Increase HLA_MAX_USB_IDS

We are already at the limit for the number of VID/PID pairs declared
in stlink.cfg and stlink-dap.cfg. Increase the maximum number of pairs
from 8 to 16 to make room for a few more devices.

Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Change-Id: Ifad8e7ef67b930edbb5421730f00eb3390812f06
Reviewed-on: https://review.openocd.org/c/openocd/+/6554
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
10 months agotarget: do not cast NULL in assignment 40/6540/2
Antonio Borneo [Sat, 4 Sep 2021 21:22:27 +0000 (23:22 +0200)]
target: do not cast NULL in assignment

NULL is defined as 'void *'.
There is no need to cast NULL while assigning it to a pointer.

Change-Id: Ibaf18e5d47329707ec9c1c184cd4bba2e8e702ff
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6540
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Tested-by: jenkins
10 months agoopenocd: remove last NULL comparisons 39/6539/2
Antonio Borneo [Sat, 4 Sep 2021 21:01:09 +0000 (23:01 +0200)]
openocd: remove last NULL comparisons

The NULL pointers preceded by cast where not detected by the
scripting tools looking for NULL pointer comparison.

Remove them and, while there, further simplify the code and apply
the other coding style rules.

Change-Id: Ia7406122e07ef56ef311579ab0ee7ddb22c8e4b5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6539
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
10 months agogerrit url: update the gerrit server address to https://review.openocd.org 81/6481/3
Tarek BOCHKATI [Thu, 26 Aug 2021 09:41:35 +0000 (10:41 +0100)]
gerrit url: update the gerrit server address to https://review.openocd.org

change the gerrit server address from http://openocd.zylin.com to the new
address in order to avoid re-directions.

Change-Id: I76e128c277f63783d1a6f63a6a387aa838f51f80
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6481
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
11 months agodoc: add a note to use 'stm32l4x option_load' after changing option bytes 33/6533/2
Tarek BOCHKATI [Thu, 2 Sep 2021 14:56:50 +0000 (15:56 +0100)]
doc: add a note to use 'stm32l4x option_load' after changing option bytes

Change-Id: I502be27da892e393731d11e02203c736e77033d0
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6533
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
11 months agotcl/target/stm32(f7/h7)x: do not assume presence of the reset 06/6506/3
Tarek BOCHKATI [Sun, 29 Aug 2021 21:09:46 +0000 (22:09 +0100)]
tcl/target/stm32(f7/h7)x: do not assume presence of the reset

do not force the presence of the reset line, since some custom boards
may do not contain the reset line.

Change-Id: I031ab34012b34a1b49def9db16461f9de0ae29cc
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reported-by: Fleck <fleckz@users.sourceforge.net>
Fixes: https://sourceforge.net/p/openocd/tickets/316/
Reviewed-on: https://review.openocd.org/c/openocd/+/6506
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
11 months agoflash/stm32l4x: fix flash programming in 64-bit hosts 56/6556/3
Tarek BOCHKATI [Thu, 9 Sep 2021 21:14:36 +0000 (22:14 +0100)]
flash/stm32l4x: fix flash programming in 64-bit hosts

stm32l4_work_area struct is shared between the loader and stm32l4x flash driver

'*wp' and '*rp' pointers' size is 4 bytes each since stm32l4x devices have
32-bit processors.

however when used in openocd code, their size depends on the host
  if the host is 32-bit, then the size is 4 bytes each.
  if the host is 64-bit, then the size is 8 bytes each.

to avoid this size difference, change their types depending on the
usage (pointers for the loader, and 32-bit integers in openocd code).

Change-Id: I0a3df4bb4bf872b01cdb9357eb28307868d7d469
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6556
Tested-by: jenkins
Reviewed-by: Yestin Sun <sunyi0804@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
11 months agoIn SMP config, replicate watchpoints on each core 28/6528/4
Tim Newsome [Wed, 1 Sep 2021 21:25:10 +0000 (14:25 -0700)]
In SMP config, replicate watchpoints on each core

This works well with gdb on RISC-V, since hardware breakpoints are
per-core and gdb thinks that targets are really processes on a machine.

Are there targets where this is a bad idea? Should the target definition
specify whether this behavior is desired or not?

Change-Id: Ia32be2707b04347fd8bf2ca6fbb2b0ceaad3704a
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6528
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
11 months agoflash/stm32l4x: do not use magic number for dual bank option bits 37/6537/3
Tarek BOCHKATI [Sun, 29 Aug 2021 20:48:49 +0000 (21:48 +0100)]
flash/stm32l4x: do not use magic number for dual bank option bits

Change-Id: I27211e7d44b48f65546e31710ec6ae129acb416f
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6537
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
11 months agoflash/stm32l4x: introduce is_max_flash_size and use it 36/6536/3
Tarek BOCHKATI [Sun, 29 Aug 2021 19:52:50 +0000 (20:52 +0100)]
flash/stm32l4x: introduce is_max_flash_size and use it

Change-Id: Idb421b9cf737d222baf4dd890032f69dec7a366e
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6536
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
11 months agoflash/stm32l4x: fix segmentation fault with HLA adapters and STM32WLx devices 35/6535/3
Tarek BOCHKATI [Sun, 29 Aug 2021 15:33:55 +0000 (16:33 +0100)]
flash/stm32l4x: fix segmentation fault with HLA adapters and STM32WLx devices

CPU2 (Cortex-M0+) is supported only with non-hla adapters because it is on AP1.
Using HLA adapters armv7m.debug_ap is null, and checking ap_num triggers
a segfault.

Change-Id: I501f5b69e629aa8d2836b5194063d74d5bfddb12
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Fixes: https://github.com/STMicroelectronics/OpenOCD/issues/6
Reviewed-on: https://review.openocd.org/c/openocd/+/6535
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
11 months agoflash/nor/tcl: 'flash list' command: add the flash bank target 26/6426/3
Tarek BOCHKATI [Tue, 10 Aug 2021 14:32:37 +0000 (15:32 +0100)]
flash/nor/tcl: 'flash list' command: add the flash bank target

add the target assigned to the flash bank at creation
this is useful in daisy chains, to filter out the target banks.

Change-Id: Ic39e44914e34bb62991783762e5a65ef8871e82f
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6426
Tested-by: jenkins
Reviewed-by: zapb <dev@zapb.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
11 months agoflash/nor/tcl: fix the flash name returned by 'flash list' command 25/6425/2
Tarek BOCHKATI [Thu, 29 Jul 2021 20:44:55 +0000 (21:44 +0100)]
flash/nor/tcl: fix the flash name returned by 'flash list' command

The 'flash list' command returns the driver name as flash name which seems
to be incorrect, the proposal is:
 - to fix this by returning the flash name
 - and add a new item 'driver' in the returned list

example:
before the change
> flash list
  {name stm32l4x base 134217728 size 0 bus_width 0 chip_width 0}
  {name stm32l4x base 201326592 size 0 bus_width 0 chip_width 0}
  {name stm32l4x base 200933376 size 0 bus_width 0 chip_width 0}

after the change
> flash list
  {name stm32l5x.flash_ns driver stm32l4x ...}
  {name stm32l5x.flash_alias_s driver stm32l4x ...}
  {name stm32l5x.otp driver stm32l4x ...}

Change-Id: I6d307b73c457549981a93c260be344378719af82
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6425
Reviewed-by: zapb <dev@zapb.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
11 months agotcl/board: add st_nucleo_g4.cfg to cover known STM32G4 NUCLEO boards 84/5484/6
Tarek BOCHKATI [Sun, 1 Mar 2020 22:11:10 +0000 (23:11 +0100)]
tcl/board: add st_nucleo_g4.cfg to cover known STM32G4 NUCLEO boards

known boards are NUCLEO-G431KB, NUCLEO-G431RB and NUCLEO-G474RE

note: this work safely with B-G431B-ESC1, B-G474E-DPOW1,
      STM32G474E-EVAL and STM32G484E-EVAL

Change-Id: I132a97e1816620b182983edc8a4b272b52b9241d
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/5484
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
11 months agotcl/board: add st_nucleo_g0.cfg to cover known STM32G0 NUCLEO boards 83/5483/5
Tarek BOCHKATI [Sun, 1 Mar 2020 22:00:15 +0000 (23:00 +0100)]
tcl/board: add st_nucleo_g0.cfg to cover known STM32G0 NUCLEO boards

known boards are NUCLEO-G031K8, NUCLEO-G070RB, NUCLEO-G071RB

note: this work safely with STM32G0316-DISCO, STM32G071B-DISCO
      and STM32G081B-EVAL

Change-Id: I483b6f44409228cd8c2c97b3c560927d1645c517
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/5483
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
11 months agotarget: cortex_m: Fix a typo VECTRESET 08/6508/2
Yasushi SHOJI [Sun, 29 Aug 2021 09:27:52 +0000 (18:27 +0900)]
target: cortex_m: Fix a typo VECTRESET

According to ARM Cortex M3 technical reference manual, it's
"VECTRESET" instead of "VECRESET".

Change-Id: Iff5534beac2b313cee6da3252d76d4d44a61eeed
Signed-off-by: Yasushi SHOJI <yashi@spacecubics.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6508
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
11 months agotcl/board/arty_s7: Fix proc and chip name 09/6509/2
Marc Schink [Mon, 30 Aug 2021 12:20:26 +0000 (14:20 +0200)]
tcl/board/arty_s7: Fix proc and chip name

Tested with Digilent Arty S7 board.

Change-Id: I064f3b6537ae8d765d7f380ad53b922d584fdbe7
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/6509
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
11 months agojimtcl: update to master branch 20210715 26/6226/4
Antonio Borneo [Sun, 11 Apr 2021 21:54:44 +0000 (23:54 +0200)]
jimtcl: update to master branch 20210715

This version of jimtcl:
- fixes memory leak in API Jim_CreateCommand();
- fixes 'make distcheck';
- uses single-argument syntax for 'expr'.

With the 'expr' syntax already fixed in all the tcl scripts in
OpenOCD, let's use the latest jimtcl to check it and anticipate
any further issues.
By using this version, the workaround for the memory leak and for
distcheck can be reverted.

Change-Id: I58e1bdc752a728f1b479de1c55067b698e817ef5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6226
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: zapb <dev@zapb.de>
Tested-by: jenkins
11 months agoopenocd: prepare for jimtcl 0.81 'expr' syntax change 10/6510/2
Antonio Borneo [Sun, 29 Aug 2021 23:01:40 +0000 (01:01 +0200)]
openocd: prepare for jimtcl 0.81 'expr' syntax change

Jimtcl commit 1843b79a03dd ("expr: TIP 526, only support a single
arg") drops the support for multi-argument syntax for the TCL
command 'expr'.
All the scripts distributed with OpenOCD are already compliant
with the new syntax.

To avoid breaking user script, introduce a replacement for 'expr'
command that handles the old syntax while issuing a deprecated
warning.
This change should be part of OpenOCD v0.12.0, then reverted.

Change-Id: Ib08aa8ebcb634c81a3ce9d24fb4938b0418c947c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6510
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Tested-by: jenkins
11 months agoflash/stm32l4x: avoid using magic numbers for device ids 37/6437/9
Tarek BOCHKATI [Sat, 14 Aug 2021 13:31:17 +0000 (14:31 +0100)]
flash/stm32l4x: avoid using magic numbers for device ids

Change-Id: I54c41f31c16b91904e8cbca823b90caa3807826d
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6437
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
11 months agoflash/stm32l4x: add support of STM32WB1x 29/6129/10
Tarek BOCHKATI [Fri, 26 Mar 2021 14:07:41 +0000 (15:07 +0100)]
flash/stm32l4x: add support of STM32WB1x

STM32WB1x devices has a single flash bank up to 320 KB (page 2KB)

note: STM32WB5x/WB3x are single banks as well but do have 4KB as page size.
note: remove the assert that checks if max_mages is power of two, because
      STM32WB1x flash size is not a power of 2

Change-Id: Ib514cf989ecb819d25d1c4a65d641d0a1a3d9f18
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6129
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
11 months agoflash/stm32l4x: add support of STM32G05/G06x 28/6128/10
Tarek BOCHKATI [Fri, 26 Mar 2021 12:27:52 +0000 (13:27 +0100)]
flash/stm32l4x: add support of STM32G05/G06x

this device has single bank flash architecture up to 64KB (page 2KB)
reference: RM0444 rev 5

Change-Id: Ia213c01accb950fcbb7519e08057dae11b4443dd
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6128
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
11 months agoflash/stm32l4x: switch to to c loader instead of assembly loader 09/6109/21
Tarek BOCHKATI [Sat, 6 Mar 2021 21:46:35 +0000 (22:46 +0100)]
flash/stm32l4x: switch to to c loader instead of assembly loader

switching to C loader instead of the assembly version will enhance readability
will reduce the maintenance effort.

besides the switch to C loader, we added a new parameters to the loader
like flash_word_size and flash_sr_bsy_mask in order to support properly
STM32U5x and STM32G0Bx/G0Cx in dual-bank mode.

Change-Id: I24cafc2ba637a065593a0506eae787b21080a0ba
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6109
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
11 months agoflash/nor: add support for Nuvoton NPCX series flash 50/5950/17
Wealian Liao [Thu, 26 Nov 2020 02:25:09 +0000 (10:25 +0800)]
flash/nor: add support for Nuvoton NPCX series flash

Added NPCX flash driver to support the Nuvoton NPCX series
microcontrollers. Add config file for NPCX series.

Change-Id: Ia10b019a3521f59ad1e10ccdc56827ba30c3eac8
Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/5950
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
11 months agoserver/telnet: add variables auto-completion 42/6442/2
Tarek BOCHKATI [Thu, 19 Aug 2021 00:30:38 +0000 (01:30 +0100)]
server/telnet: add variables auto-completion

Change-Id: Ie690afad18065cde8d754c8af50dacd9f467c8e5
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6442
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
11 months agoserver/telnet: simplify telnet_input function 40/6440/4
Tarek BOCHKATI [Wed, 18 Aug 2021 17:41:49 +0000 (18:41 +0100)]
server/telnet: simplify telnet_input function

running complexity on this file tells that:
NOTE: proc telnet_input in file telnet_server.c line 576
nesting depth reached level 8
==> *seriously consider rewriting the procedure*.
Complexity Scores
Score | ln-ct | nc-lns| file-name(line): proc-name
  319     272     226   src/server/telnet_server.c(576): telnet_input
total nc-lns      226

so try to reduce the complexity score of telnet_input function

Change-Id: I64ecb0c54da83c27a343f2a1df99fc8f9484572a
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6440
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
11 months agoserver/telnet: enhance telnet_move_cursor 41/6441/2
Tarek BOCHKATI [Wed, 18 Aug 2021 18:55:48 +0000 (19:55 +0100)]
server/telnet: enhance telnet_move_cursor

instrument the telnet_move_cursor to detect when there is no change
of cursor position and if the requested new position is out of bounds.

Change-Id: I24da877e538a458da6d2f8ddc2a681eee404d2cb
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6441
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
11 months agoserver/telnet: support 'CTRL+C' 39/6439/2
Tarek BOCHKATI [Tue, 17 Aug 2021 12:29:56 +0000 (13:29 +0100)]
server/telnet: support 'CTRL+C'

like in terminal 'CTRL+C':
 - keeps the line content so the user can refer to it (like copy/paste)
 - marks the line with '^C', as hint that the command was not executed
 - permit the user to write a new command

Change-Id: Ib784c827d64fdc439a35db461d8387a62d3bfbbf
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6439
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
11 months agoserver/telnet: cleanup the if statement mixed style 38/6438/2
Tarek BOCHKATI [Tue, 17 Aug 2021 12:24:56 +0000 (13:24 +0100)]
server/telnet: cleanup the if statement mixed style

Change-Id: Ie5f67288511d46fa196bc9f41e6af5504244adaa
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6438
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
11 months agoMakefile: drop warning suppression on win build 54/6254/2
Antonio Borneo [Sat, 15 May 2021 21:14:18 +0000 (23:14 +0200)]
Makefile: drop warning suppression on win build

Commit dcdf71c21b99 ("- fix signed/unsigned build errors under
win32. Thanks Zach Welch <zw@superlucidity.net>") in 2009 prevents
gcc warnings on sign/unsigned comparisons while building for Win
on folders 'helper' and 'server'.
In 2011, commit b69119668ed8 ("RTOS Thread awareness support wip")
uses the same method on the new folder 'rtos'.

In mean time, all the incorrect sign/unsigned comparisons has been
fixed and no warning is present with the default -Wextra flag that
implies -Wsign-compare.
The comment:
# FD_* macros are sloppy with their signs on MinGW32 platform
seems linked to some old implementation of MinGW32 include file
that doesn't apply on current versions.

Remove the obsolete hacks to suppress the warnings.

Change-Id: I76dba9e54a647d3b9fbf1b7e9ae1844e3d7adc9a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6254
Tested-by: jenkins
Reviewed-by: Xiaofan Chen <xiaofanc@gmail.com>
11 months agohelper: remove fix for libusb pre-v1.0.9 53/6253/2
Antonio Borneo [Sat, 15 May 2021 22:48:49 +0000 (00:48 +0200)]
helper: remove fix for libusb pre-v1.0.9

Libusb v1.0.9 has been released on April 2012. We can reasonably
expect that every user has already updated his system to a libusb
newer of equel to v1.0.9.

Remove the fix for older libusb.

Change-Id: I0c40e53d7af85a11b0bb265bbf8035857a2dfce1
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6253
Tested-by: jenkins
Reviewed-by: Xiaofan Chen <xiaofanc@gmail.com>
11 months agoflash/stm32l4x: free write_algorithm work area if no space left for the buffer 86/6486/2
Tarek BOCHKATI [Sun, 29 Aug 2021 15:02:58 +0000 (16:02 +0100)]
flash/stm32l4x: free write_algorithm work area if no space left for the buffer

If the remaining memory for the buffer is less than 256 bytes,
the memory allocated for the write algorithm in the target is not freed.

Fixes: ba131f30a079 (Flash driver for STM32G0xx and STM32G4xx)
Change-Id: Ic649f6c39799d76725b0c69ff3a009a3f510e17f
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6486
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
11 months agoflash/stm32l4x: add support of STM32U57x/U58x 08/6108/15
Tarek BOCHKATI [Tue, 16 Mar 2021 15:10:59 +0000 (16:10 +0100)]
flash/stm32l4x: add support of STM32U57x/U58x

this device flash registers are quite similar to STM32L5
with this changes :
 - flash size is up to 2MB
 - 2MB variants are always dual bank
 - 1MB and 512KB variants could be dual bank (contiguous addressing)
   depending on DUALBANK bit(21)
 - flash data width is 16 bytes (quad-word)

Change-Id: Id13c552270ce1071479ad418526e8a39ebe83cb1
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6108
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
11 months agoflash/stm32l4x: add support of STM32WL5x dual core 50/6050/16
Tarek BOCHKATI [Thu, 4 Feb 2021 21:43:52 +0000 (22:43 +0100)]
flash/stm32l4x: add support of STM32WL5x dual core

according the RM0453, the second core  have a different Flash CR and SR
registers for flash operations (called C2CR and C2SR).
so we need to a different flash_regs than older L4 devices.
@see stm32wl_cpu2_flash_regs

the C2CR register don't contain LOCK and OPTLOCK bits, and this explain
the addition of new register index called STM32_FLASH_CR_WLK_INDEX to
look-up the CR with lock, to be used in locking/unlocking the flash.

note: DBGMCU_IDCODE cannot be read using CPU1 (Cortex-M0+) at AP1,
to solve this read the UID64 (IEEE 64-bit unique device ID register)

Change-Id: Ifb6e291bf97f814f0b9987b2c40f3037959f7af4
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6050
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
11 months agoflash/stm32l4x: prevent undefined behavior warnings caused by signed integer operations 29/6429/5
Sebastiaan de Schaetzen [Sun, 15 Aug 2021 22:26:23 +0000 (23:26 +0100)]
flash/stm32l4x: prevent undefined behavior warnings caused by signed integer operations

When running OpenOCD with -fsanitize=undefined, a warning is emitted
for an bit-shifting operation whose result cannot be stored in a
signed integer.

This is because (1 << 31) overflows a signed integer, which is
undefined behavior. By making each of the bit masks act on an
unsigned number, the warning is avoided.

Whether this warning emitted by UBSan would ever manifest into a real
error is debatable, but fixing this does make UBSan happy.

Change-Id: I0455a26b234cb4f5e239a6ba90023d28380e9464
Signed-off-by: Sebastiaan de Schaetzen <sebastiaan.de.schaetzen@gmail.com>
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6429
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
11 months agoflash/stm32l4x: add support of STM32G0Bx/G0Cx devices 36/6036/13
Tarek BOCHKATI [Tue, 19 Jan 2021 12:26:48 +0000 (13:26 +0100)]
flash/stm32l4x: add support of STM32G0Bx/G0Cx devices

this device has a dual bank flash architecture up to 512 KB (page 2KB)
reference: RM0444 Rev 5

notes:
 - 128k variant is always single bank
 - 256k variant flash is contiguous (no gap) in dual bank mode
 - BKER is bit 13 vs bit 11 for other devices
   > added cr_bker_mask in stm32l4_flash_bank struct
 - BSY2 for bank 2 operations
   > added sr_bsy_mask in stm32l4_flash_bank struct
   > proposed optimization: always wait for (BSY1 | BSY2) with
     STM32G0Bx/G0Cx devices only (for L4+ devices BSY2=PEMPTY)

TODO: update flashloader to use the proper BSY bits
      temporarily don't use the loader in dual bank mode

Change-Id: I54b0c93b494e7209da818791d15edd8cd42c2732
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6036
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
11 months agoflash/stm32l4x: remove stm32l4_part_info.default_flash_regs 35/6435/4
Tarek BOCHKATI [Fri, 13 Aug 2021 23:09:29 +0000 (00:09 +0100)]
flash/stm32l4x: remove stm32l4_part_info.default_flash_regs

This struct element is replaced by the usage of F_HAS_L5_FLASH_REGS flag:
since over this driver stm32l4_flash_regs is the default register layout,
and the only exception is STM32L5 family,
so it's simpler to manage it using a flag.

Note: the same flag will be used with STM32U5 devices, as they have
the same registers layout, which explains the move of stm32l5_s_flash_regs
before the switch(device_id) in order to not re-write this for STM32U5.

Change-Id: I3b67a6f558d9350f609a22524012b6fceb7de7c2
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6435
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
11 months agoflash/stm32l4x: introduce flash programming without loader 73/6273/9
Tarek BOCHKATI [Tue, 25 May 2021 10:54:50 +0000 (11:54 +0100)]
flash/stm32l4x: introduce flash programming without loader

this capability permits to program the flash if we cannot reserve a workarea.

the introduction the command 'stm32l4x flashloader <bank_id> [enable|disable]'
helps to automatically skip using the flashloader if needed.

Change-Id: Id29213c85ee5c7c487cfee21554f5a7ea50db6c9
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6273
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
11 months agoflash/stm32l4x: STM32L5 support programming when TZEN=1 and RDP=0x55 35/6035/17
Tarek BOCHKATI [Fri, 22 Jan 2021 12:15:52 +0000 (13:15 +0100)]
flash/stm32l4x: STM32L5 support programming when TZEN=1 and RDP=0x55

when RDP level is 0.5 the provided work-area should reside in non-secure RAM
to ensure that:
 - add a hint in the driver level
 - reduce the usage of secure RAM only when TZEN=1 and RDP is not 0.5
   (check the target configuration file)

Change-Id: Idbf2325e609b84ef8480eefdb49a176fdf7e07c7
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6035
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
11 months agoflash/stm32l4x: STM32L5 support programming when TZEN=1 and RDP=0xAA 36/5936/19
Tarek BOCHKATI [Thu, 12 Nov 2020 16:19:40 +0000 (17:19 +0100)]
flash/stm32l4x: STM32L5 support programming when TZEN=1 and RDP=0xAA

STM32L5 flash memory is aliased to 0x0C000000, this address mapping
is used for secure applications. (0x08000000 for non-secure)

this change allows the programming of secure and non-secure flash
when trustzone is enabled and RDP level is 0

Change-Id: I89d1f1b5d493cf01a142ca4dbfef5a3731cab96e
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/5936
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
11 months agoflash/stm32l4x: introduce auto-probe when OPTR is changed 35/5935/14
Tarek BOCHKATI [Tue, 10 Nov 2020 18:15:54 +0000 (19:15 +0100)]
flash/stm32l4x: introduce auto-probe when OPTR is changed

auto re-probing is ensured by having optr cache set in the
last probe operation.

this will help to detect if flash options have been modified by the
running application or by the user using direct register access.

Change-Id: I05cd7ab9e83a7fc26ac6cff175b3c11b0efa2eb5
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/5935
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
11 months agoflash/stm32l4x: introduce 'stm32l4x trustzone [enable|disable]' command 42/5542/19
Tarek BOCHKATI [Wed, 25 Mar 2020 21:47:08 +0000 (22:47 +0100)]
flash/stm32l4x: introduce 'stm32l4x trustzone [enable|disable]' command

this command will help to enable/disable or display the TrustZone security,
using the TZEN option bit.

Note: This command works only with devices with TrustZone, eg. STM32L5.
Note: This command will perform an OBL_Launch after modifying the TZEN.

Change-Id: I4aef15bf57d09c1658d37858143d23b1d43de1f0
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/5542
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
11 months agoflash/stm32l4x: do not report bank mode before probing [FIX] 11/6411/3
Tarek BOCHKATI [Thu, 29 Jul 2021 09:35:26 +0000 (10:35 +0100)]
flash/stm32l4x: do not report bank mode before probing [FIX]

in line 1391, get_stm32l4_bank_type_str(bank) will always output the same
value "Flash single" since the variable stm32l4_info->dual_bank_mode is false
by default, stm32l4_info->dual_bank_mode will be set correctly afterward
in the switch case at line 1467

thus the need to remove the usage of get_stm32l4_bank_type_str(bank) before
stm32l4_info->dual_bank_mode initialization.

Fixes: 64c2e03b23d9 ("flash/nor: improved API of flash_driver.info & fixed buffer overruns")
Change-Id: Ia8dc7e144e0ded6143682eb514c247f27859ff81
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6411
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
11 months agotcl: add lattice ECP5 family support 12/6112/6
Oleksij Rempel [Sun, 14 Mar 2021 17:19:06 +0000 (18:19 +0100)]
tcl: add lattice ECP5 family support

Add support for ECP5 FPGA targets and board based on this chips:
Radiona ULX3S and Lambdaconcept ECPIX-5

Change-Id: I932fc6e2458cda7d63ac21579acddea5b53410bc
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/6112
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
11 months agotarget/adi_v5_jtag: Add support for 8-bit IR JTAG-DP 85/6285/2
root [Thu, 3 Jun 2021 09:37:37 +0000 (11:37 +0200)]
target/adi_v5_jtag: Add support for 8-bit IR JTAG-DP

As per Arm Debug Interface Architecture Specification (ADIv5.0 to
ADIv5.2), B3.3.1, the JTAG-DP as an IR length of 4 or 8 bits
depending on the ARM implementation. The current code
only support 4-bit and this patch extends the support to 8-bit IR.
Not tested back yet on a 4-bit target.

Change-Id: Ie4f875dc336caf014c6cfced57574b54d0970623
Signed-off-by: Antoine C. <acalando@free.fr>
Reviewed-on: https://review.openocd.org/c/openocd/+/6285
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
11 months agocortex_a: use the ap number specified at target create 13/6413/2
Antonio Borneo [Wed, 4 Aug 2021 15:50:02 +0000 (17:50 +0200)]
cortex_a: use the ap number specified at target create

Current implementation ignores the flag '-ap-num' provided to
command 'target create' and searches for the first AP of APB type.

If specified, use the ap number.

Change-Id: If1ac12345220d14a4a60515efe46dc2a2eac079a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6413
Tested-by: jenkins
11 months agojep106: use packed jedec manufacturer code 18/6418/2
Antonio Borneo [Sun, 8 Aug 2021 11:51:33 +0000 (13:51 +0200)]
jep106: use packed jedec manufacturer code

JEP106 encodes JEDEC-assigned manufacture code as:
a) a sequence of zero or more escape codes 0x7f;
b) an odd-parity bit of the next 7 bits;
c) 7 bits.

The same code is often represented as a single value composed by
the logical OR between:
- the number of escape codes in a), shifted left by 7 positions;
- the 7 bits in c).
This is the preferred packed representation used by this change.

Currently there are only two uses of JEP106 in openocd to get the
manufacturer name:
- to decode the JTAG IDCODE of each TAP, where the JEP106 code is
  already packed as in the preferred representation above in bits
  IDCODE[11:1];
- to decode the ARM CoreSight PIDR register, where the JEP106 code
  is split in 3 parts:
  = PIDR3[3:0], corresponding to bits [10:7] of the packed code;
  = PIDR2[2:0], corresponding to bits [6:4] of the packed code;
  = PIDR1[7:4], corresponding to bits [3:0] of the packed code.

Wrap the existing JEP106 decode function in a simpler API using
the packed code.
Simplify the callers by skipping the bit unpacking.
Change the manufacturer code in CoreSight table dap_partnums[] to
match the packed representation, by removing the always-one bit 7
erroneously taken from PIDR bit JEDEC and included in the former
table.

Change-Id: I63eb4da9e6801fab25e330f1f6b792d2fd619493
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6418
Tested-by: jenkins
11 months agoarm_adi_v5: update coresight class names 31/6431/2
Antonio Borneo [Wed, 11 Aug 2021 15:03:18 +0000 (17:03 +0200)]
arm_adi_v5: update coresight class names

Update the list of ARM coresight classes wrt to latest ARM
documentation.
Use c99 array designator to easily track changes in future.
Add a comment for the entry "OptimoDE DESS". It was added in 2009
by David Brownell, but Google cannot find any reference other than
this line in openocd code its associated commit. It should not be
an issue keeping it as is.

Change-Id: Ia3b646131ee68ca5263095c3a0aeaf75c004b324
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6431
Tested-by: jenkins

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)