Fix buffer overflow in versaloon interface

The USB buffer will need space for both TMS and TDI buffers.
Each holds tap_buffer_size bytes maximum, so tap_buffer_size must be
smaller than half of usb buf_size.

Change-Id: Id8f39936a894cbd98deb89eec5a859aef1e2b783
Signed-off-by: Joerg Fischer <turboj@gmx.de>
Reviewed-on: http://openocd.zylin.com/1136
Tested-by: jenkins
Reviewed-by: simon qian <simonqian.openocd@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

target: hla correctly use target events

Because we were always running using target state TARGET_RUNNING target
algorithm's were a bit verbose compared to other targets.

This brings the hla target inline with the other targets.

Change-Id: I3a257fdc878b87660fac8b5eca22b421eee5b349
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1134
Tested-by: jenkins

armv7m: update to use correct register core_cache

The was missed when the armv7m was moved over to using the std arm
core_cache, probably because it is disabled by default.

Change-Id: I2f5a18ef6dd783b36e8c29f4c52379104bda4583
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1138
Tested-by: jenkins

stm32: add support for stm32l1x 256k high density single bank devices

Added support for new ST devices in the stm32lx portfolio, with device
id 0x427. These have 256k flash, but in a single bank compared to
device id 0x436 which is a dual bank flash.

Change-Id: Iafdfe990f24bd04b0d6e00385ee70690f3bf8d5f
Signed-off-by: Johan Almquist <johan.almquist@assaabloy.com>
Reviewed-on: http://openocd.zylin.com/1140
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

stm32: add support for the STM32Lx 384kb dual bank flash

This update adds support for the STM32Lx 384kb dual bank flash. Previously there was a problem when writing an
image that was larger than 192Kb. That lead to openocd printing out two error messages like
"Error: access denied / write protected" and "Error: invalid program address". The reason was that the stm32lx
driver tried to write half pages which overlapped into the next flash bank.
A new configuration file stm32lx_dual_bank.cfg can be used for stm32lx chips with dual bank flash (256kb or 384kb devices).
A sanity check was added for probed flash size values to fix the issue seen on some ST samples that answered incorrectly.

Change-Id: I69e25131983d88613be8606b438f98870c5f1e52
Signed-off-by: Johan Almquist <johan.almquist@assaabloy.com>
Reviewed-on: http://openocd.zylin.com/1125
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

stm32: enable flash bank size override

It has been seen on some stm32 targets that the flash size register that
is probed by the driver may contain an invalid size.

This change enables the user to override the probed value.

Change-Id: I09359e59a96f9133d3d939670957d32a830a944e
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1132
Tested-by: jenkins
Reviewed-by: Johan Almquist <johan.almquist@assaabloy.com>

jtag_interface: .speed can be NULL  when not needed

adapter_init (core.c) won't check speed configuration
of the selected interface if it's not needed (.speed = NULL).

When it's not needed, we can now omit adapter_khz in
init scripts and we don't have to implement dummy handlers
for speed_div and khz functions.

It also removes calls to adapter_khz in interface configuration
files when not used anymore.

Change-Id: I6eb1894385503fede542a368f297cec6565eed44
Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
Reviewed-on: http://openocd.zylin.com/1131
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

armv7m: use ARM_MODE_THREAD core mode for algoorithm's

This makes sure we are using privileged mode when executing any loaders.

Change-Id: I18bf32ec92e1c76a66ab25e3712652bc3650b332
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1108
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

armv7m: restore core mode after executing algorithm

Make sure we restore the core mode after executing any algorithm.

We also now check that we actually need to swap the core mode, we may
already be in the correct mode.

Change-Id: Ia48af2c108e0f9868aae241bf25f60323503f092
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1107
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

armv7m: use generic arm read/write_core_reg

Change-Id: I0c15acc1278d2972269d294078495e6b069c830b
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/969
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

armv7m: use generic register core_cache

This removes the armv7m::core_cache and uses the generic arm::core_cache.

Change-Id: If854281b31486cea8be005008f6a71a691b4c208
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/968
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

armv7m: remove unused armv7m_regtype

This simplifies the armv7m_core_reg structure ready for the move to using
the generic struct arm_reg.

Change-Id: I8edb9d77cc54965d49cd2e754568ebcea4cf6964
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/967
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

armv7m: use generic arm::core_mode

To simplify things change over to using the generic core_mode struct rather
than maintaining a armv7m specific one.

Change-Id: Ibf32b785d896fef4f33307fabe0d8eb266f7086f
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/966
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

helper: hexify correctly handle signed chars

The current implementation of hexify was not correctly handling signed chars.

This function is currently used by the ti-icdi driver and as such was causing
random write issues.

As a note perhaps a better long term fix would be to change to using uint8_t
buffers rather than char. This will require changes to the ti-icdi driver
aswell.

Change-Id: I572e69ff2b99227a7d412de056458c0393794b03
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1124
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>

rtos: fix error message

Probably a copy&paste error or remainings of some older version.

Change-Id: Ifb81a9a1fe8242f3b114cd0686dd264fbaad4920
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/1123
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>

rtos: do not use LOG_OUTPUT

LOG_OUTPUT is not intended for general output so use the correct LOG_*
functions instead.

Change-Id: I48d0fe765637024dbafc68f2ea08219d3ff42754
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1104
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

rtos: Fix regression preventing use of first RTOS & clean up rtos_qsymbol()

ThreadX support was not working due to it being first in the list of RTOS - regression.
Auto-detect off, an RTOS was always be marked as successfully detected, even if symbols are not found.
Lines 223-227 were unnecessary as they are done in rtos_try_next()
Added lots of comments
Improved readability by separating: GDB not finding a symbol vs no more symbols being available

Regression caused by patch which was allowed only 52 minutes for review : http://openocd.zylin.com/895

Change-Id: Ib4decb01db595ddb3796837c6d8338ce6b9a91ca
Signed-off-by: Evan Hunter <ehunter@broadcom.com>
Reviewed-on: http://openocd.zylin.com/986
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

jtag: only change state if necessary

All the other drivers will only change the state if required.
This brings all the other drivers inline with this behaviour.

The original issue relates to problems on xscale commit 7989000e0969c1ccf69acbc3ce649a020bc1ee66

Change-Id: Ifc90ec2eef68a70a14f37c00931a07982bfa200c
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1114
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

libusb: idProduct of USB device may be zero

There is no constraint about idProduct in USB spec.  So, pids[i] may be 0 for USB devices.

Change-Id: I19d8974f4e7082e8b7e1f2d33c019ac4e61bc1e2
Signed-off-by: Hsiangkai Wang <hsiangkai@gmail.com>
Reviewed-on: http://openocd.zylin.com/1091
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

hla: enable DWT component and fix watchpoints

The makes sure the DWT component is always enabled so that watchpoints
work as expected.

This does need merging into the existing cortex_m logic, however at the
moment this is non trivial.

Change-Id: Ic6cccd1badb51f70a2ca8ea9ab6923788a94c1bf
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1122
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

flash: add stm32lx loader Hard Fault workaround

An issue has been seen with the stm32lx flash driver that if a
power cycle/reset is applied after a erase, any ram loader will Hard Fault
on execution.

A similar issue is mentioned in the errata for the device.
Two solution's seem to workaround this issue:
1, Handle the exception, this means adding exception vectors to the loader
   and changing the exception address using nvic vtor register.
2. falling back to using slower direct page writes - approx 50% slower.

Using solution 1 would mean restrictions are placed on the loader location.
Solution 2 was chosen mainly as it was simpler too implement.

Change-Id: I429f06b5a3e3b1d8de90071a88a7df11fc9b46a7
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1010
Tested-by: jenkins

flash: reduce stm32lx loader timeout

Waiting 20secs is a bit much excessive, we could probably reduce to 5.

Change-Id: Iffb97adb99c2541a075fe78dbc88a53ddf340214
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1009
Tested-by: jenkins

flash: cleanup stm32lx driver

Handle any leading bytes upto the next 128 byte page, enabling us to safely
use the faster page write.

Rather than use a separate word/byte write to program any trailing bytes
we use a combined write function.

Use memcpy for byte writes and change loader to using bytes.

Change-Id: Ie0164a30388f018dd00e752cf5ff87d4f96ced97
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1008
Tested-by: jenkins

docs: update stm32f1x/stm32f2x driver info

As we use the two ST flash drivers for multiple stm32 variants update the
docs as to which targets use which driver.

Change-Id: I84943ff45482a22b3d3dd8491bb4242d79415939
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/990
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

flash: stm32f2x support write protection

Change-Id: I42662681104bb06e28148229464ae144c4a54538
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/989
Tested-by: jenkins

flash: add stm32f2x flash lock/unlock cmds

Change-Id: I35344cc47fa4f0a49c034455c5abf479faa0344a
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/988
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

build: replace deprecated AM_CONFIG_HEADER with AC_CONFIG_HEADERS

automake-1.13 has now deprecated AM_CONFIG_HEADER, use the correct
AC_CONFIG_HEADERS instead.

Change-Id: I8adaec64cbad7f7318ff69091176c30b707cbb0b
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1117
Tested-by: jenkins
Reviewed-by: Mikko Viitamäki <mikko.viitamaki@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

flash: EFM32 GG/LG page size detection fix

Fixed flash page size detection according to EFM32 GG/LG errata.
MEM_INFO_PAGE_SIZE register containts invalid value in devices with
revision number lower than 18 and should not be used.

Change-Id: Idb2832246efcbbec2fd98a5c458f72a36df386fb
Signed-off-by: Roman D <me@iamroman.org>
Reviewed-on: http://openocd.zylin.com/1116
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

opendous: Inhibit unnecessary state transitions

When current tap state and end state are the same, transitions are added which is not what should happen.
The usbprog driver was already patched like this long time ago.

Change-Id: I339e87156bdc7b5c83c10c14025b749605d3871a
Signed-off-by: Roman Reichel <romanreichel@aol.de>
Reviewed-on: http://openocd.zylin.com/1113
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

flash: EFM32 flash implementation

Limited (no page unprotect, no block writes) implementation of EFM32
flash support. Verified with EFM32 development kit and STLink V2 adapter
using SWD.

Change-Id: I3db2054d9aa628a1fe4814430425db3c9959c71c
Signed-off-by: Roman D <me@iamroman.org>
Reviewed-on: http://openocd.zylin.com/1106
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

doc: Add documentation for the ftdi driver

Change-Id: I1ade2eb187b404141051d9f59ba06e8e6e5d51aa
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1099
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

hla: support setting DCB_DEMCR on resume

This is only minimal support to enable use to catch a Hard Fault in
the stm32l flash bootloader.

Change-Id: I21d6a11893e2f1d173ebff1a651d6f52bf6eec32
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1103
Reviewed-by: Peter Stuge <peter@stuge.se>
Tested-by: jenkins

flash: allow stm32f1x options_write args in any order

Currently we have to supply the arg's to this cmd in a set order, this
change fixes that issue.

Change-Id: I14a15732e1917a91009e1ac14fba39ca1523c739
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/992
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

flash: use correct stm32f1x option read mask

Make sure we do not mask out the BFB2 boot bank bit, as this is used on
the larger XL devices.

Change-Id: Iacfdf874140e409e0c4ca9b9aee8f5c2f90dc9be
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/991
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

stm32f1x: fix stm32f0/f3 broken unlock

The STM32F0 and F3 devices use a different default RDP to configure a
unlocked device, make sure we use that.

Change-Id: I170779461412c4c202c2cfc8d90baedb7e388150
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/984
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

stm32f1x: preserve user option byte data

The user is able to use 2bytes of the options byte data for whatever
purpose they wish. Make sure we preserve this during an option erase/write.

Change-Id: Ibf951b11c59a148e671b1eb47fdc9b4f49ccae15
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/983
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

flash: stm32f1x: write option bytes using the loader

Some debuggers (stlink) can't issue 16 bit writes and have to use a
loader to write flash memory.

Currently the loader is not used for option bytes, causing
stm32x_write_options to fail silently on such hardware.

Fix this by using stm32x_write_block to write option bytes as well.

Change-Id: I49c29d53ab5e162463cb349d4c89bef96467e587
Signed-off-by: Szymon Modzelewski <szmodzelewski@gmail.com>
Reviewed-on: http://openocd.zylin.com/480
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

doc: Clarify the topic field in the commit comment template

Change-Id: Iea1f3b665b011ca3748800048039d3f6b33d7756
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1101
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Tomasz CEDRO <cederom@tlen.pl>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: Spencer Oliver <spen@spen-soft.co.uk>

flash: stm32lx fallback to slow memory writes when no working area

The current stm32lx driver will fail if no working area is
provided - fallback to using slow writes if this is the case.

Change-Id: I92b1535fec4aebc855c63ce2c54b10f168f3c07e
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1007
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

cfg: increase stm32l-discovery working area

This part has 16k ram so make it all available.

Change-Id: Ifeb7bc850bfe4f68d0affb8f6a0931b4327e7257
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1006
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

cfg: stm32l use minimum family ram size for working area

The smallest pert in the family has 10k RAM, so use that as a default
for the working area.

Change-Id: I78be0d14a254c109ac15a7163552c6132f810416
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1005
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

cfg: enable stlink stm32l HSI

Switch to using the internal HSI when a reset init is called, this also
matches the std stm32l cfg.

Read (verify) speed is increased from 17 to 120 KiB/s.

Change-Id: Ic94ba85949ffdefa17b7be45eef14e30f941d107
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1004
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

flash: add new stm32l HD variant

Updated as per latest RM0038 Rev 6.

Change-Id: Ia11309a1cdc3b8986f808b33a5c565bdc0ba58b0
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1003
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

flash: format stm32f2x driver defines

Change-Id: Ie903996368a8d4313df87839d5ba3f2a102796a3
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/987
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

stlink: print target voltage if supported

The stlink/v2 has the ability to check the target voltage if the firmware
is recent enough (>= J13).

As a debugging aid we check the voltage at startup and issue an error if
this is too low to debug reliably.

Change-Id: I98e251f3880e31049c4307051c30bedd3451cf87
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/980
Tested-by: jenkins

stlink: add generic open error routine

Change-Id: I1cd18896ab2a37255471a2d160befed8dd8fb544
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/979
Tested-by: jenkins

helper: improve windows gdb pipe performance

Reducing the select and MsgWaitForMultipleObjects timeouts to 1ms makes
a 2-300+% increase in the step time of gdb when using pipes under windows OS.

Change-Id: Id7e52cfb2b206347a9caea61672885a3e2b186de
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1050
Tested-by: jenkins

gdb: fix correct shutdown when using pipes

50d5441e2a615fb2c44b41a777e4373901f7a2e6 commit added a regression when
using pipes with GDB, OpenOCD would appear to hang when exiting GDB.

This fixes that behaviour so we shutdown correctly.

Change-Id: I9b337c2bdd41b1966de1c7631118257afcbfa6bd
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/993
Tested-by: jenkins

flash: add stm32f2x rev X

Updated as per ST RM0033 rev 5

Change-Id: I627fdab69b440b75b8e4f7c474216538fa5273a4
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1001
Tested-by: jenkins

doc: replace luminary with TI urls's

Change-Id: Ic8a768f5a498e78b96421c6137238593c159fd72
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/970
Tested-by: jenkins

docs: update docs to include info on TI ICDI

Change-Id: I3009920f512f76901d187318ee50284db34ab6f7
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/924
Tested-by: jenkins

icdi: add TI icdi interface

This is the new proprietary interface replacing the older FTDI based adapters.
It is currently fitted to the ek-lm4f232 and Stellaris LaunchPad.

Change-Id: I794ad79e31ff61ec8e9f49530aca9308025c0b60
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/922
Tested-by: jenkins

hla: add ability to configure read/write buffer size

Other adapters (TI ICDI) that use this driver can use a larger
read/write buffer size than the original stlink could.

Change-Id: I9beb7748049097cbe29a2340799c450bd74e199d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/948
Tested-by: jenkins

hla: fix watchpoints not being set

Watchpoints were not being enabled when the hl adapter target was resumed.
This effects both stlink and icdi interfaces.

Change-Id: Ia9f8a9415be97a467cd099b63b6bc9f7f37d0c0d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/931
Tested-by: jenkins

rtos: rename stm32_stlink target to hla_target

Update rtos detection to use the new target name.

Change-Id: I4e55311bcfbc8af55708b43daf0c73b1c8145934
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/923
Tested-by: jenkins

stlink: rename stlink cmd names

As part of the switch to using the hla for the stlink interface we rename
the cmds to a more generic name.

Update scripts to match new names.

Also add handlers for deprecated names.

Change-Id: I6f00743da746e3aa13ce06acfdc93c8049545e07
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/921
Tested-by: jenkins

target: add deprecated target name support

This enables us to change the target name without breaking any
target scripts.

Change-Id: I635f961e573264d3dab2560f3a803ef1986ccfde
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/919
Tested-by: jenkins

stlink: print version info

Print stlink info always rather than just when debug log enabled.

Change-Id: I2a29ef046925200e1c94624280c0b252fab5219a
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/925
Tested-by: jenkins

stlink: use common layout

Even though the stlinkv1 and stlinkv2 use different usb classes they share
the same layout scheme.

Merge the two into a common layout, thus enabling us to support other
adapter layouts.

Change-Id: I7d02c44a7f94ebc7f2cb5428b02ee40294fb430d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/918
Tested-by: jenkins

flash: fm3 mb9bfxx7 mb9bfxx8 support

Patch submitted by Trac #55

Change-Id: I08b0d79d24fe9108ca0bbfbc9b45c60359b6d180
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/981
Tested-by: jenkins

rtos: Add Cortex-R4 support for ThreadX

Change-Id: I0b55af690ed917ca783d90d11dcf012f49792ed7
Signed-off-by: Evan Hunter <ehunter@broadcom.com>
Reviewed-on: http://openocd.zylin.com/994
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

mips_m4k: Fixed mips_m4k_resume code for smp targets

Fix for bug introduced in in mips smp support code
in the  resume logic that is checking for wrong return
value.

Change-Id: Ice3e0069f936b556fecc338ccc12ddba38deeaf6
Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Reviewed-on: http://openocd.zylin.com/1048
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

LPC1788 target configuration file.

Change-Id: I68bd6b7c19d9d1bee13d0921c32b4490e68ab8f2
Signed-off-by: is2t <devel@is2t.com>
Reviewed-on: http://openocd.zylin.com/1002
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

jtag: fix reset_config copy/paste error

As the other arg checks do not OR, it is assumed this is a copy/paste error
from the original code author.

Change-Id: I7dfc7396254a6f558887def951c57dfd4a0e6c2c
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/997
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

stlink: enable connect under reset

Currently if the target supports srst_nogate we wait until target assert_reset
until we get a chance to assert the srst.
However sometimes we will not get this far if the target has already failed
the initial scan.

This has been tested on stm32.

Change-Id: I2c4486942a011534d3e2044788563669bf457b60
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/972
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

jtag: enable connect under reset

Currently if the target supports srst_nogate we wait until target assert_reset
until we get a chance to assert the srst.
However sometimes we will not get this far if the target has already failed
the jtag_examine_chain.

This has been tested on targets that support this behaviour (STM32 and STR9).

Change-Id: Ibcf7584b137b472f31ba6ddd5cd99d848c5508d1
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/971
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

jtag: add connect_type reset_config mode flag

This adds the ability to request to the adapter how we want to connect to
the target, eg. while srst is asserted or not.

This ability can very handy for connecting to unresponsive targets.
A prerequisite is that the target supports srst_nogate.

Change-Id: I0f7c9475160048e8a963e16077754f5403ac8325
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/976
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

cortex_a: Fix target entry state route.

If target is disabled at init, then is examined using 'arp_examine', it
can get to cortex_a8_poll with the target state being unknown.

Change-Id: Ifffb345bf971d275d2eb1912648b29f0a75f6ccc
Signed-off-by: Evan Hunter <ehunter@broadcom.com>
Reviewed-on: http://openocd.zylin.com/954
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

mips_m4k: Added SMP debug support for mips architectures

This change adds smp debug support for mips platforms. The change
leverages the exiting gdb smp support as mentioned in the OpenOCD
documentation for using gdb in smp environemnt. Added commands
smp_on, smp_off, smp_gdb to control the smp mode. The implementation
also provides a way to send Jc packet and toggle the gdb display core
context as well.

Change-Id: I0835a5aed1844b6ebf8291582912f20695346003
Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Reviewed-on: http://openocd.zylin.com/937
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

mips_ejtag: Adding EJTAG 4.x and 5.x as valid versions

This is a minor change to log EJTAG version 4.x and 5.x
as valid versions when debug log is enabled.

Change-Id: Ie20458d033c6d22842cb4a31b56765d4ba2ff123
Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Reviewed-on: http://openocd.zylin.com/936
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

helper: fix code formatting

Change-Id: Ide2d704c9ef4f5563649d5db53bbdd3641868b70
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/995
Tested-by: jenkins

Make NetBSD a recognized system

Change-Id: I7fcb540553da7833a8b6a82335a7296539a8f491
Signed-off-by: Aymeric Vincent <vincent.aymeric@gmail.com>
Reviewed-on: http://openocd.zylin.com/998
Reviewed-by: Peter Stuge <peter@stuge.se>
Tested-by: jenkins

arm: Mis-aligned data issue fix.

Fixes issue with big endian hosts and mis-aligned data on some hosts.
Fixes unaligned access exception on hosts that do not support unaligned
access when debugging some arm targets.

Signed-off-by: Jason Moehlman <jmoehlma@linux-software.com>
Change-Id: I6bc6fb1b3c3565b256674b9ef43ed2afd14f5178
Reviewed-on: http://openocd.zylin.com/996
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>

stlink: format src defines

Change-Id: I7c3fd6e84681e007f1983ad9b8c85369cf9f3ba1
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/978
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

flash: add stm32f42x/stm32f43x support

Other than a larger memory layout these new devices also have an extra
MER1 bit to perform the mass erase.

Change-Id: I7110a05bac95c1707160d1f5622181664291eb4a
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/985
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>

mips: patch mips32_pracc_exec_write()

No function writes to MIPS32_PRACC_PARAM_IN addresses and probably has no much sense.
Any attempt to write to those addresses should be an error.

Change-Id: Iebea5fa9954e2cd56ad34976dd7d25009c6e6388
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/975
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

mips: optimize mips32_pracc_read_regs() code

Current code needs 101 pracc accesses for this function, this code needs 12 less.
There is a singularity in this code, is the only function that restore
a register from param out instead from  pracc stack. Obviously the register
was previously stored at param out. This save 2 pracc accesses.

Change-Id: Ie95b6f983a3198dafc0eab2dd5acc11f871a8d83
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/958
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

mips: optimize mips32_pracc_write_regs() code.

All the the loads are done with lui and ori instructions, there is
no need to save any register, they will be overwritten.
Like in the previous patch, for speed optimization in write code,
same instructions can be saved if the lower half word or the upper
half word is 0.
If the lower half word is 0, it can be loaded with only a lui instruction.
If the higher half word is 0 it can be done with an ori instruction with register 0.
This code saves 10 pracc accesses at a minimum, and 40 at a maximum,
obviously if register 2 to 31 are 0 or a half word is 0
Current code needs 91 pracc accesses.

Change-Id: I892c5b440191d0c7a474c96845d41c373b7fc637
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/957
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: jenkins

mips: optimize write code for speed

All the writes are done by the new function mips32_pracc_write_mem_generic().
The code is similar to the read generic code.
The reuse of register 15 as memory base address saves 3 pracc accesses.
The first write takes 13(12) pracc accesses and for additional writes 3(2).
Loading miniprograms should take 25% less time and loading fastdata transfer
handler code should be over 2x faster.

Change-Id: Ia3b24ba084af33be99da19f00a7fd4d1b291f350
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/956
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

mips: optimize read code for speed

Really nothing new that not explained in previous patches.
The code is expanded as needed, there are no loops in pracc code.
For the first value pracc accesses are reduced from 39 to 16
and for aditional values from 10 to 3.
dump_image should work around 3x faster.

Change-Id: I37c9b13395c09eb52a91f10cdb6cbaedef8ab98b
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/955
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

mips: optimize mips32_pracc_read_u32() function

This function is highly optimized, there is not much to
improve.
Loading the base address for pracc access with the new
defined MIPS32_PRACC_BASE_ADDR saves one instruction.
The memory address is loaded in too steps. First the upper
address is loaded. The lower address is passed as an offset in
the memory load instruction.
The offset is signed, if the lower address is in the range of
0x8000 to 0xffff the offset is a negative value, and the upper
address must be incremented by 1.
Pracc accesses are now 12 instead of 14.

Change-Id: I286945b240ed5c5d5cc540780a41a8a5fa075da3
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/952
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

mips: optimize CP0 read/write code

MIPS32_PRACC_BASE_ADDR is defined as 0xFF200000. Now is
possible to load the base address with a lui instruction and
only one pracc access.
Offsets to the pracc code addresses are defined to simplify the code
and probably make it a bit more readable or self-explained.

Change-Id: I853dd2d7fad52745931cc6e6be68c0ae156d897e
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/951
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: jenkins

mips: code clean up in mips_m4k_debug_entry() function

The function mips_ejtag_read_debug() is defined in mips_ejtag.c
and is called only by mips_m4k_debug_entry() for reading the
CP0 debug register. The comment in this function is obviously wrong.
There is a generic function to read CP0 registers with similar code.
A call to mips32_cp0_read() should work in the same way.
The purpose of reading the debug register is to test if the DSS
bit is set and clear the SSt bit.
It is faster and easier if the SSt bit is cleared without any check.
Remark: DSS bit set only means that a debug single-step exception
ocurred, but it is not possible to step over a sdbbp instruction,
in this case DSS will not be set and the SSt bit not cleared by code.
Resume command at another address will step, so really the behavior
is not the same.

Change-Id: Ibd35f80e0f7669976d96f4ed813830cecf587971
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/950
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

mips: optimize mips_ejtag_step_disable() code

The code is a bit large compared to mips_ejtag_step_enable().
With the mips32 xori instruction the code can be
reused.
The number of pracc accesses are reduced from 18 to 7.

Change-Id: If3974ebd64da4461c22b089796646990e68e1b72
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/944
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

Pic32mx.cfg: Change system clock to 8Mhz after reset-init.

As for openocd 0.6.0-rc2 the function mips32_pracc_fastdata_xfer()
should now work at a scan frequency up to 1200Khz.
Mainly usefull to increase programming speed.

Also verify_image should be slightly faster.

Change-Id: I1e9b2be73690a4597e2f6ba069c1205026850f07
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/805
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

doc: update to new sourceforge git url

The new sourceforge platform also supports http access, so use that rather
then repo.or.cz.

Change-Id: Ica89d9475847a2095c179b240053145795549802
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/982
Tested-by: jenkins

Revert "mpsse: Always perform a general reset of the MPSSE in mpsse_open()"

This reverts commit 452248af1d06cb1140b85f53ef4fdee1c746d807. This change
breaks all non-high speed adapters. The patch was not tested and did not get
any review.

Change-Id: Ib38fd242a202fd7c5a8711d9f857cd8f586df44e
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/973
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

rtos: Fix error in reading the current thread in ChibiOS/RT

Commit c4ab127b4069e20e introduces a copy&paste error which affects
the detection of the current thread.

As a result, the stack of the current thread won't be detected
correctly in most cases.

Change-Id: Ib46b8f64be8053d7e9103f427c66796963214419
Signed-off-by: Matthias Blaicher <matthias@blaicher.com>
Reviewed-on: http://openocd.zylin.com/974
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

target: add async algorithm timeout

An issue was observed when using an async algorithm with a target that had
not been previously reset beforehand. The target would enter a infinite
loop within target_run_flash_async_algorithm.

Add a timeout that will at least prevent this issue from happening. and also
suggest the user resets the target.

Change-Id: I5277e0d64e252d3d353e8d5bc9889a37fdc63060
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/949
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

ARM v4/v5 target files: mrc and mcr help information is incorrect.

The order of the mrc/mcr command matches the ARM Architecture Reference
Manual.  This patch corrects the help information for mrc/mcr.

Change-Id: I1f0e6a628a3644124591a6aa291b8a58cfd93b44
Signed-off-by: Karl Kurbjun <kkurbjun@gmail.com>
Reviewed-on: http://openocd.zylin.com/914
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

cortex: autostep correctly handle user breakpoint

If we halt due to a breakpoint make sure that we do not remove it during a
step, only remove breakpoints we have created.

Change-Id: I060168e54e53637d4fbf3cbcf62072efdb353807
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/947
Tested-by: jenkins

cortex_m: Fix single stepping will not return to debug mode sometimes

This occurs when stepping past a breakpoint on a even address with
maskisr option set to auto

With -d3 the following log message appears in this case:

"Debug : Interrupt handlers didn't complete within time,
 leaving target running"

Cause : Given a breakpoint is set on the lower half word and the PC is on
the upper half word. When another breakpoint is now set on the current PC
then resuming the core will not result in a break on the newly set
breakpoint. This has been observed on a STM32F1x, STM32F2x (CM3) but not
on a STM32F0x (CM0). It's not clear if this is a STM32F1/F2 only or a
general CM3 problem.

Change-Id: I384813f3bfdf935373b5e23cdb2d7f243c70cc00
Signed-off-by: Peter Horn <peter.horn@bluewin.ch>
Reviewed-on: http://openocd.zylin.com/864
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

Added support for NXP LPC1850 Microcontroller

Added a new configuration file for LPC18xx based boards, such as
HitexLPC1850RevA Evaluation Board, and all other based on the
same microcontroller by NXP.

Change-Id: I68c3827be535b6d09a5c70b6d57191937d00354d
Signed-off-by: Gianluca Renzi <gianlucarenzi@eurekelettronica.it>
Reviewed-on: http://openocd.zylin.com/930
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

Generic LPC1850 board w/ SPIFI flash.

This config file is intended as an example of how to
use the lpcspifi flash driver, but it should be functional
for most LPC1850 boards utilizing SPIFI flash.

Change-Id: I855854282336701fd210134497ce014017f3aaec
Signed-off-by: Gianluca Renzi <gianlucarenzi@eurekelettronica.it>
Reviewed-on: http://openocd.zylin.com/929
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

Added support for SPI Flash Winbond W25Q64CV

Added in spi device table SPI Flash Winbond W25Q64CV 64Mbit
Its Device ID 0x001740ef is the same as Spansion S25FL064K (may
be a clone?)

Change-Id: I3cdbd182a0ccde75c78684cb9d54c76059bf34e0
Signed-off-by: Gianluca Renzi <gianlucarenzi@eurekelettronica.it>
Reviewed-on: http://openocd.zylin.com/928
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

cortex_m: fix define formatting

Change-Id: Ibdec882b2afc7e16f2361f86715463e030a54964
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/963
Tested-by: jenkins

rtos: Make ChibiOS code aware of endiness

The ChibiOS code was derived from other RTOS support code which
does not honor the target vs. host endiness.

The other RTOS code still needs to be fixed.

Change-Id: Idf42cfaa30945289bf1756ad6491fff84913eda9
Signed-off-by: Matthias Blaicher <matthias@blaicher.com>
Reviewed-on: http://openocd.zylin.com/962
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

rtos: Add FPU detection to ChibiOS/RT

The stacking of ChibiOS/RT depends on the usage of an FPU. If the
FPU is enabled the FPU registers are also saved on context switch.

This patch adds automatic detection of FPU for armv7m targets.

Note: With this patch, openocd will only output an error message
      warning that the FPU is enabled.

      For further FPU support, the correct stacking information
      also needs to be added.

Change-Id: I0984cbd9180f247ba2fa610e74a6413cc54239ea
Signed-off-by: Matthias Blaicher <matthias@blaicher.com>
Reviewed-on: http://openocd.zylin.com/961
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

rtos: Fix wrong ReadyList lookup in ChibiOS

We already have the address of the ReadyList provided by gdb.
It is wrong to resolve that address a second time and it only
works by accident.

Change-Id: I82fa2360931c416290cd7f83e1883f86f90dedc2
Signed-off-by: Matthias Blaicher <matthias@blaicher.com>
Reviewed-on: http://openocd.zylin.com/959
Reviewed-by: Joel Bodenmann <joel@unormal.org>
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

fix memory leaks

if add_connection() fails, memory allocated in copy_command_context() is lost.

Signed-off-by: Sergey Borshch <sb-sf@users.sourceforge.net>
Change-Id: I91a2757f29612038031eb8953100faa3b850d3a6
Reviewed-on: http://openocd.zylin.com/836
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

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