openocd.git
5 years agotarget/stm8: add missing destroy_reg_param() 14/4814/2
Tomas Vanek [Tue, 18 Dec 2018 16:48:43 +0000 (17:48 +0100)]
target/stm8: add missing destroy_reg_param()

Change-Id: Ibd8a423a4400226790cfbb9a6f113b7ea762c436
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4814
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Ake Rehnman <ake.rehnman@gmail.com>
5 years agodrivers/sysfsgpio: fix usage messages 33/4833/2
Antonio Borneo [Fri, 4 Jan 2019 17:08:20 +0000 (18:08 +0100)]
drivers/sysfsgpio: fix usage messages

The notation "(tck tms tdi tdo)* " is incorrect, because it means the
quadruple of gpio can be repeated on the command-line.
The correct syntax of the command requires instead to provide either
all the four gpio numbers (in order to set the values) or to pass an
empty command-line (to dump the values previously set).

Change the .usage field to "[tck tms tdi tdo]".
Change similarly the corresponding .usage field for SWD command.
Add the .usage field for the commands that individually set each gpio.

Change-Id: If5b3c618097b71dfe7fcf988fb3c1499ae03a6d5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4833
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
5 years agoAdd flash support for SiFive's Freedom E platforms 56/4656/7
Tim Newsome [Tue, 1 Jan 2019 20:37:34 +0000 (12:37 -0800)]
Add flash support for SiFive's Freedom E platforms

Valgrind and Clang Static Analyzer have no complaints about this change.

Change-Id: I7757615ec52448372bdc57729cdf97c7016d97e8
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/4656
Tested-by: jenkins
Reviewed-by: Philipp Guehring <pg@futureware.at>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
5 years agostlink_usb: Submit multiple USB URBs at once to improve performance 84/4484/5
Austin Phillips [Sat, 7 Apr 2018 06:06:03 +0000 (16:06 +1000)]
stlink_usb: Submit multiple USB URBs at once to improve performance

Commands to stlink devices are typically comprised of multiple
transactions with each transaction completing before moving to the next.
This change allows for multiple USB transactions to be issued at once
followed by a check that all transactions completed successfully.  This
improves performance on some machines where there is a large turn-around
time between USB transfers such as is seen on some virtual machines.

This change is only supported when compiled with libusb1 as libusb1
supports and asynchronous interface.

Multi-transaction queueing introduced in this change paves the way for
improving speed of other transactions in the future such as memory and
register reads where multiple USB transactions in succession are
required to complete a command.  Multiple USB transactions can be
submitted at once using jtag_libusb_bulk_transfer_n function.

Change-Id: I924e049217a789ef445b14e00aa1983576970fbf
Signed-off-by: Austin Phillips <austin_phillips@hotmail.com>
Reviewed-on: http://openocd.zylin.com/4484
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
5 years agolibusb: add debug message on adapter not found due to wrong serial 01/4701/3
Antonio Borneo [Thu, 4 Oct 2018 09:39:50 +0000 (11:39 +0200)]
libusb: add debug message on adapter not found due to wrong serial

When few adapters of the same type are in use, the serial string is
the way to select the right one.
Currently a serial string that does not match any of the connected
adapters will just fail the open, without specific information to
track the issue.

Add a specific message to highlight that the open failure is caused
by a serial mismatch.

Change-Id: I5cb77f1045cc746e532d395b2e5ced40a23ab638
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4701
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
5 years agojtag/drivers/usb_common: return oocd error values 99/4699/3
Antonio Borneo [Thu, 4 Oct 2018 16:24:25 +0000 (18:24 +0200)]
jtag/drivers/usb_common: return oocd error values

Where possible, keep the same style for returning error.

Change-Id: I3a04220c0b9f129a36e9fe83038b7c19dd57fe61
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4699
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
5 years agolibusb0: return oocd error values 98/4698/3
Antonio Borneo [Thu, 4 Oct 2018 15:54:19 +0000 (17:54 +0200)]
libusb0: return oocd error values

Commit d1b74376336814266236054f925a9964b87dd8a5 fixes libusb1 to
return OpenOCD error values instead of negative errors in Linux
kernel's style.
The same fix should be applied to libusb0 too.

Fix return value of libusb0 to uniform it to OpenOCD style.

Change-Id: I68478c29c91c6be720074f58c432fe51477e03ed
Fixes: d1b743763368 ("libusb: return oocd error values")
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4698
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
5 years agotarget/aarch64: add support for multi-architecture gdb 55/4755/2
Antonio Borneo [Thu, 1 Nov 2018 14:08:21 +0000 (15:08 +0100)]
target/aarch64: add support for multi-architecture gdb

GDB can be built for multi-architecture through the command
./configure --enable-targets=all && make
Such multi-architecture GDB requires the target's architecture to
be selected either manually by the user through the GDB command
"set architecture" or automatically by the target description sent
by the remote target (i.e. OpenOCD).

Commit e65acd889c61a424c7bd72fdee5d6a3aee1d8504 ("gdb_server: add
support for architecture element") already provides the required
infrastructure to support multi-architecture gdb.

aarch64-linux-gnu-gdb 8.2 uses "aarch64" as default architecture,
but also supports the value "aarch64:ilp32" and all the values
supported by arm-none-eabi-gdb.
These values can be displayed on arm gdb prompt by typing
"set architecture " followed by a TAB for autocompletion.

Set the gdb architecture value for aarch64 target to "aarch64".

Change-Id: I63e9769f47d8e73f048eb84fa73e082dd1c8e52c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4755
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
5 years agotarget/arm: add support for multi-architecture gdb 54/4754/2
Antonio Borneo [Thu, 1 Nov 2018 13:50:27 +0000 (14:50 +0100)]
target/arm: add support for multi-architecture gdb

GDB can be built for multi-architecture through the command
./configure --enable-targets=all && make
Such multi-architecture GDB requires the target's architecture to
be selected either manually by the user through the GDB command
"set architecture" or automatically by the target description sent
by the remote target (i.e. OpenOCD).

Commit e65acd889c61a424c7bd72fdee5d6a3aee1d8504 ("gdb_server: add
support for architecture element") already provides the required
infrastructure to support multi-architecture gdb.

arm-none-eabi-gdb 8.2 uses "arm" as default architecture, but also
supports the following values: "arm_any", "armv2", "armv2a",
"armv3", "armv3m", "armv4", "armv4t", "armv5", "armv5t", "armv5te",
"armv5tej", "armv6", "armv6k", "armv6kz", "armv6-m", "armv6s-m",
"armv6t2", "armv7", "armv7e-m", "armv8-a", "armv8-m.base",
"armv8-m.main", "armv8-r", "ep9312", "iwmmxt", "iwmmxt2", "xscale".
These values can be displayed on arm gdb prompt by typing
"set architecture " followed by a TAB for autocompletion.

Set the gdb architecture value for all arm targets to "arm".

Change-Id: I176cb89878606e1febd546ce26543b3e7849500a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4754
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
5 years agotarget/stm8: add support for multi-architecture gdb 53/4753/2
Antonio Borneo [Thu, 1 Nov 2018 11:07:03 +0000 (12:07 +0100)]
target/stm8: add support for multi-architecture gdb

GDB can be built for multi-architecture through the command
./configure --enable-targets=all && make
Such multi-architecture GDB requires the target's architecture to
be selected either manually by the user through the GDB command
"set architecture" or automatically by the target description sent
by the remote target (i.e. OpenOCD).

Commit e65acd889c61a424c7bd72fdee5d6a3aee1d8504 ("gdb_server: add
support for architecture element") already provides the required
infrastructure to support multi-architecture gdb.

The gdb patches for stm8 are still not merged in the official
repository and are temporarily hosted in
https://stm8-binutils-gdb.sourceforge.io/
The latest patch set
stm8-binutils-gdb-sources-2018-03-04.tar.gz
define only one possible value ("stm8") for this architecture; it
can be displayed typing "set architecture " followed by a TAB for
autocompletion in gdb for stm8.

Set the gdb architecture value for stm8 to "stm8".

Change-Id: I643ceba662de46cecf061d1dc672b9178a077f1b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4753
Tested-by: jenkins
Reviewed-by: Ake Rehnman <ake.rehnman@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
5 years agoarmv7m: always set xPSR.T=1 when starting an algorithm 58/4658/7
Cody P Schafer [Mon, 27 Aug 2018 14:50:46 +0000 (10:50 -0400)]
armv7m: always set xPSR.T=1 when starting an algorithm

xPSR.T sets the processor to Thumb mode when set to 1. ARMv7-M only
supports execution of Thumb instructions, so it must always be set to 1.

If xPSR.T is set to 0 on armv7m, a usage fault is generated when a
instruction execution is attempted.

On armv7m, issuing a reset causes the vector table to be examined. PC
and xPSR.T  are loaded from the vector table at byte offset 4. xPSR.T is
taken from the least significant bit this value, PC from the remaining
bits.  This occurs even with `reset halt`, as the reset itself causes
this load to occur without the execution of any instructions.

As a result of this, following a reset with a "bad" value programmed in
the vector table, openocd would be unable to run algorithms on the
target, as running them would immediately result in a usage fault due to
xPSR.T being unset (0).

Allow algorithms to run regardless of the content of the vector table by
explicitly setting xPSR so that xPSR.T=1 prior to executing an
algorithm. One can think of this as openocd more closely emulating a
reset or branch instruction in executing it's algorithms.

Ticket: https://sourceforge.net/p/openocd/tickets/203/
Signed-off-by: Cody P Schafer <openocd@codyps.com>
Change-Id: I4dc3427ab195d06c3fd780ea768027fefccc4c28
Reviewed-on: http://openocd.zylin.com/4658
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
5 years agoicepick.cfg: add cancel reset bit to TAP register writes 89/4789/2
Edward Fewell [Wed, 5 Dec 2018 23:54:42 +0000 (17:54 -0600)]
icepick.cfg: add cancel reset bit to TAP register writes

The Agama family of devices (CC26x2/CC13x2) required an
additional bit to be set when adding the core's TAP into
the scan chain. The cancel reset bit 0x10000 tells the
ICEPick to take the bus out of reset so that the other
bits will take effect. This bit is a NOP on other devices
and ICEPicks, so the change shouldn't adversely affect
other devices.

Change-Id: I9245eef0936ea7eea28ae84ab5e8ce05fa63af40
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/4789
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
5 years agodrivers: xds110: Add support for XDS110 stand-alone probe 93/4793/2
Edward Fewell [Thu, 6 Dec 2018 20:47:29 +0000 (14:47 -0600)]
drivers: xds110: Add support for XDS110 stand-alone probe

The XDS110 stand-alone version has the ability to supply
voltage to the target board via it's AUX FUNCTIONS port.
Added command to enable setting the voltage on the XDS110
stand-alone.

Change-Id: I2f21c4a3d15ed99e649f3a83973c5e724c4bfeb6
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/4793
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
5 years agoHACKING: add note about refs/for/master 06/4806/4
Jerome Forissier [Fri, 14 Dec 2018 15:31:17 +0000 (16:31 +0100)]
HACKING: add note about refs/for/master

The fact that one needs to always push contributions to a single
remote reference (refs/for/master) might seem odd to people unfamiliar
with Gerrit. GitHub, for instance, hosts personal repositories where
developers typically create topic branches for each contribution and
use a proprietary mecanism to request a review (the "pull request").
More generally, one normally does not expect to be able to push
non-fast-forwarding stuff to a remote branch.

This commit adds a clarifying note to the patch guidelines.

Change-Id: Ia750b815b82b18e92b6109c07f451000dcbecf9b
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-on: http://openocd.zylin.com/4806
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
5 years agoHACKING: replace refs/publish/master with refs/for/master 10/4810/3
Jerome Forissier [Mon, 17 Dec 2018 14:00:16 +0000 (15:00 +0100)]
HACKING: replace refs/publish/master with refs/for/master

refs/publish/master is deprecated and gives a warning in newer Gerrit.
Replace with refs/for/master.

Change-Id: I56871cc6e80c014ba81f4458230cd67dc318ecb3
Suggested-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-on: http://openocd.zylin.com/4810
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
5 years agoNOR: lpc2000 Add support for LPC84x devices 84/4684/10
Rod Boyce [Sun, 16 Dec 2018 17:41:39 +0000 (17:41 +0000)]
NOR: lpc2000 Add support for LPC84x devices

These devices differ from LPC8xx devices in that they have a different
IAP entry point, but everything else is the same.  Using Tcl to pass
different IAP entry point.
no new Clang analyser warnings and no new build sanitizers issues.

Change-Id: I2d654dd250f416e74262c0228cad8713a283402f
Signed-off-by: Rod Boyce <developer@teamboyce.co.uk>
Reviewed-on: http://openocd.zylin.com/4684
Reviewed-by: Jean-Christian de Rivaz <jcamdr70@gmail.com>
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
5 years agoflash: nor: ath79: remove base calculation 21/4821/3
Oleksij Rempel [Wed, 26 Dec 2018 11:47:11 +0000 (12:47 +0100)]
flash: nor: ath79: remove base calculation

Currently it is impossible to flash ELF with correct offsets. The reason
is a bogus offset calculation extracted from base.
Since any other spi drivers do not care about base, do the same for
ath79 as well.

Change-Id: I9e46e01c9e7a709c2d07da9203c634f302603afd
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/4821
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
5 years agoflash/nor/nrf5: set correct timeout for nvmc operations 22/4822/2
Jānis Skujenieks [Wed, 26 Dec 2018 13:09:10 +0000 (15:09 +0200)]
flash/nor/nrf5: set correct timeout for nvmc operations

Longest erase all FLASH for nRF5 series is 295.3 ms for nRF52832.
Timeout period now is set to 340 ms (295.3 + 15%)

Change-Id: Iae00ed7b634f111b9798db11e35e4e066d4aaa95
Signed-off-by: Jānis Skujenieks <janis.skujenieks@gmail.com>
Reviewed-on: http://openocd.zylin.com/4822
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
5 years agotarget/arm_cti : export CTI APPPULSE and INACK register 15/4815/2
Tarek BOUCHKATI [Thu, 20 Dec 2018 18:10:17 +0000 (19:10 +0100)]
target/arm_cti : export CTI APPPULSE and INACK register

this permits the full control of CTI from config files

Change-Id: Ia27ac8e12e08ec72da05f26dcbd81d24fa1a0f6f
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/4815
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
5 years agotarget/arm_cti: add debug message when an incorrect CTI register name is used 16/4816/2
Tarek BOCHKATI [Thu, 20 Dec 2018 18:33:26 +0000 (19:33 +0100)]
target/arm_cti: add debug message when an incorrect CTI register name is used

the patch also contains some typo fixes

Change-Id: Ia4267036068455144cdcbfdffed15518d48f445e
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/4816
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
5 years agocommand: Log the failed command name 08/4808/3
Jean-Christian de Rivaz [Sun, 16 Dec 2018 19:15:33 +0000 (20:15 +0100)]
command: Log the failed command name

Change-Id: I03938a845110002755636a9514b17a213bf1cc72
Signed-off-by: Jean-Christian de Rivaz <jcamdr70@gmail.com>
Reviewed-on: http://openocd.zylin.com/4808
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
5 years agoAdd LPC8Nxx and NHS3xx support. 15/4515/17
Jean-Christian de Rivaz [Wed, 2 May 2018 16:07:28 +0000 (18:07 +0200)]
Add LPC8Nxx and NHS3xx support.

Change-Id: I0bdbca8dd9b234aca355230af7269463c9f70bd1
Signed-off-by: Jean-Christian de Rivaz <jcamdr70@gmail.com>
Reviewed-on: http://openocd.zylin.com/4515
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
5 years agoadd w600 support 01/4801/6
Simon Qian [Sun, 9 Dec 2018 16:58:41 +0000 (00:58 +0800)]
add w600 support

w600 is a wifi soc from winner micro(www.winnermicro.com).

Change-Id: Ib8ccd6e52baefca6547fb97d29db75db0ee73948
Signed-off-by: Simon Qian <versaloon@simonqian.com>
Reviewed-on: http://openocd.zylin.com/4801
Tested-by: jenkins
Reviewed-by: yichen <wdyichen@wdyichen.cn>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
5 years agoflash/nor/spi: add adesto AT25DF081A 02/4802/2
Tomas Vanek [Mon, 10 Dec 2018 20:11:49 +0000 (21:11 +0100)]
flash/nor/spi: add adesto AT25DF081A

8Mbit SPI flash on SAM D21 Xplained board

Change-Id: Iec087f5d889c1cbdd4fed90863e73511f6101cec
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4802
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
5 years agotarget: allow moving and resizing working area on running target 97/4797/3
Tomas Vanek [Fri, 7 Dec 2018 17:45:06 +0000 (18:45 +0100)]
target: allow moving and resizing working area on running target

target configure -work-area-xxx calls target_free_all_working_areas()
and sets the desired new parameter. Without this change the working area
does not get reallocated if it has been allocated before.
target_free_all_working_areas() results in work area containing one block
marked as free.

Completely free working area in target_free_all_working_areas()

Change-Id: I79c681082f32f2a96a2b40eb3b8751e427549693
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4797
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
5 years agotarget: move all working_area functions to one block 96/4796/2
Tomas Vanek [Fri, 7 Dec 2018 17:34:39 +0000 (18:34 +0100)]
target: move all working_area functions to one block

The block of code moved without any changes

Change-Id: I70b82dc3315dcc3f34de0537b362bee230007d02
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4796
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
5 years agotarget/cortex_m: fix cortex_m reset_config help and check for syntax error 95/4795/2
Tomas Vanek [Fri, 7 Dec 2018 16:51:49 +0000 (17:51 +0100)]
target/cortex_m: fix cortex_m reset_config help and check for syntax error

Remove option 'srst' which is not recognized from on-line help and texi.
Check parameter and return syntax error if wrong option is entered.

Change-Id: I87daa423a9f53193a0b015080594820b933628f5
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4795
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
5 years agotarget/cortex_m: do not use VECTRESET on Cortex-M0, M0+ and M1 94/4794/4
Tomas Vanek [Fri, 7 Dec 2018 16:00:12 +0000 (17:00 +0100)]
target/cortex_m: do not use VECTRESET on Cortex-M0, M0+ and M1

Cortex-M0, M0+ and M1 do not support VECTRESET bit in AIRCR.
Without this change the 'reset' command silently fails if VECTRESET
is requested.

Detect these cores, show warning if VECTRESET is about to use
and use SYSRESETREQ instead.

Change-Id: Ief174373e3ef0e6b287c57911c0aca4dfa8209f2
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4794
Tested-by: jenkins
Reviewed-by: Jean-Christian de Rivaz <jcamdr70@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
5 years agotarget: armv8: Add TARGET_HALTED check for gdb connect 58/4758/3
Liming Sun [Mon, 5 Nov 2018 15:26:05 +0000 (10:26 -0500)]
target: armv8: Add TARGET_HALTED check for gdb connect

This commit adds TARGET_HALTED check in armv8_get_core_reg32()
and armv8_set_core_reg32() to void a crash issue when gdb connects
but fails to halt the ARM core. Similar logic can be found in
armv8_get_core_reg() and armv8_set_core_reg().

Below is the call stack information of this case when gdb connects.

(gdb) bt
    regnum=regnum@entry=0, dpm=0x990110) at src/target/armv8_dpm.c:657
    r=0x9c7240, regnum=0, mode=<optimized out>) at src/target/armv8_dpm.c:974
    at src/target/armv8.c:1487
    packet=0x8ec8e0 <gdb_packet_buffer.9962> "g",
    packet_size=<optimized out>, connection=<optimized out>)
    at src/server/gdb_server.c:1200
    at src/server/gdb_server.c:3180
    command_context=command_context@entry=0x935010)
    at src/server/server.c:566
...

Change-Id: I159837b533f110998184f910a0abe48409bd58f1
Signed-off-by: Liming Sun <lsun@mellanox.com>
Reviewed-on: http://openocd.zylin.com/4758
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
5 years agotarget/cortex_a: enable DSCR_HALT_DBG_MODE during examine 83/4783/2
Antonio Borneo [Mon, 3 Dec 2018 17:50:43 +0000 (18:50 +0100)]
target/cortex_a: enable DSCR_HALT_DBG_MODE during examine

Arm architecture reference manual DDI0406C reports at page 2024 in
table C3-1 the processor behaviour on debug events depending on
the debug-mode (none, monitor or halt), mode selected through the
bits MDBGen and HDBGen in DSCR register.

The halt request is served independently from the debug-mode. Thus
it's useless to enable the halt debug-mode in cortex_a_halt() by
setting the bit HDBGen (macro DSCR_HALT_DBG_MODE).

On the other side, halting for a breakpoint, a watchpoint or a
vector catch requires being in halt debug-mode.
Today HDBGen is set only in cortex_a_halt(), so we are forced to
halt the core at least once before it can be halted for hitting a
breakpoint/watchpoint/vector-catch. This is annoying since there
is no need to halt the target to set a HW breakpoint.

Move in cortex_a_init_debug_access() the selection of the halt
debug-mode, so the mode is set during examine.
To prevent a misconfigured hardware breakpoint/watchpoint/vector
catch to halt the target when OpenOCD has already quit, return to
debug-mode none at OpenOCD exit.

Change-Id: I68a1c51de3572ca1b89e90caf7eb20374268e926
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4783
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
5 years agoadi_v5_jtag: fix build break when open DEBUG_WAIT macro 04/4804/2
YanLin Zhu [Fri, 14 Dec 2018 05:17:15 +0000 (13:17 +0800)]
adi_v5_jtag: fix build break when open DEBUG_WAIT macro

DEBUG_WAIT is useful to debug adi_jtag issue,
and the WCR register is replaced by DLCR for DP registers update
in commit 150b7d26f213398d717bf46744811b48834a3744.

Change-Id: I3faa9ea8a6adacd3d5275e40382801da731db32f
Signed-off-by: YanLin Zhu <zhuyanlin@pinecone.net>
Reviewed-on: http://openocd.zylin.com/4804
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Christopher Head <chead@zaber.com>
5 years agohelper/startup.tcl: fix execution stack frame of wrapped commands 31/4731/2
Antonio Borneo [Mon, 22 Oct 2018 07:06:50 +0000 (09:06 +0200)]
helper/startup.tcl: fix execution stack frame of wrapped commands

The OpenOCD commands that have been wrapped with 'ocd_bouncer' are
executed within two levels of nested proc's:
# see register_command_handler() in src/helper/command.c
proc my_command {args} {eval ocd_bouncer my_command $args}

# see ocd_bouncer in src/helper/startup.tcl
proc ocd_bouncer {name args} {
... [eval ocd_my_command $args] ...
}
This causes the stack frame of 'ocd_my_command' to be the same one
of proc 'ocd_bouncer', thus two levels below the stack frame of the
caller of 'my_command'. This is an issue with commands that receive
a variable by name and have to resolve them to access the value.

E.g. the command
<target> mem2array arrayname bitwidth address count
is wrapped; it receives the name of the array but fails to resolve
it in the current stack frame. Instead, the commands
mem2array arrayname bitwidth address count
ocd_<target> mem2array arrayname bitwidth address count
are not wrapped and can directly access the array because they share
the same stack frame of the caller.
Same situation with the symmetric commands 'array2mem'.

How to test:
within a telnet connection, run the following set of commands,
eventually replacing the address 0x08000000 with a valid readable
address of your <target>,
unset -nocomplain v1 v2 v3
info vars v?
mem2array v1 32 0x08000000 1
<target> mem2array v2 32 0x08000000 1
ocd_<target> mem2array v3 32 0x08000000 1
info vars v?
and notice that only v1 and v3 are now allocated. The array v2 has
been allocated in the temporarily stack frame of proc ocd_bouncer,
together with its local variables, and then lost when proc ended.

Fixed by executing the wrapped commands with the command 'uplevel'
instead of 'eval'. The amount of levels to skip is checked to avoid
errors in the unusual case 'ocd_bouncer' is called directly without
the first level of wrapper.

Change-Id: Iff90fb8921faf9b5ab04f61062a530578cc20d78
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4731
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
5 years agoflash/nor/core: Fix chunk size calculation in default_flash_mem_blank_check 85/4785/2
Bohdan Tymkiv [Wed, 5 Dec 2018 09:57:26 +0000 (11:57 +0200)]
flash/nor/core: Fix chunk size calculation in default_flash_mem_blank_check

Slow version of blank check procedure reads target memory sector-by-sector
using 1 KB chunks. Due to bug in chunk size calculation algorithm the actual
size of the chunk is always 1 KB even if sector size is smaller.
This causes out-of-boundary read of the last sector.

Steps to reproduce:
1) Use target with small sectors (e.g. psoc6 with 512-byte sectors)
2) set WORKAREASIZE_CM0 0
3) flash erase_check 1

Running slow fallback erase check - add working memory
Info : SWD DPIDR 0x6ba02477
Error: Failed to read memory at 0x14008000
unknown error when checking erase state of flash bank #1 at 0x14000000
Bank is erased

Change-Id: I03d0d5fb3a1950ae6aac425f5e24c7fd94b38325
Signed-off-by: Bohdan Tymkiv <bhdt@cypress.com>
Reviewed-on: http://openocd.zylin.com/4785
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
5 years agoflash/esirisc: refactor register write protection 91/4791/4
Steven Stallion [Thu, 6 Dec 2018 19:10:01 +0000 (13:10 -0600)]
flash/esirisc: refactor register write protection

This patch removes use of register write protection in protect() and
protect_check() now that Change 4765 has merged.

Change-Id: I42c429dc283c5b53989a6b98ebfc58214274ff16
Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/4791
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
5 years agoesirisc: support eSi-Trace 80/4780/7
Steven Stallion [Thu, 25 Oct 2018 02:29:03 +0000 (21:29 -0500)]
esirisc: support eSi-Trace

This patch adds support for instruction tracing to eSi-RISC targets. The
command interface is borrowed heavily from ETM; eSi-Trace uses a less
sophisticated model for tracing, however the setup and usage is similar.
This patch also cleans up the command interfaces of the other esirisc
command groups and adds additional debugging information to log messages
when dealing with CSRs.

This patch "finalizes" support for 32-bit eSi-RISC targets.

Change-Id: Ia2a9de79a3c7c066240b5212721fb1b7584a9a45
Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/4780
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
5 years agofix cc32xx related changes 92/4792/2
Jiri Kastner [Thu, 6 Dec 2018 20:23:25 +0000 (21:23 +0100)]
fix cc32xx related changes

original CC3200 launchpad works only with ti-icdi driver
which stopped to work after merging to master commit
d02de3a8a92091b9761ebaf44dff1a71f5b2edcb

Change-Id: I247b5d99831fa744de1fdc5b8a7cffdf49fe953c
Signed-off-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-on: http://openocd.zylin.com/4792
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
5 years agoarmv7a_mmu: s/LOG_ERROR/LOG_WARNING/ on address translation failure 02/4602/3
Antonio Borneo [Fri, 13 Jul 2018 07:01:47 +0000 (09:01 +0200)]
armv7a_mmu: s/LOG_ERROR/LOG_WARNING/ on address translation failure

When GDB analyses the status of the target it try to guess the
current stack frame and issues few memory read.
E.g. on ARM targets GDB uses R11 value as a potential frame-pointer
and reads at the address pointed by R11.
The address of such memory read is not always valid and can trigger
an address translation failure.

Replace LOG_ERROR with LOG_WARNING in case the virtual address does
not have a hit in TTB; print the virtual address in the warning
message and discriminate the two identical messages with [1]/[2].

Change-Id: I288b8cd26bec2543c4f1c16b7c06dc47d5d843d1
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4602
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
5 years agolibusb0: add compatibility define for transfer type bulk 00/4700/3
Antonio Borneo [Mon, 8 Oct 2018 15:41:06 +0000 (17:41 +0200)]
libusb0: add compatibility define for transfer type bulk

For compatibility with libusb1, define LIBUSB_TRANSFER_TYPE_BULK
in libusb0.
Remove the #ifdef HAVE_LIBUSB1 in jtag/driver/aice

This also fixes a compile error in jtag/drivers/openjtag with
libusb0.

Change-Id: I827b77eac10216759eb31aab461b2b63cabaf195
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4700
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
5 years agoflash/nor: Add support for sector erase in stm32l4x.c for L4+ family 77/4777/6
bob [Fri, 23 Nov 2018 13:40:39 +0000 (00:40 +1100)]
flash/nor: Add support for sector erase in stm32l4x.c for L4+ family

Updates support for L4+ device id: 0x470 added by #4310
Extends #4641 to account for L4+ use of multiple DBANK option bits
Enables L4+ 1M and 2M devices to be programmed using sector erase

Change-Id: I42bb379d7d97986f4506423e3da503d07c787c6b
Signed-off-by: bob <rea952@gmail.com>
Reviewed-on: http://openocd.zylin.com/4777
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
5 years agoflash/nor: update cc3220sf for issue found in code review 88/4788/2
Edward Fewell [Wed, 5 Dec 2018 23:10:45 +0000 (17:10 -0600)]
flash/nor: update cc3220sf for issue found in code review

Remove inappropriate use of bank_number.

Change-Id: I11be1f2540cb09a3ccede35312f90bc8276af338
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/4788
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
5 years agoflash/nor: update CC26xx/CC13xx support 87/4787/2
Edward Fewell [Wed, 5 Dec 2018 22:05:00 +0000 (16:05 -0600)]
flash/nor: update CC26xx/CC13xx support

Added fixes found in additional code reviews.

Remove inappropriate use of bank_number field and updated
documentation to reflect the change.

Restored functionality to cc2538.cfg file because previous
change removed the cc26xx.cfg file because the flash support
changes made it obsolete. Rolled the previous cc26xx.cfg
file into cc2538.cfg and updated it to work with other
recent changes.  Tested using a SmartRF06 Evaluation
board with embedded XDS100v3 and external XDs110.

Change-Id: Ia19d00cf8055c5c0f1acc53aa23fd06a80fd2ebc
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/4787
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
5 years agojtag: sysfsgpio: clean up swd gpios 84/4784/2
Reto Schneider [Sun, 2 Dec 2018 06:14:27 +0000 (06:14 +0000)]
jtag: sysfsgpio: clean up swd gpios

All SWD GPIOs should be un-exported when no longer needed, not just
srst.

Change-Id: I998377afe43b72446cab3da2d4406fc2912ff8c3
Signed-off-by: Reto Schneider <code@reto-schneider.ch>
Reviewed-on: http://openocd.zylin.com/4784
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
5 years agohelper/log: remove dead code in log_forward() 79/4779/2
Antonio Borneo [Mon, 26 Nov 2018 15:49:05 +0000 (16:49 +0100)]
helper/log: remove dead code in log_forward()

Commit f1be0e6af2e204805a8bc2e8cadf828b9fa46c98 ("HELPER/LOG:
review unused symbols") removed a set of unused functions and,
as consequence, there is no code anymore that sets the variable
"log_forward_count". But, the commit above did not removed the
code (now dead) that depends on "log_forward_count" set.

Remove the code dependant on "log_forward_count" set and the
variable itself.

Change-Id: I6efe93d1dccbe13c409c5bc55ba47a2684c0e3ac
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4779
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
5 years agojtag: cmsis-dap: developer tool - enter a command by hex nuber 03/3103/2
Tomas Vanek [Sun, 8 Nov 2015 08:22:42 +0000 (09:22 +0100)]
jtag: cmsis-dap: developer tool - enter a command by hex nuber

Handy to test vendor commands in a CMSIS-DAP adapter.

Change-Id: Ieeaa276edf770b1a3076a186e9056b4e5180362a
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3103
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
5 years agodoc: add ARMv6-M info regarding TAP Declaration 82/4782/2
Spencer Oliver [Fri, 30 Nov 2018 11:02:53 +0000 (11:02 +0000)]
doc: add ARMv6-M info regarding TAP Declaration

Change-Id: I89095fd0c830fdc2ce40e5d23f8af98502b0ff50
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/4782
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
5 years agodoc: fix some typo about STMicroelectronics name 18/4718/2
Antonio Borneo [Thu, 4 Oct 2018 09:11:31 +0000 (11:11 +0200)]
doc: fix some typo about STMicroelectronics name

s/ST/STMicroelectronics/
s/ST Micro/STMicroelectronics/
s/ST Microelectronics/STMicroelectronics/

Change-Id: I62aef331d172db22a70841a089c1889e37997cde
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4718
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
5 years agostlink: add support for STLINK-V3 17/4717/3
Antonio Borneo [Mon, 24 Sep 2018 13:25:46 +0000 (15:25 +0200)]
stlink: add support for STLINK-V3

Extend the driver to include the minimal functionality to support
the HLA model.
Due to the small change in the name (ST-LINK/V2 => STLINK-V3), fix
the existing names in the comments in udev rules.

Change-Id: Ied33e38063a6da81d9bf249ed195444d7cdf4f03
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4717
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
5 years agostlink: fix printed version for new STM8 nucleo board 16/4716/3
Antonio Borneo [Mon, 1 Oct 2018 08:25:35 +0000 (10:25 +0200)]
stlink: fix printed version for new STM8 nucleo board

The ST-LINK/V2.1 embedded in the new nucleo boards for STM8 does
not follow the normal versioning rules, and puts mass-storage and
swim version in the field normally used respectively for jtag and
mass-storage version.

Apply the check suggested by STMicroelectronics to discriminate
the two cases and print the correct version.

Change-Id: I0dd1da11013be3f1e56084489e28cfba98bb07af
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4716
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
5 years agostlink: dump version in the same format of ST firmware upgrade tool 15/4715/3
Antonio Borneo [Mon, 1 Oct 2018 07:30:12 +0000 (09:30 +0200)]
stlink: dump version in the same format of ST firmware upgrade tool

This should help comparing the versions before deciding for a
firmware update.

Change-Id: I7012a60587587539b2fd1a5f9c3b1ce72877793f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4715
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
5 years agostlink: add STLINK_F_HAS_GETLASTRWSTATUS2 14/4714/2
Antonio Borneo [Mon, 24 Sep 2018 10:25:30 +0000 (12:25 +0200)]
stlink: add STLINK_F_HAS_GETLASTRWSTATUS2

Starting from stlink V2J15 the API
STLINK_DEBUG_APIV2_GETLASTRWSTATUS
is obsoleted and replaced by the new API
STLINK_DEBUG_APIV2_GETLASTRWSTATUS2.

Manage the two cases to be prepared for an eventual future
removal of the obsolete API.

Change-Id: Ic4498a652865b2eb6148825138c2f6855a06ba47
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4714
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
5 years agostlink: remove reset pulse when entering in JTAG 13/4713/2
Antonio Borneo [Mon, 24 Sep 2018 13:26:40 +0000 (15:26 +0200)]
stlink: remove reset pulse when entering in JTAG

Until version J14 the behaviour of ST-Link was to send a reset
pulse to the target when the debug connection is started in JTAG
mode. No reset pulse is sent, instead, in SWD mode.
Version J15 introduces a new parameter to avoid the reset pulse in
JTAG mode, aligning the behaviour with SWD.

This reset from the ST-Link, if propagated to the target, prevents
attaching a running target.

Actually this reset pulse is very short (few microsecond) and can
be easily filtered out by an on-board capacitor, usually present
on the reset wire (mainly to filter the bounces of the reset
button). Moreover, most of the use cases for ST-Link are with SWD
(not with JTAG) and this has probably further masked this JTAG
specific behaviour.

OpenOCD can tolerate it but requires the flag "connect_assert_srst"
to the command "reset_config", but the flag is not present in any
configurations in folder tcl. This enforces the guess it was not
noticed due to on-board capacitors or missing connection of reset
pin or ST-Link only used in SWD; so it's safe applying this patch.

Change the default behaviour to avoid reset in JTAG at connection.
There is no need to manage the ST-Link version here, since every
parameter that is not recognized by older ST-Link is treated as
"connect in JTAG with reset pulse", keeping backward compatibility.

Change-Id: Idc97a1457279e3970fd0839cadbff22d9b0302d4
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4713
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
5 years agostlink: simplify api version handling 12/4712/2
Antonio Borneo [Sun, 23 Sep 2018 15:05:05 +0000 (17:05 +0200)]
stlink: simplify api version handling

The API version is hardcoded in the STLINK device and depends on
the specific firmware version. There is no way to switch between
different API. Thus, it make no sense to keep in two separate
variables the current and the max API supported because they are
always equal to "the only" API supported by the specific STLINK.

Collapse h->version.jtag_api_max and h->jtag_api in a single
variable h->version.jtag_api
Remove an extra print of api version; this is already advertised
while printing the STLINK version.

Change-Id: I0519694a34748e5a0aa330932c1256080a6d5f20
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4712
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
5 years agostlink: add STLINK_F_HAS_MEM_16BIT 11/4711/3
Antonio Borneo [Sun, 23 Sep 2018 13:28:05 +0000 (15:28 +0200)]
stlink: add STLINK_F_HAS_MEM_16BIT

Change-Id: I51a160a105342ddbab99c4182d89650a436f5945
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4711
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
5 years agostlink: add STLINK_F_HAS_JTAG_SET_FREQ 10/4710/3
Antonio Borneo [Sun, 23 Sep 2018 13:20:30 +0000 (15:20 +0200)]
stlink: add STLINK_F_HAS_JTAG_SET_FREQ

Change-Id: I591543f218c6bb30aaeb6321ba8a9425a2b5b6e2
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4710
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
5 years agostlink: add STLINK_F_HAS_SWD_SET_FREQ 09/4709/3
Antonio Borneo [Sun, 23 Sep 2018 13:15:57 +0000 (15:15 +0200)]
stlink: add STLINK_F_HAS_SWD_SET_FREQ

Change-Id: Ibba786c7e18bf15a04b85a2071c79f631a252ccf
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4709
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
5 years agostlink: add STLINK_F_HAS_TARGET_VOLT 08/4708/3
Antonio Borneo [Sun, 23 Sep 2018 14:42:07 +0000 (16:42 +0200)]
stlink: add STLINK_F_HAS_TARGET_VOLT

Use an alias to STLINK_F_HAS_TRACE, both are added in the same version

Change-Id: Iabf2fdac407f5c4737c3da942323d60ee50c3470
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4708
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
5 years agostlink: add STLINK_F_HAS_TRACE 07/4707/2
Antonio Borneo [Sun, 23 Sep 2018 14:38:13 +0000 (16:38 +0200)]
stlink: add STLINK_F_HAS_TRACE

Fix the condition for ST-Link/V1; it does not support trace.
Trace is added on ST-Link/V2 and ST-Link/V2.1 only.

Change-Id: I17416edd05a2c8ece605560b7533edac4f982cfc
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4707
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
5 years agostlink: simplify maintenance of version and features 06/4706/2
Antonio Borneo [Thu, 20 Sep 2018 08:49:43 +0000 (10:49 +0200)]
stlink: simplify maintenance of version and features

The number of stlink firmware version is growing, each carrying new
features. Today's code has several check distributed here and there
and it's already hard to track them and verify the correctness.
The introduction of STLINK-V3 will make the situation much worst,
and the code much less readable.

Add a "flags" bitmask in the struct stlink_usb_version to allow
setting individual bits for each feature available or for specific
quirks and workarounds.
This patch does not implement setting nor testing "flags"; it would
be introduced in following patches, one bit at a time.

Change-Id: I09d78202646a6c8330731f8aa96dc9d295fa5655
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4706
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
5 years agostlink: check for SWD support 05/4705/2
Antonio Borneo [Thu, 20 Sep 2018 08:32:03 +0000 (10:32 +0200)]
stlink: check for SWD support

The old ST-Link/V1 can either run an obsolete firmware with API_V1 or
a more recent firmware (from V1J11 to last V1J13) with API_V2.
SWD is only provided by the latter API.

Return error is SWD is selected on adapters that does not support it.

Change-Id: Iac4ba54d191ba80fb445a7cd3d8c2621dc7a4846
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4705
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
5 years agostlink: add support for 16 bit memory read/write 04/4704/2
Laurent LEMELE [Wed, 19 Sep 2018 21:42:12 +0000 (23:42 +0200)]
stlink: add support for 16 bit memory read/write

Recent stlink version V2J26 introduces support for 16 bit memory
read/write.
Add the new API and modify the wrappers stlink_usb_{read|write}_mem
For older version of stlink keep the same behavior as in current
code.
While there, fix some minor typo in comments inside the wrappers.
This fixes ticket #204 ("st-link can't flash stm32f2x based flash
without target algorithms").

Change-Id: Id7d404e588f10a4b0f8a93d7ca44cef8e4c49b4f
Author: Laurent LEMELE <laurent.lemele@st.com>
Rebased-by: Antonio Borneo <borneo.antonio@gmail.com>
Ticket: https://sourceforge.net/p/openocd/tickets/204/
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4704
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
5 years agostlink: add JTAG speed selection 03/4703/2
Laurent LEMELE [Fri, 13 Apr 2018 14:35:45 +0000 (16:35 +0200)]
stlink: add JTAG speed selection

ST-Link uses two separate API for setting the interface speed in SWD
and JTAG.
Add the missing API for JTAG and run the proper API depending on the
selected mode.

Change-Id: I71e955e23c1d82c2ea1c8bfade7612c5a0377a74
Author: Laurent LEMELE <laurent.lemele@st.com>
Rebased-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4703
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
5 years agostlink: add usb pid for v2.1 without mass storage device 02/4702/2
Antonio Borneo [Sun, 23 Sep 2018 07:53:30 +0000 (09:53 +0200)]
stlink: add usb pid for v2.1 without mass storage device

New version of ST-Link/V2.1 without mass storage device.
From debug point of view, it is compatible with existing ST-Link/V2.1
It uses a new USB PID because the USB endpoints and interfaces are
different from usual ST-Link/V2.1

Add the new PID in the driver, in the tcl interface script and in the
udev configuration script.

Change-Id: Id2e1b5a5d0347c5d951a86a9cdb76be52cfd4ea3
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4702
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
5 years agoflash/stmsmi: fix byte order for big-endian host 78/4778/2
Antonio Borneo [Mon, 26 Nov 2018 14:52:51 +0000 (15:52 +0100)]
flash/stmsmi: fix byte order for big-endian host

The original code was written for and tested on little-endian
host only.

Rewrite it to be independent by host endianess.
Not tested on real HW; I don't own anymore a SPEAr device.

Change-Id: I2f427a804693f56cb9dea4936c525eb814c48c28
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reported-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4778
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
5 years agomem_helper: add mrh command 81/4781/2
Steven Stallion [Tue, 27 Nov 2018 02:01:34 +0000 (20:01 -0600)]
mem_helper: add mrh command

This patch adds support for reading halfword values from memory. This
command compliments existing support for writing halfwords (mwh).

Change-Id: I8ec628e65c05a7f00aa57e3af0f228eb8bd4d14e
Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/4781
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
5 years agojtag: drivers: ft232r: unhardcoded 81/4681/9
EMARD [Thu, 27 Sep 2018 13:12:10 +0000 (15:12 +0200)]
jtag: drivers: ft232r: unhardcoded

FT232R: introducing configurable parameters for pinout,
initial buffer size, state of RS232 signals at exit with
option to reattach kernel driver. All this was hardcoded before.
New parameters are documented in "openocd.texi" file.
Allows hopfully self-explainable and user-friendly adaptation to
various pinouts and similar chips like FT230X and FT231X.

Change-Id: Ib807f2ea3d4c1a164d351d65aeacd1978318d217
Signed-off-by: EMARD <vordah@gmail.com>
Reviewed-on: http://openocd.zylin.com/4681
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
5 years agoflash/nor: use default_flash_blank_check() instead of dummy 66/4766/2
Tomas Vanek [Thu, 15 Nov 2018 13:50:08 +0000 (14:50 +0100)]
flash/nor: use default_flash_blank_check() instead of dummy

Some flash drivers had a dummy method for erase_check.
Use default_flash_blank_check() instead if possible.

Change-Id: Iddfeff45ce477007328d061fcb5c553d93c3be98
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4766
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
5 years agoSPI table updates (some new devices and new info) 73/4773/5
Andreas Bolsch [Sun, 18 Nov 2018 16:08:20 +0000 (17:08 +0100)]
SPI table updates (some new devices and new info)

read_cmd, qread_cmd, pprog_cmd added as some recent high densities devices
use variants for 4-byte addressing.

Some new flash and FRAM device ids added. FRAMs don't have write pages nor
erase commands or sector sizes. The corresponding entries are marked as
"not used" (i. e. zero). Checks in existing SPI flash drivers added to
handle these cases gracefully.

Change-Id: I5104bce7c815ac22f98bc32c1bb6db66b984404a
Signed-off-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-on: http://openocd.zylin.com/4773
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
5 years agoSet TCP_NODELAY for local connections to jtag_vpi. 49/4549/2
Darius Rad [Tue, 22 May 2018 20:37:47 +0000 (16:37 -0400)]
Set TCP_NODELAY for local connections to jtag_vpi.

This increases performance drematically for local connections, which is the
most likely arrangement for a VPI connection.

Change-Id: Id15b29ae663f5d8100b2175357649bd03d05b7c8
Signed-off-by: Darius Rad <darius@bluespec.com>
Reviewed-on: http://openocd.zylin.com/4549
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
5 years agoflash/nor: consolidate flash protect/protect_check 65/4765/3
Tomas Vanek [Thu, 15 Nov 2018 11:19:25 +0000 (12:19 +0100)]
flash/nor: consolidate flash protect/protect_check

Make flash_driver methods protect() and protect_check()
optional.

Remove dummy definitions of these methods from the drivers
which do not implement protection handling.

Some drivers did not define protect method. It raised segfault
before this change and now it is handled properly.

Lot of drivers returned ERROR_OK from dummy protect()
- now flash_driver_protect() returns an error if not handled by the driver.

Change-Id: I2d4a0da316bf03c6379791b1b1c6198fbf22e66c
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4765
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Christopher Head <chead@zaber.com>
5 years agotcl/target, board: remove useless gdb-attach event definitions 63/4763/2
Tomas Vanek [Mon, 12 Nov 2018 11:18:31 +0000 (12:18 +0100)]
tcl/target, board: remove useless gdb-attach event definitions

Since commit bae76053dc515252dc5c8235b9a848e461080c66
gdb-attach event is defined as halt by default.
Remove useless and in case of bcm281xx wrong definitions of the event.

Change-Id: I8e69780a93722eb9392673303f54d502e71eceb6
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4763
Tested-by: jenkins
Reviewed-by: Steven Stallion <sstallion@gmail.com>
5 years agostm32l4x: Fix stm32l4x dual bank support 41/4641/3
Alex J Lennon [Thu, 2 Aug 2018 16:59:24 +0000 (17:59 +0100)]
stm32l4x: Fix stm32l4x dual bank support

The dual bank option was being incorrectly read and the
bank b base incorrectly set. This is tested with 512kB
dual bank configuration but needs checking with other
configurations (e.g. 256kb).

This fix should remove the need to use a mass_erase command
prior to programming with OpenOCD

Change-Id: I6e920f11b794c4c1fd34c0e44fb8fa01e7fe8f85
Signed-off-by: Alex J Lennon <alex.lennon@s19.tech>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4641
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Thomas Søhus <soehus@gmail.com>
5 years agotcl/target: ti_tms570.cfg restructure dap support 62/4762/2
Tomas Vanek [Mon, 12 Nov 2018 11:13:34 +0000 (12:13 +0100)]
tcl/target: ti_tms570.cfg restructure dap support

ti_tms570 was probably omitted in commit
2231da8ec4e7d7ae9b652f3dd1a7104f5a110f3f

Change-Id: Idd4828fd5ea3641bda6c73c7f07a598c1e512ef6
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4762
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
5 years agoefm32: correct erase address if bank->base != 0 40/4440/2
Andreas Kemnade [Sun, 4 Mar 2018 08:07:23 +0000 (09:07 +0100)]
efm32: correct erase address if bank->base != 0

Prepare for additional flash banks not located at address 0

Change-Id: I60b78c917f94fa52bf24df9e3315536f776eec84
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Reviewed-on: http://openocd.zylin.com/4440
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
5 years agotarget/image: Add support for S6 record in Motorola SREC files 45/4645/2
Bohdan Tymkiv [Fri, 10 Aug 2018 08:31:29 +0000 (11:31 +0300)]
target/image: Add support for S6 record in Motorola SREC files

S6 record is equivalent to S5 but it uses 24-bit value (instead of 16-bit)
to store total number of data records. It can be found in big srec files
with total number of data records bigger than 65535

Handle S6 record in the same way as S5 (simply ignore it)

Change-Id: I3e15a4e8f784fd38803c00accf422f803e8469cd
Signed-off-by: Bohdan Tymkiv <bhdt@cypress.com>
Reviewed-on: http://openocd.zylin.com/4645
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
5 years agotarget/stm32f7x: clarify reset_config comment 43/4743/3
Christopher Head [Tue, 30 Oct 2018 20:45:41 +0000 (13:45 -0700)]
target/stm32f7x: clarify reset_config comment

The reset_config line in the config file does not actually set
connect_assert_srst (the default is connect_deassert_srst), but it reads
as if it does. Clarify that the target is compatible with
connect_assert_srst, without suggesting that the file actually sets it
to that value.

Change-Id: I14e9445ab282d386b5d0055f6adf03d7c8878a8c
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4743
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
5 years agoPermit null target on TCL connection 30/4730/3
Christopher Head [Thu, 18 Oct 2018 21:20:45 +0000 (14:20 -0700)]
Permit null target on TCL connection

In previous versions of OpenOCD, it was possible to connect to the TCL
RPC interface without a current target. In `tcl_new_connection`, the
curent target would be queried by number, and the possibility of a null
current target was handled properly.

In commit bb9d9c60264a905926e0d15f84842858d0de80b7, the
`get_target_by_num` call was replaced by a `get_current_target` call,
without noticing that `get_current_target` aborts if there is no current
target, whereas `tcl_new_connection` is perfectly able to handle that
situation.

Provide a `get_current_target_or_null` function for use by consumers who
are OK with a null current target, and use it in `tcl_new_connection`.

Change-Id: I06f7e1e149f1169e23c73ba328c7ad9f9425cc2a
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4730
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Franck Jullien <franck.jullien@gmail.com>
5 years agoREADME: fix stlink instructions 72/4672/2
Paul Fertser [Fri, 14 Sep 2018 14:14:30 +0000 (17:14 +0300)]
README: fix stlink instructions

Since 31c58c139d85c35cc8ebce4196edb2c5eb157c7a there is a unified config
for all stlink versions.

Change-Id: Id736063496ecd96e2024ed69dcb67a22c44b80bb
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4672
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
5 years agodocs: fix typo in manual 51/4751/2
Spencer Oliver [Thu, 1 Nov 2018 21:19:48 +0000 (21:19 +0000)]
docs: fix typo in manual

Change-Id: I28717105eb2a907b0cb4b03f4b5ff1f47194413b
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/4751
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
5 years agotarget/stm32h7x: Fix documentation of reset_config 41/4741/5
Christopher Head [Sat, 27 Oct 2018 00:05:00 +0000 (17:05 -0700)]
target/stm32h7x: Fix documentation of reset_config

The stm32h7x.cfg does not specify connect_assert_srst or
connect_deassert_srst in its reset_config. The comment claims that it
will therefore connect in reset. However, per the manual, the default
configuration is actually connect_deassert_srst, not
connect_assert_srst. In actual fact, connect_assert_srst does not work
on the STM32H7 because, while SRST is asserted, everything on the AXI
bus is inaccessible. The CPU core is accessible, but since the
examine-end event handler also pokes at the DBGMCU peripheral, that will
fail in connect_assert_srst mode. So using connect_deassert_srst is
appropriate, so fix the comment accordingly.

Change-Id: If3e32e871fb19cc61183bdf911b7c5efd80b62e2
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4741
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
5 years agojtag/bitq: array boundary overflow 33/4733/4
xuguangxiao [Tue, 23 Oct 2018 07:43:11 +0000 (15:43 +0800)]
jtag/bitq: array boundary overflow

The for loop inside bitq_path_move function is not correct, this will
overflow the cmd->path array and produces an unpredictable result.

Change-Id: I81e3bc9ee6d1dd948acd2fe4c667103ac22bb26f
Signed-off-by: xuguangxiao <szgxxu@qq.com>
Reviewed-on: http://openocd.zylin.com/4733
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
5 years agoarmv7a: ARMv7-A MMU tools 27/4327/19
Matthias Welwarsky [Thu, 14 Jul 2016 19:00:59 +0000 (21:00 +0200)]
armv7a: ARMv7-A MMU tools

factor out mmu-related code from armv7a.c, add a 'dump' command for
page tables.

Change-Id: Ic1ac3c645d7fd097e9d625c7c8302e7065875dd4
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4327
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
5 years agotarget/cortex_a: remove duplicate code to read target registers 47/4747/4
Antonio Borneo [Sun, 7 Oct 2018 14:27:27 +0000 (16:27 +0200)]
target/cortex_a: remove duplicate code to read target registers

The functions cortex_a_dap_{read,write}_coreregister_u32() are
duplicate of the functions dpm_{read,write}_reg().

Remove both duplicated functions in cortex_a.c while export only
dpm_read_reg(), since dpm_write_reg() is currently not used.
Rename dpm_read_reg() as arm_dpm_read_reg() to keep uniform the
naming style.

Change-Id: I501bc99dc402039e630c47917a086a0bb382782c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4747
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Tested-by: jenkins
5 years agotarget/arm_dpm: uniform names of exported functions 56/4756/2
Antonio Borneo [Sat, 3 Nov 2018 13:52:30 +0000 (14:52 +0100)]
target/arm_dpm: uniform names of exported functions

The name of the function dpm_modeswitch() does not follow the
common style of the other function names in the same file.

Rename it as arm_dpm_modeswitch().

Change-Id: Idebf3c7bbddcd9b3c7b44f8d0dea1e5f7549b0eb
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4756
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
5 years agotarget/cortex_a: remove buggy memory AP accesses 48/4748/3
Antonio Borneo [Wed, 31 Oct 2018 17:13:06 +0000 (18:13 +0100)]
target/cortex_a: remove buggy memory AP accesses

The armv7m debug port provides a direct access to the CPU memory
bus, allowing the debugger to bypass the CPU for every memory
operation.
The armv7a debug port doesn't offer the same feature, mainly
because CPU caches and MMU makes the direct memory access more
tricky. Nevertheless most SoC with armv7a provide direct memory
access through an AHB bus available on another DAP access port,
different from the debug port.

The original port of cortex_a in OpenOCD was inspired from the
working cortex_m code, and provided optional memory access
through the AHB, if present.
The code for AHB access is problematic and partially buggy due
to incomplete management of cache coherency and missing check of
page boundary during virtual address operations.

With the commit 5d458cf72734a4474f38bbed10eea4d9acfe93a2
("target/mem_ap: generic mem-ap target") we have a clean support
for memory access through system buses connected to DAP AP, which
obsoletes the buggy memory AP hack in cortex_a.

Remove any code that uses the memory AP accesses in cortex_a.

Change-Id: I7cd1f94885e5817448058953e043d8da90dea3cc
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4748
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
5 years agotarget/cortex_a: remove unused code controlled by "fast_reg_read" 46/4746/2
Antonio Borneo [Wed, 31 Oct 2018 16:57:59 +0000 (17:57 +0100)]
target/cortex_a: remove unused code controlled by "fast_reg_read"

The variable fast_reg_read is always zero, causing some code to
never be executed.
Such code try to read the target registers by dumping them in
memory and then reading back the memory through the debugger. But
it is broken due to lack of cache and MMU management.
This code also uses the broken memory_ap access that is going to
be removed soon.

Remove all the code that depends on fast_reg_read not zero.
Add a missing check on arm_dpm_read_current_registers() return.
Keep the unused function cortex_a_dap_write_coreregister_u32()
to balance the used "read" version.

Change-Id: If2ff28a8c49eb0a87dc85207f5431978efd158db
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4746
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
5 years agoflash/nor/stm32f1x: Use of protection blocks, improved option bytes handling 76/4576/12
Dominik Peklo [Thu, 12 Jul 2018 10:44:28 +0000 (20:44 +1000)]
flash/nor/stm32f1x: Use of protection blocks, improved option bytes handling

Handle write protection status in blocks instead of sectors, removing
unnecessary complexity in the process. Now closer to stm32f2x.
Support sequential modification of option bytes by read/modify/write
directly to option bytes area instead of always starting with the
currently loaded bytes from FLASH_OBR/WRPR registers.
Added new command 'options_load' to force re-load of option bytes w/o
having to power cycle target.

Change-Id: I5c76191e29c17a1e11482df06379d10ca8d6d04d
Signed-off-by: Dominik Peklo <dom.peklo@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4576
Tested-by: jenkins
Reviewed-by: Jan Vojtěch <honza.vojtech@gmail.com>
5 years agoarm_adi_v5: do not deactivate power domains while trying to clear sticky error 77/4677/5
Antonio Borneo [Fri, 14 Sep 2018 22:09:16 +0000 (00:09 +0200)]
arm_adi_v5: do not deactivate power domains while trying to clear sticky error

At OpenOCD start-up the operation of clearing the sticky error in
CTRL/STAT register ignores the current value of the power domains
bits CDBGPWRUPREQ and CSYSPWRUPREQ in the same register and
incorrectly set them to zero.
This abrupt disable does not follow the requirement in IHI0031 to
wait for the acknowledgment of power disabled before continuing.
The power domains are then re-enabled immediately after; it is
possible that such short disable period has passed undetected or
has been tested only on devices that do not implement the power
domains.
Anyway, this sequence is incorrect and can generate unexpected
and hard-to-debug issues while OpenOCD attaches to a running
target that implements power domains.

Anticipate the initialization of dap->dp_ctrl_stat and use it
while clearing the sticky bit. This has the additional effect of
avoiding a power disable in the error recovery part of the
function dap_dp_read_atomic().
Keep the same sequence of read/write in dap_dp_init() to avoid
breaking the initialization of some problematic target.
Add comments to document these choices.

Change-Id: I8d6da788f2dd11909792b5d6b69bc90fbe4df25d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4677
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
5 years agoflash/nor/at91samd: add SAMR21E19A DID 34/4734/2
Tomas Vanek [Tue, 23 Oct 2018 09:21:10 +0000 (11:21 +0200)]
flash/nor/at91samd: add SAMR21E19A DID

While on it correct RAM amount of SAMR21x16A devices

Change-Id: Ie9ab9de1551bdceff17af7597a9a2ee41f5aebe0
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4734
Reviewed-by: Eduardo Montoya
Tested-by: jenkins
5 years agotcl: target: omit apcsw for hla 32/4732/2
Paul Fertser [Mon, 22 Oct 2018 20:13:04 +0000 (23:13 +0300)]
tcl: target: omit apcsw for hla

When using stlink for CM7 targets we have to rely on its firmware
to do the right thing as direct DAP access is not possible.

Change-Id: Ieee69f4eeea5c911f89f060f31ce86ed043bdfd0
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4732
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
5 years agodrivers/cmsis-dap: speed up sending multiple HID requests 80/4080/5
Tomas Vanek [Thu, 23 Mar 2017 09:13:09 +0000 (10:13 +0100)]
drivers/cmsis-dap: speed up sending multiple HID requests

The performance of CMSIS-DAP in long data transfers was improved substantially in
ef02b69b14d133b061217a91add5a028a77e86bc. But it not as good as some
other USB/MCU based adapters. Using HID and therefore interrupt endpoint
is slower than USB bulk transfer.

CMSIS-DAP adapter implements multiple HID buffer handling and OpenOCD already
reads number of buffers from info command.

This change adds capability to sumbit more than one HID requests before
driver waits for a HID response. This scenario is used for long transfers only.
Results show about double speed on USB FS and ~140% speed on USB HS:

                                         | w/o this change | with multi HIDrq
-----------------------------------------+-----------------+-----------------
Open source CMSIS-DAP, USB FS, adapter_khz 1000
dump_image ram32k.bin 0x1fffe000 0x8000  |   23.225 KiB/s  |   45.901 KiB/s
load_image ram32k.bin 0x1fffe000         |   23.324 KiB/s  |   46.552 KiB/s

Cypress' Kitprog in CMSIS-DAP mode, USB FS, adapter_khz 1000 (over firmware limit)
dump_image ram64k.bin 0x20000000 0x10000 |   15.537 KiB/s  |   42.558 KiB/s
load_image ram64k.bin 0x20000000         |   15.605 KiB/s  |   43.291 KiB/s

Atmel's EDBG, USB HS, adapter_khz 10000 (#3945 applied)
dump_image ram384k.bin 0x20400000 0x6000 |  248.402 KiB/s  |  345.250 KiB/s
load_image ram384k.bin 0x20400000        |  256.039 KiB/s  |  365.945 KiB/s

Change-Id: I9edbe018086176d357c6aaba5d6b657a5e5e1c64
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4080
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
5 years agotarget/target.c: adding keep_alive() to while loop. 86/4686/2
Kevin Gillespie [Thu, 4 Oct 2018 15:34:29 +0000 (10:34 -0500)]
target/target.c: adding keep_alive() to while loop.

Adding the call to keep_alive() to suppress warnings when
running the async flash algorithm. Issue observed when
loading large pieces of code on slower debuggers.

Change-Id: I7660fa05f68ebd7be07b2ca0a55b0f3b6ae718f3
Signed-off-by: Kevin Gillespie <kgills@gmail.com>
Reviewed-on: http://openocd.zylin.com/4686
Tested-by: jenkins
Reviewed-by: Jesse Marroquin
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
5 years agozynq_7000: Add zynqpl_program command 77/4177/2
Moritz Fischer [Wed, 5 Jul 2017 18:48:34 +0000 (11:48 -0700)]
zynq_7000: Add zynqpl_program command

This allows for programming the PL part of the Xilinx Zynq 7000

Change-Id: I89e86c0f381951091f6948c46802d17d7f1f3500
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Reviewed-on: http://openocd.zylin.com/4177
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
5 years agotarget/cortex_a: fix temporary breakpoint during step 13/4613/2
Antonio Borneo [Wed, 18 Jul 2018 13:38:49 +0000 (15:38 +0200)]
target/cortex_a: fix temporary breakpoint during step

Commit c8926d14579528bfcead1e179baf7cb846513db4 introduces the
context and hybrid breakpoint types beside existing SW and HW
types. The new field "asid" is non-zero only for these new types.

The commit above did not properly initialize "asid" to 0 for a
temporarily HW breakpoint used during single step. This causes
cortex_a_unset_breakpoint() to identify this breakpoint as of
type "hybrid".

Identified through valgrind error:
Conditional jump or move depends on uninitialised value(s)
Actually valgrind triggers a total of 10 messages about use of
uninitialized variables, but they are all caused by the first
conditional jump bases on "asid != 0".

Fixed by initializing "asid" to 0 in cortex_a_step().

Fixes: c8926d145795 ("cortex_a hybrid & context breakpoints")
Change-Id: Ib674d8457d1e02e10332fd9d73554d13719ef93d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4613
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
5 years agoxilinx-xc7: Add additional IDCODEs. 28/4428/2
William D. Jones [Thu, 22 Feb 2018 16:30:18 +0000 (11:30 -0500)]
xilinx-xc7: Add additional IDCODEs.

Add/detect missing IDCODEs for the Spartan 7 family and Artix 25T
and Artix 12T.

Change-Id: Ib6c83c5592e90df1eb8e715e79b279da9a95f9c6
Signed-off-by: William D. Jones <wjones@wdj-consulting.com>
Reviewed-on: http://openocd.zylin.com/4428
Reviewed-by: Robert Jördens
Tested-by: jenkins
Reviewed-by: Rohit Singh <rohit91.2008@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
5 years agotcl/board: Add Arty-S7 Spartan 7 FPGA Development Board 25/4525/3
William D. Jones [Tue, 15 May 2018 22:05:02 +0000 (18:05 -0400)]
tcl/board: Add Arty-S7 Spartan 7 FPGA Development Board

Change-Id: I8bfe780cb67a1777d5112a68e8a9781bfe4f2038
Signed-off-by: William D. Jones <wjones@wdj-consulting.com>
Reviewed-on: http://openocd.zylin.com/4525
Reviewed-by: Robert Jordens <jordens@gmail.com>
Tested-by: jenkins
Reviewed-by: Rohit Singh <rohit91.2008@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
5 years agotarget/arm_adi_v5: fix sync CSW cache on apreg write 79/4679/3
Antonio Borneo [Fri, 21 Sep 2018 13:52:02 +0000 (15:52 +0200)]
target/arm_adi_v5: fix sync CSW cache on apreg write

Commit 0057c71ab6b81d0679b232318fc5f84b4becc471 updates the OpenOCD
cached values of CSW and TAR registers if these registers are modified
by an apreg command.
The condition to force the update of CSW cache is incorrect and it will
erase the default CSW value.
Moreover, calling mem_ap_setup_csw() does not honor the value requested
in the apreg command because such value is incorrectly bitwise or-ed
with csw_default.

Fix it by updating csw_value, instead of erasing csw_default, and writing
directly in CSW register the new value from the command line.

Change-Id: I40273cb64d22ccfb9b6d3499bd39b586eb60de38
Fixes: 0057c71ab6b8 ("target/arm_adi_v5: sync CSW and TAR cache on apreg write")
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4679
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
5 years agotcl: Add support for the Numato Lab Mimas A7 board 20/4720/2
Rohit Singh [Fri, 12 Oct 2018 15:12:11 +0000 (20:42 +0530)]
tcl: Add support for the Numato Lab Mimas A7 board

The Mimas A7 FPGA board has FTDI FT2232 whose channel B is connected to
Artix-7 FPGA's JTAG interface. Hence, OpenOCD can easily interface with
it via the its ftdi driver interface. Tested to be working great up to
30 MHz.

Change-Id: Ieda015fbc6135bf95ad5a069cbf38650da45911e
Signed-off-by: Rohit Singh <rohit91.2008@gmail.com>
Reviewed-on: http://openocd.zylin.com/4720
Tested-by: jenkins
Reviewed-by: Tim "mithro" Ansell <me@mith.ro>
Reviewed-by: Robert Jordens <jordens@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
5 years agoftdi: demote unhelpful debug messages 12/4112/3
Steven Stallion [Mon, 1 May 2017 18:59:38 +0000 (13:59 -0500)]
ftdi: demote unhelpful debug messages

Some protocols make use of empty scan fields for optional padding, which
causes the log to fill with unhelpful messages that a field is empty.
The remaining LOG_DEBUG messages in ftdi_execute_scan have been demoted
to DEBUG_JTAG_IO such that these messages are only seen when debugging
JTAG.

Change-Id: I61fd4551411ce851da34e67d003bca5d7a71cd92
Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/4112
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
5 years agortos: check symbol list when updating uCOS-III 19/4719/2
Steven Stallion [Tue, 9 Oct 2018 18:48:18 +0000 (13:48 -0500)]
rtos: check symbol list when updating uCOS-III

This patch corrects a crash in uCOS-III on a new GDB connection when
RTOS autodetection is not used. The crash was caused by not checking if
the symbol list had been loaded prior to updating threads.

Change-Id: I64c5133e02fe22fc8d14584cc40d87b49c935b0b
Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/4719
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
5 years agoesirisc: support eSi-RISC targets 60/4660/17
Steven Stallion [Wed, 29 Aug 2018 00:18:01 +0000 (17:18 -0700)]
esirisc: support eSi-RISC targets

eSi-RISC is a highly configurable microprocessor architecture for
embedded systems provided by EnSilica. This patch adds support for
32-bit targets and also includes an internal flash driver and
uC/OS-III RTOS support. This is a non-traditional target and required
a number of additional changes to support non-linear register numbers
and the 'p' packet in RTOS support for proper integration into
EnSilica's GDB port.

Change-Id: I59d5c40b3bb2ace1b1a01b2538bfab211adf113f
Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/4660
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>

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