From e66593f8242d49dd05f6b9c4a5121fa466a158aa Mon Sep 17 00:00:00 2001
From: Antonio Borneo <borneo.antonio@gmail.com>
Date: Tue, 18 Aug 2020 18:56:03 +0200
Subject: [PATCH] flash: use proper format with uint32_t

Modify the format strings to properly handle uint32_t data types.

Change the type of variable retval in 'nor/ambiqmicro.c' to match
both the value to carry and the returned type of the function.

Fix the prototype mismatch of function lpc2900_address2sector()
between the header and the C file.

Change-Id: I68ffba9bd83eec8132f83bff3af993861fd09d84
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5816
Tested-by: jenkins
---
 src/flash/nand/mx3.c          |  2 +-
 src/flash/nand/mxc.c          |  2 +-
 src/flash/nand/tcl.c          |  2 +-
 src/flash/nor/aducm360.c      |  4 +--
 src/flash/nor/ambiqmicro.c    | 26 ++++++++++----------
 src/flash/nor/at91sam4.c      |  4 +--
 src/flash/nor/at91sam4l.c     |  2 +-
 src/flash/nor/at91sam7.c      |  2 +-
 src/flash/nor/ath79.c         | 12 ++++-----
 src/flash/nor/atsame5.c       |  2 +-
 src/flash/nor/atsamv.c        |  4 +--
 src/flash/nor/avrf.c          |  2 +-
 src/flash/nor/bluenrg-x.c     |  8 +++---
 src/flash/nor/cc26xx.c        |  2 +-
 src/flash/nor/cfi.c           |  8 +++---
 src/flash/nor/core.c          |  2 +-
 src/flash/nor/esirisc_flash.c |  2 +-
 src/flash/nor/fespi.c         |  8 +++---
 src/flash/nor/fm4.c           | 12 ++++-----
 src/flash/nor/kinetis.c       |  6 ++---
 src/flash/nor/lpc2000.c       |  2 +-
 src/flash/nor/lpc2900.c       |  2 +-
 src/flash/nor/max32xxx.c      | 26 ++++++++++----------
 src/flash/nor/msp432.c        |  8 +++---
 src/flash/nor/niietcm4.c      | 46 +++++++++++++++++------------------
 src/flash/nor/numicro.c       |  2 +-
 src/flash/nor/pic32mx.c       |  4 +--
 src/flash/nor/psoc5lp.c       |  2 +-
 src/flash/nor/psoc6.c         | 22 ++++++++---------
 src/flash/nor/renesas_rpchf.c |  8 +++---
 src/flash/nor/sh_qspi.c       |  2 +-
 src/flash/nor/stm32l4x.c      |  2 +-
 src/flash/nor/stm32lx.c       |  2 +-
 src/flash/nor/tcl.c           | 21 ++++++++--------
 src/flash/nor/tms470.c        |  2 +-
 src/flash/nor/w600.c          |  6 ++---
 src/flash/nor/xcf.c           |  4 +--
 src/flash/nor/xmc1xxx.c       | 10 ++++----
 38 files changed, 141 insertions(+), 142 deletions(-)

diff --git a/src/flash/nand/mx3.c b/src/flash/nand/mx3.c
index abeaf159cc..b9f5ff1b9f 100644
--- a/src/flash/nand/mx3.c
+++ b/src/flash/nand/mx3.c
@@ -40,7 +40,7 @@ get_next_halfword_from_sram_buffer() not tested
 static const char target_not_halted_err_msg[] =
 		"target must be halted to use mx3 NAND flash controller";
 static const char data_block_size_err_msg[] =
-		"minimal granularity is one half-word, %" PRId32 " is incorrect";
+		"minimal granularity is one half-word, %" PRIu32 " is incorrect";
 static const char sram_buffer_bounds_err_msg[] =
 		"trying to access out of SRAM buffer bound (addr=0x%" PRIx32 ")";
 static const char get_status_register_err_msg[] = "can't get NAND status";
diff --git a/src/flash/nand/mxc.c b/src/flash/nand/mxc.c
index bc2ae9324b..2c5de0394e 100644
--- a/src/flash/nand/mxc.c
+++ b/src/flash/nand/mxc.c
@@ -65,7 +65,7 @@
 static const char target_not_halted_err_msg[] =
 	"target must be halted to use mxc NAND flash controller";
 static const char data_block_size_err_msg[] =
-	"minimal granularity is one half-word, %" PRId32 " is incorrect";
+	"minimal granularity is one half-word, %" PRIu32 " is incorrect";
 static const char sram_buffer_bounds_err_msg[] =
 	"trying to access out of SRAM buffer bound (addr=0x%" PRIx32 ")";
 static const char get_status_register_err_msg[] = "can't get NAND status";
diff --git a/src/flash/nand/tcl.c b/src/flash/nand/tcl.c
index 5480e0d61e..ca8b9dad4d 100644
--- a/src/flash/nand/tcl.c
+++ b/src/flash/nand/tcl.c
@@ -124,7 +124,7 @@ COMMAND_HANDLER(handle_nand_info_command)
 			bad_state = " (block condition unknown)";
 
 		command_print(CMD,
-			"\t#%i: 0x%8.8" PRIx32 " (%" PRId32 "kB) %s%s",
+			"\t#%i: 0x%8.8" PRIx32 " (%" PRIu32 "kB) %s%s",
 			j,
 			p->blocks[j].offset,
 			p->blocks[j].size / 1024,
diff --git a/src/flash/nor/aducm360.c b/src/flash/nor/aducm360.c
index 5e0a666ea3..4e816fd618 100644
--- a/src/flash/nor/aducm360.c
+++ b/src/flash/nor/aducm360.c
@@ -285,7 +285,7 @@ static int aducm360_write_block_sync(
 
 		res = buf_get_u32(reg_params[4].value, 0, 32);
 		if (res) {
-			LOG_ERROR("aducm360 fast sync algorithm reports an error (%02X)", res);
+			LOG_ERROR("aducm360 fast sync algorithm reports an error (%02" PRIX32 ")", res);
 			retval = ERROR_FAIL;
 			break;
 		}
@@ -401,7 +401,7 @@ static int aducm360_write_block_async(
 	} else {
 		res = buf_get_u32(reg_params[4].value, 0, 32);	/*RESULT*/
 		if (res) {
-			LOG_ERROR("aducm360 fast async algorithm reports an error (%02X)", res);
+			LOG_ERROR("aducm360 fast async algorithm reports an error (%02" PRIX32 ")", res);
 			retval = ERROR_FAIL;
 		}
 	}
diff --git a/src/flash/nor/ambiqmicro.c b/src/flash/nor/ambiqmicro.c
index 28dc42d827..1c4dce87dc 100644
--- a/src/flash/nor/ambiqmicro.c
+++ b/src/flash/nor/ambiqmicro.c
@@ -212,7 +212,7 @@ static int ambiqmicro_read_part_info(struct flash_bank *bank)
 		/* Set PartNum to default device */
 		PartNum = 0;
 	}
-	LOG_DEBUG("Part number: 0x%x", PartNum);
+	LOG_DEBUG("Part number: 0x%" PRIx32, PartNum);
 
 	/*
 	 * Determine device class.
@@ -260,7 +260,7 @@ static int ambiqmicro_read_part_info(struct flash_bank *bank)
 		ambiqmicro_info->target_name =
 			ambiqmicroParts[0].partname;
 
-	LOG_DEBUG("num_pages: %d, pagesize: %d, flash: %d, sram: %d",
+	LOG_DEBUG("num_pages: %" PRIu32 ", pagesize: %" PRIu32 ", flash: %" PRIu32 ", sram: %" PRIu32,
 		ambiqmicro_info->num_pages,
 		ambiqmicro_info->pagesize,
 		ambiqmicro_info->flshsiz,
@@ -304,7 +304,7 @@ static int check_flash_status(struct target *target, uint32_t address)
 	}
 	/* target flash failed, unknown cause. */
 	if (retflash != 0) {
-		LOG_ERROR("Flash not happy: status(0x%x)", retflash);
+		LOG_ERROR("Flash not happy: status(0x%" PRIx32 ")", retflash);
 		return ERROR_FLASH_OPERATION_FAILED;
 	}
 	return ERROR_OK;
@@ -432,7 +432,7 @@ static int ambiqmicro_erase(struct flash_bank *bank, unsigned int first,
 {
 	struct ambiqmicro_flash_bank *ambiqmicro_info = bank->driver_priv;
 	struct target *target = bank->target;
-	uint32_t retval = ERROR_OK;
+	int retval;
 
 	if (bank->target->state != TARGET_HALTED) {
 		LOG_ERROR("Target not halted");
@@ -615,7 +615,7 @@ static int ambiqmicro_write_block(struct flash_bank *bank,
 			break;
 		}
 
-		LOG_DEBUG("address = 0x%08x", address);
+		LOG_DEBUG("address = 0x%08" PRIx32, address);
 
 		retval = ambiqmicro_exec_command(target, FLASH_PROGRAM_MAIN_FROM_SRAM, 0x1000000c);
 		CHECK_STATUS(retval, "error executing ambiqmicro flash write algorithm");
@@ -641,7 +641,7 @@ static int ambiqmicro_write_block(struct flash_bank *bank,
 static int ambiqmicro_write(struct flash_bank *bank, const uint8_t *buffer,
 	uint32_t offset, uint32_t count)
 {
-	uint32_t retval;
+	int retval;
 
 	/* try using a block write */
 	retval = ambiqmicro_write_block(bank, buffer, offset, count);
@@ -654,7 +654,7 @@ static int ambiqmicro_write(struct flash_bank *bank, const uint8_t *buffer,
 static int ambiqmicro_probe(struct flash_bank *bank)
 {
 	struct ambiqmicro_flash_bank *ambiqmicro_info = bank->driver_priv;
-	uint32_t retval;
+	int retval;
 
 	/* If this is a ambiqmicro chip, it has flash; probe() is just
 	 * to figure out how much is present.  Only do it once.
@@ -698,7 +698,7 @@ static int ambiqmicro_otp_program(struct flash_bank *bank,
 {
 	struct target *target = NULL;
 	struct ambiqmicro_flash_bank *ambiqmicro_info = NULL;
-	uint32_t retval = ERROR_OK;
+	int retval;
 
 	ambiqmicro_info = bank->driver_priv;
 	target = bank->target;
@@ -757,7 +757,7 @@ static int ambiqmicro_otp_program(struct flash_bank *bank,
 	/*
 	 * Program OTP.
 	 */
-	LOG_INFO("Programming OTP offset 0x%08x", offset);
+	LOG_INFO("Programming OTP offset 0x%08" PRIx32, offset);
 
 	/*
 	 * passed pc, addr = ROM function, handle breakpoints, not debugging.
@@ -778,7 +778,7 @@ COMMAND_HANDLER(ambiqmicro_handle_mass_erase_command)
 		return ERROR_COMMAND_SYNTAX_ERROR;
 
 	struct flash_bank *bank;
-	uint32_t retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
+	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
 	if (ERROR_OK != retval)
 		return retval;
 
@@ -798,7 +798,7 @@ COMMAND_HANDLER(ambiqmicro_handle_page_erase_command)
 {
 	struct flash_bank *bank;
 	uint32_t first, last;
-	uint32_t retval;
+	int retval;
 
 	if (CMD_ARGC < 3)
 		return ERROR_COMMAND_SYNTAX_ERROR;
@@ -826,7 +826,7 @@ COMMAND_HANDLER(ambiqmicro_handle_program_otp_command)
 {
 	struct flash_bank *bank;
 	uint32_t offset, count;
-	uint32_t retval;
+	int retval;
 
 	if (CMD_ARGC < 3)
 		return ERROR_COMMAND_SYNTAX_ERROR;
@@ -834,7 +834,7 @@ COMMAND_HANDLER(ambiqmicro_handle_program_otp_command)
 	COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], offset);
 	COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], count);
 
-	command_print(CMD, "offset=0x%08x count=%d", offset, count);
+	command_print(CMD, "offset=0x%08" PRIx32 " count=%" PRIu32, offset, count);
 
 	CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
 
diff --git a/src/flash/nor/at91sam4.c b/src/flash/nor/at91sam4.c
index 3f9ea9bfa1..1c61064253 100644
--- a/src/flash/nor/at91sam4.c
+++ b/src/flash/nor/at91sam4.c
@@ -1896,7 +1896,7 @@ static uint32_t sam4_reg_fieldname(struct sam4_chip *pChip,
 	}
 
 	/* show the basics */
-	LOG_USER_N("\t%*s: %*" PRId32 " [0x%0*" PRIx32 "] ",
+	LOG_USER_N("\t%*s: %*" PRIu32 " [0x%0*" PRIx32 "] ",
 		REG_NAME_WIDTH, regname,
 		dwidth, v,
 		hwidth, v);
@@ -2549,7 +2549,7 @@ static int sam4_GetDetails(struct sam4_bank_private *pPrivate)
 		sam4_explain_chipid_cidr(pPrivate->pChip);
 		return ERROR_FAIL;
 	} else {
-		LOG_DEBUG("SAM4 Found chip %s, CIDR 0x%08x", pDetails->name, pDetails->chipid_cidr);
+		LOG_DEBUG("SAM4 Found chip %s, CIDR 0x%08" PRIx32, pDetails->name, pDetails->chipid_cidr);
 	}
 
 	/* DANGER: THERE ARE DRAGONS HERE */
diff --git a/src/flash/nor/at91sam4l.c b/src/flash/nor/at91sam4l.c
index 4ee4ff8532..d09414cbe7 100644
--- a/src/flash/nor/at91sam4l.c
+++ b/src/flash/nor/at91sam4l.c
@@ -346,7 +346,7 @@ static int sam4l_probe(struct flash_bank *bank)
 	/* Done */
 	chip->probed = true;
 
-	LOG_INFO("SAM4L MCU: %s (Rev %c) (%" PRIu32 "KB Flash with %d %" PRId32 "B pages, %" PRIu32 "KB RAM)",
+	LOG_INFO("SAM4L MCU: %s (Rev %c) (%" PRIu32 "KB Flash with %d %" PRIu32 "B pages, %" PRIu32 "KB RAM)",
 			chip->details ? chip->details->name : "unknown", (char)('A' + (id & 0xF)),
 			chip->flash_kb, chip->num_pages, chip->page_size, chip->ram_kb);
 
diff --git a/src/flash/nor/at91sam7.c b/src/flash/nor/at91sam7.c
index 59f5951ae4..3d8fee1afe 100644
--- a/src/flash/nor/at91sam7.c
+++ b/src/flash/nor/at91sam7.c
@@ -954,7 +954,7 @@ static int at91sam7_write(struct flash_bank *bank, const uint8_t *buffer, uint32
 		/* Send Write Page command to Flash Controller */
 		if (at91sam7_flash_command(bank, WP, pagen) != ERROR_OK)
 			return ERROR_FLASH_OPERATION_FAILED;
-		LOG_DEBUG("Write flash bank:%u page number:%" PRIi32 "", bank->bank_number, pagen);
+		LOG_DEBUG("Write flash bank:%u page number:%" PRIu32, bank->bank_number, pagen);
 	}
 
 	return ERROR_OK;
diff --git a/src/flash/nor/ath79.c b/src/flash/nor/ath79.c
index c30ddf3c0b..9a4595f6d1 100644
--- a/src/flash/nor/ath79.c
+++ b/src/flash/nor/ath79.c
@@ -275,7 +275,7 @@ static int ath79_spi_bitbang_chunk(struct flash_bank *bank,
 	*transferred = 0;
 	pracc_queue_init(&ctx);
 
-	LOG_DEBUG("ath79_spi_bitbang_bytes(%p, %08x, %p, %d)",
+	LOG_DEBUG("ath79_spi_bitbang_bytes(%p, %08" PRIx32 ", %p, %d)",
 		  target, ath79_info->io_base, data, len);
 
 	LOG_DEBUG("max code %d => max len %d. to_xfer %d",
@@ -568,7 +568,7 @@ static int ath79_write_page(struct flash_bank *bank, const uint8_t *buffer,
 		ath79_info->dev->pagesize : SPIFLASH_DEF_PAGESIZE;
 
 	if (address & 0xff) {
-		LOG_ERROR("ath79_write_page: unaligned write address: %08x",
+		LOG_ERROR("ath79_write_page: unaligned write address: %08" PRIx32,
 			  address);
 		return ERROR_FAIL;
 	}
@@ -577,7 +577,7 @@ static int ath79_write_page(struct flash_bank *bank, const uint8_t *buffer,
 		return ERROR_FAIL;
 	}
 	if (len > ath79_info->dev->pagesize) {
-		LOG_ERROR("ath79_write_page: len bigger than page size %d: %d",
+		LOG_ERROR("ath79_write_page: len bigger than page size %" PRIu32 ": %" PRIu32,
 			pagesize, len);
 		return ERROR_FAIL;
 	}
@@ -589,7 +589,7 @@ static int ath79_write_page(struct flash_bank *bank, const uint8_t *buffer,
 	if (i == len)  /* all 0xff, no need to program. */
 		return ERROR_OK;
 
-	LOG_INFO("writing %d bytes to flash page @0x%08x", len, address);
+	LOG_INFO("writing %" PRIu32 " bytes to flash page @0x%08" PRIx32, len, address);
 
 	memcpy(ath79_info->spi.page_buf, buffer, len);
 
@@ -692,12 +692,12 @@ static int ath79_read_buffer(struct flash_bank *bank, uint8_t *buffer,
 		  __func__, address, len);
 
 	if (address & 0xff) {
-		LOG_ERROR("ath79_read_buffer: unaligned read address: %08x",
+		LOG_ERROR("ath79_read_buffer: unaligned read address: %08" PRIx32,
 			  address);
 		return ERROR_FAIL;
 	}
 
-	LOG_INFO("reading %d bytes from flash @0x%08x", len, address);
+	LOG_INFO("reading %" PRIu32 " bytes from flash @0x%08" PRIx32, len, address);
 
 	/* bitbang command */
 	ath79_spi_bitbang_prepare(bank);
diff --git a/src/flash/nor/atsame5.c b/src/flash/nor/atsame5.c
index 5d6010a2ad..ed0bef463b 100644
--- a/src/flash/nor/atsame5.c
+++ b/src/flash/nor/atsame5.c
@@ -740,7 +740,7 @@ FLASH_BANK_COMMAND_HANDLER(same5_flash_bank_command)
 {
 	if (bank->base != SAMD_FLASH) {
 		LOG_ERROR("Address " TARGET_ADDR_FMT " invalid bank address (try "
-			"0x%08" PRIx32 "[same5] )", bank->base, SAMD_FLASH);
+			"0x%08x[same5] )", bank->base, SAMD_FLASH);
 		return ERROR_FAIL;
 	}
 
diff --git a/src/flash/nor/atsamv.c b/src/flash/nor/atsamv.c
index 7db31f140f..af48398e09 100644
--- a/src/flash/nor/atsamv.c
+++ b/src/flash/nor/atsamv.c
@@ -615,7 +615,7 @@ static int samv_get_info(struct flash_bank *bank, char *buf, int buf_size)
 		if (ERROR_OK != r)
 			return r;
 	}
-	snprintf(buf, buf_size, "Cortex-M7 detected with %d kB flash",
+	snprintf(buf, buf_size, "Cortex-M7 detected with %" PRIu32 " kB flash",
 			bank->size / 1024);
 	return ERROR_OK;
 }
@@ -661,7 +661,7 @@ COMMAND_HANDLER(samv_handle_gpnvm_command)
 			return ERROR_COMMAND_SYNTAX_ERROR;
 	}
 
-	uint32_t v;
+	unsigned v;
 	if (!strcmp("show", CMD_ARGV[0])) {
 		if (who == -1) {
 showall:
diff --git a/src/flash/nor/avrf.c b/src/flash/nor/avrf.c
index 70d4d341b5..dd3d077a09 100644
--- a/src/flash/nor/avrf.c
+++ b/src/flash/nor/avrf.c
@@ -264,7 +264,7 @@ static int avrf_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t o
 	}
 
 	LOG_DEBUG("offset is 0x%08" PRIx32 "", offset);
-	LOG_DEBUG("count is %" PRId32 "", count);
+	LOG_DEBUG("count is %" PRIu32 "", count);
 
 	if (ERROR_OK != avr_jtagprg_enterprogmode(avr))
 		return ERROR_FAIL;
diff --git a/src/flash/nor/bluenrg-x.c b/src/flash/nor/bluenrg-x.c
index 232f6ba0a6..57ea7396f0 100644
--- a/src/flash/nor/bluenrg-x.c
+++ b/src/flash/nor/bluenrg-x.c
@@ -184,7 +184,7 @@ static int bluenrgx_erase(struct flash_bank *bank, unsigned int first,
 		command = FLASH_CMD_ERASE_PAGE;
 		for (unsigned int i = first; i <= last; i++) {
 			address = bank->base+i*FLASH_PAGE_SIZE(bluenrgx_info);
-			LOG_DEBUG("address = %08x, index = %u", address, i);
+			LOG_DEBUG("address = %08" PRIx32 ", index = %u", address, i);
 
 			if (bluenrgx_write_flash_reg(bank, FLASH_REG_IRQRAW, 0x3f) != ERROR_OK) {
 				LOG_ERROR("Register write failed");
@@ -249,7 +249,7 @@ static int bluenrgx_write(struct flash_bank *bank, const uint8_t *buffer,
 		return ERROR_FLASH_BANK_NOT_PROBED;
 
 	if ((offset + count) > bank->size) {
-		LOG_ERROR("Requested write past beyond of flash size: (offset+count) = %d, size=%d",
+		LOG_ERROR("Requested write past beyond of flash size: (offset+count) = %" PRIu32 ", size=%" PRIu32,
 			  (offset + count),
 			  bank->size);
 		return ERROR_FLASH_DST_OUT_OF_BANK;
@@ -312,8 +312,8 @@ static int bluenrgx_write(struct flash_bank *bank, const uint8_t *buffer,
 	LOG_DEBUG("source->address = " TARGET_ADDR_FMT, source->address);
 	LOG_DEBUG("source->address+ source->size = " TARGET_ADDR_FMT, source->address+source->size);
 	LOG_DEBUG("write_algorithm_sp->address = " TARGET_ADDR_FMT, write_algorithm_sp->address);
-	LOG_DEBUG("address = %08x", address);
-	LOG_DEBUG("count = %08x", count);
+	LOG_DEBUG("address = %08" PRIx32, address);
+	LOG_DEBUG("count = %08" PRIx32, count);
 
 	retval = target_run_flash_async_algorithm(target,
 						  buffer,
diff --git a/src/flash/nor/cc26xx.c b/src/flash/nor/cc26xx.c
index f0a855074b..5565aeb41f 100644
--- a/src/flash/nor/cc26xx.c
+++ b/src/flash/nor/cc26xx.c
@@ -527,7 +527,7 @@ static int cc26xx_info(struct flash_bank *bank, char *buf, int buf_size)
 	}
 
 	printed = snprintf(buf, buf_size,
-		"%s device: ICEPick ID 0x%08x, USER ID 0x%08x\n",
+		"%s device: ICEPick ID 0x%08" PRIx32 ", USER ID 0x%08" PRIx32 "\n",
 		device, cc26xx_bank->icepick_id, cc26xx_bank->user_id);
 
 	if (printed >= buf_size)
diff --git a/src/flash/nor/cfi.c b/src/flash/nor/cfi.c
index 964e06ac70..5f5071e696 100644
--- a/src/flash/nor/cfi.c
+++ b/src/flash/nor/cfi.c
@@ -2052,7 +2052,7 @@ static int cfi_intel_write_words(struct flash_bank *bank, const uint8_t *word,
 
 	/* Check for valid size */
 	if (wordcount > bufferwsize) {
-		LOG_ERROR("Number of data words %" PRId32 " exceeds available buffersize %" PRId32,
+		LOG_ERROR("Number of data words %" PRIu32 " exceeds available buffersize %" PRIu32,
 			wordcount, buffersize);
 		return ERROR_FLASH_OPERATION_FAILED;
 	}
@@ -2167,8 +2167,8 @@ static int cfi_spansion_write_words(struct flash_bank *bank, const uint8_t *word
 
 	/* Check for valid size */
 	if (wordcount > bufferwsize) {
-		LOG_ERROR("Number of data words %" PRId32 " exceeds available buffersize %"
-			PRId32, wordcount, buffersize);
+		LOG_ERROR("Number of data words %" PRIu32 " exceeds available buffersize %"
+			PRIu32, wordcount, buffersize);
 		return ERROR_FLASH_OPERATION_FAILED;
 	}
 
@@ -2467,7 +2467,7 @@ static int cfi_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t of
 
 	/* handle unaligned tail bytes */
 	if (count > 0) {
-		LOG_INFO("Fixup %" PRId32 " unaligned tail bytes", count);
+		LOG_INFO("Fixup %" PRIu32 " unaligned tail bytes", count);
 
 		/* read a complete word from flash */
 		retval = cfi_target_read_memory(bank, write_p, 1, current_word);
diff --git a/src/flash/nor/core.c b/src/flash/nor/core.c
index b1a36623d6..d56301351b 100644
--- a/src/flash/nor/core.c
+++ b/src/flash/nor/core.c
@@ -825,7 +825,7 @@ int flash_write_unlock(struct target *target, struct image *image,
 				LOG_WARNING("Section start address " TARGET_ADDR_FMT
 					" breaks the required alignment of flash bank %s",
 					run_address, c->name);
-				LOG_WARNING("Padding %d bytes from " TARGET_ADDR_FMT,
+				LOG_WARNING("Padding %" PRIu32 " bytes from " TARGET_ADDR_FMT,
 					padding_at_start, aligned_start);
 
 				run_address -= padding_at_start;
diff --git a/src/flash/nor/esirisc_flash.c b/src/flash/nor/esirisc_flash.c
index a5785a964c..88f00bccaa 100644
--- a/src/flash/nor/esirisc_flash.c
+++ b/src/flash/nor/esirisc_flash.c
@@ -494,7 +494,7 @@ static int esirisc_flash_info(struct flash_bank *bank, char *buf, int buf_size)
 	struct esirisc_flash_bank *esirisc_info = bank->driver_priv;
 
 	snprintf(buf, buf_size,
-			"%4s cfg at 0x%" PRIx32 ", clock %" PRId32 ", wait_states %" PRId32,
+			"%4s cfg at 0x%" PRIx32 ", clock %" PRIu32 ", wait_states %" PRIu32,
 			"",	/* align with first line */
 			esirisc_info->cfg,
 			esirisc_info->clock,
diff --git a/src/flash/nor/fespi.c b/src/flash/nor/fespi.c
index 6b2793f1b9..02630ac24f 100644
--- a/src/flash/nor/fespi.c
+++ b/src/flash/nor/fespi.c
@@ -189,7 +189,7 @@ static int fespi_write_reg(struct flash_bank *bank, target_addr_t address, uint3
 
 	int result = target_write_u32(target, fespi_info->ctrl_base + address, value);
 	if (result != ERROR_OK) {
-		LOG_ERROR("fespi_write_reg() error writing 0x%x to " TARGET_ADDR_FMT,
+		LOG_ERROR("fespi_write_reg() error writing 0x%" PRIx32 " to " TARGET_ADDR_FMT,
 				value, fespi_info->ctrl_base + address);
 		return result;
 	}
@@ -274,7 +274,7 @@ static int fespi_rx(struct flash_bank *bank, uint8_t *out)
 			break;
 		int64_t now = timeval_ms();
 		if (now - start > 1000) {
-			LOG_ERROR("rxfifo didn't go positive (value=0x%x).", value);
+			LOG_ERROR("rxfifo didn't go positive (value=0x%" PRIx32 ").", value);
 			return ERROR_TARGET_TIMEOUT;
 		}
 	}
@@ -438,7 +438,7 @@ static int slow_fespi_write_buffer(struct flash_bank *bank,
 	uint32_t ii;
 
 	if (offset & 0xFF000000) {
-		LOG_ERROR("FESPI interface does not support greater than 3B addressing, can't write to offset 0x%x",
+		LOG_ERROR("FESPI interface does not support greater than 3B addressing, can't write to offset 0x%" PRIx32,
 				offset);
 		return ERROR_FAIL;
 	}
@@ -651,7 +651,7 @@ static int steps_add_buffer_write(struct algorithm_steps *as,
 		const uint8_t *buffer, uint32_t chip_offset, uint32_t len)
 {
 	if (chip_offset & 0xFF000000) {
-		LOG_ERROR("FESPI interface does not support greater than 3B addressing, can't write to offset 0x%x",
+		LOG_ERROR("FESPI interface does not support greater than 3B addressing, can't write to offset 0x%" PRIx32,
 				chip_offset);
 		return ERROR_FAIL;
 	}
diff --git a/src/flash/nor/fm4.c b/src/flash/nor/fm4.c
index 4daec78a1c..211a008637 100644
--- a/src/flash/nor/fm4.c
+++ b/src/flash/nor/fm4.c
@@ -172,7 +172,7 @@ static int fm4_flash_erase(struct flash_bank *bank, unsigned int first,
 			retval = ERROR_FLASH_OPERATION_FAILED;
 			goto err_run_ret;
 		} else if (result != 0) {
-			LOG_ERROR("Unexpected error %d from flash sector erase programming algorithm", result);
+			LOG_ERROR("Unexpected error %" PRIu32 " from flash sector erase programming algorithm", result);
 			retval = ERROR_FLASH_OPERATION_FAILED;
 			goto err_run_ret;
 		} else
@@ -213,7 +213,7 @@ static int fm4_flash_write(struct flash_bank *bank, const uint8_t *buffer,
 #include "../../../contrib/loaders/flash/fm4/write.inc"
 	};
 
-	LOG_DEBUG("Spansion FM4 write at 0x%08" PRIx32 " (%" PRId32 " bytes)",
+	LOG_DEBUG("Spansion FM4 write at 0x%08" PRIx32 " (%" PRIu32 " bytes)",
 		offset, byte_count);
 
 	if (offset & 0x1) {
@@ -222,7 +222,7 @@ static int fm4_flash_write(struct flash_bank *bank, const uint8_t *buffer,
 		return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
 	}
 	if (byte_count & 0x1) {
-		LOG_WARNING("length %" PRId32 " is not 2-byte aligned, rounding up",
+		LOG_WARNING("length %" PRIu32 " is not 2-byte aligned, rounding up",
 			byte_count);
 	}
 
@@ -273,7 +273,7 @@ static int fm4_flash_write(struct flash_bank *bank, const uint8_t *buffer,
 		uint32_t halfwords = MIN(halfword_count, data_workarea->size / 2);
 		uint32_t addr = bank->base + offset;
 
-		LOG_DEBUG("copying %" PRId32 " bytes to SRAM " TARGET_ADDR_FMT,
+		LOG_DEBUG("copying %" PRIu32 " bytes to SRAM " TARGET_ADDR_FMT,
 			MIN(halfwords * 2, byte_count), data_workarea->address);
 
 		retval = target_write_buffer(target, data_workarea->address,
@@ -284,7 +284,7 @@ static int fm4_flash_write(struct flash_bank *bank, const uint8_t *buffer,
 			goto err_write_data;
 		}
 
-		LOG_DEBUG("writing 0x%08" PRIx32 "-0x%08" PRIx32 " (%" PRId32 "x)",
+		LOG_DEBUG("writing 0x%08" PRIx32 "-0x%08" PRIx32 " (%" PRIu32 "x)",
 			addr, addr + halfwords * 2 - 1, halfwords);
 
 		buf_set_u32(reg_params[0].value, 0, 32, (addr & ~0xffff) | 0xAA8);
@@ -312,7 +312,7 @@ static int fm4_flash_write(struct flash_bank *bank, const uint8_t *buffer,
 			retval = ERROR_FLASH_OPERATION_FAILED;
 			goto err_run_ret;
 		} else if (result != 0) {
-			LOG_ERROR("Unexpected error %d from flash write "
+			LOG_ERROR("Unexpected error %" PRIu32 " from flash write "
 				"programming algorithm", result);
 			retval = ERROR_FLASH_OPERATION_FAILED;
 			goto err_run_ret;
diff --git a/src/flash/nor/kinetis.c b/src/flash/nor/kinetis.c
index 6b6121d3b4..e6b452e057 100644
--- a/src/flash/nor/kinetis.c
+++ b/src/flash/nor/kinetis.c
@@ -2578,7 +2578,7 @@ static int kinetis_probe_chip(struct kinetis_chip *k_chip)
 		else
 			k_chip->pflash_size = k_chip->fcfg2_maxaddr0_shifted * num_blocks / 2;
 		if (k_chip->pflash_size != 2048<<10)
-			LOG_WARNING("SIM_FCFG1 PFSIZE = 0xf: please check if pflash is %u KB", k_chip->pflash_size>>10);
+			LOG_WARNING("SIM_FCFG1 PFSIZE = 0xf: please check if pflash is %" PRIu32 " KB", k_chip->pflash_size>>10);
 
 		break;
 	default:
@@ -2668,7 +2668,7 @@ static int kinetis_probe(struct flash_bank *bank)
 		k_bank->protection_block = bank->num_prot_blocks * k_bank->bank_number;
 
 		size_k = bank->size / 1024;
-		LOG_DEBUG("Kinetis bank %u: %" PRIu32 "k PFlash, FTFx base 0x%08" PRIx32 ", sect %u",
+		LOG_DEBUG("Kinetis bank %u: %" PRIu32 "k PFlash, FTFx base 0x%08" PRIx32 ", sect %" PRIu32,
 			 k_bank->bank_number, size_k, k_bank->prog_base, k_bank->sector_size);
 
 	} else if (k_bank->bank_number < num_blocks) {
@@ -2708,7 +2708,7 @@ static int kinetis_probe(struct flash_bank *bank)
 		}
 
 		size_k = bank->size / 1024;
-		LOG_DEBUG("Kinetis bank %u: %" PRIu32 "k FlexNVM, FTFx base 0x%08" PRIx32 ", sect %u",
+		LOG_DEBUG("Kinetis bank %u: %" PRIu32 "k FlexNVM, FTFx base 0x%08" PRIx32 ", sect %" PRIu32,
 			 k_bank->bank_number, size_k, k_bank->prog_base, k_bank->sector_size);
 
 	} else {
diff --git a/src/flash/nor/lpc2000.c b/src/flash/nor/lpc2000.c
index a1aa1df3e7..942ef555c9 100644
--- a/src/flash/nor/lpc2000.c
+++ b/src/flash/nor/lpc2000.c
@@ -1556,7 +1556,7 @@ static int get_lpc2000_info(struct flash_bank *bank, char *buf, int buf_size)
 {
 	struct lpc2000_flash_bank *lpc2000_info = bank->driver_priv;
 
-	snprintf(buf, buf_size, "lpc2000 flash driver variant: %i, clk: %" PRIi32 "kHz", lpc2000_info->variant,
+	snprintf(buf, buf_size, "lpc2000 flash driver variant: %i, clk: %" PRIu32 "kHz", lpc2000_info->variant,
 			lpc2000_info->cclk);
 
 	return ERROR_OK;
diff --git a/src/flash/nor/lpc2900.c b/src/flash/nor/lpc2900.c
index 386c8bffe2..c8e885aba1 100644
--- a/src/flash/nor/lpc2900.c
+++ b/src/flash/nor/lpc2900.c
@@ -174,7 +174,7 @@ static uint32_t lpc2900_read_security_status(struct flash_bank *bank);
 static uint32_t lpc2900_run_bist128(struct flash_bank *bank,
 		uint32_t addr_from, uint32_t addr_to,
 		uint32_t signature[4]);
-static uint32_t lpc2900_address2sector(struct flash_bank *bank, uint32_t offset);
+static unsigned int lpc2900_address2sector(struct flash_bank *bank, uint32_t offset);
 static uint32_t lpc2900_calc_tr(uint32_t clock_var, uint32_t time_var);
 
 /***********************  Helper functions  **************************/
diff --git a/src/flash/nor/max32xxx.c b/src/flash/nor/max32xxx.c
index bf54f63ba0..9a5e83fa05 100644
--- a/src/flash/nor/max32xxx.c
+++ b/src/flash/nor/max32xxx.c
@@ -76,7 +76,7 @@ struct max32xxx_flash_bank {
 	unsigned int flc_base;
 	unsigned int sector_size;
 	unsigned int clkdiv_value;
-	unsigned int int_state;
+	uint32_t int_state;
 	unsigned int burst_size_bits;
 };
 
@@ -98,13 +98,13 @@ FLASH_BANK_COMMAND_HANDLER(max32xxx_flash_bank_command)
 	}
 
 	info = calloc(sizeof(struct max32xxx_flash_bank), 1);
-	COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], info->flash_size);
-	COMMAND_PARSE_NUMBER(u32, CMD_ARGV[6], info->flc_base);
-	COMMAND_PARSE_NUMBER(u32, CMD_ARGV[7], info->sector_size);
-	COMMAND_PARSE_NUMBER(u32, CMD_ARGV[8], info->clkdiv_value);
+	COMMAND_PARSE_NUMBER(uint, CMD_ARGV[2], info->flash_size);
+	COMMAND_PARSE_NUMBER(uint, CMD_ARGV[6], info->flc_base);
+	COMMAND_PARSE_NUMBER(uint, CMD_ARGV[7], info->sector_size);
+	COMMAND_PARSE_NUMBER(uint, CMD_ARGV[8], info->clkdiv_value);
 
 	if (CMD_ARGC > 9)
-		COMMAND_PARSE_NUMBER(u32, CMD_ARGV[9], info->burst_size_bits);
+		COMMAND_PARSE_NUMBER(uint, CMD_ARGV[9], info->burst_size_bits);
 	else
 		info->burst_size_bits = 32;
 
@@ -522,7 +522,7 @@ static int max32xxx_write(struct flash_bank *bank, const uint8_t *buffer,
 			} while ((--retry > 0) && (flsh_cn & FLSH_CN_PEND));
 
 			if (retry <= 0) {
-				LOG_ERROR("Timed out waiting for flash write @ 0x%08x", address);
+				LOG_ERROR("Timed out waiting for flash write @ 0x%08" PRIx32, address);
 				return ERROR_FLASH_OPERATION_FAILED;
 			}
 
@@ -543,7 +543,7 @@ static int max32xxx_write(struct flash_bank *bank, const uint8_t *buffer,
 
 		while (remaining >= 16) {
 			if ((address & 0xFFF) == 0)
-				LOG_DEBUG("Writing @ 0x%08x", address);
+				LOG_DEBUG("Writing @ 0x%08" PRIx32, address);
 
 			target_write_buffer(target, info->flc_base + FLSH_DATA0, 16, buffer);
 			flsh_cn |= 0x00000001;
@@ -556,7 +556,7 @@ static int max32xxx_write(struct flash_bank *bank, const uint8_t *buffer,
 			} while ((--retry > 0) && (flsh_cn & FLSH_CN_PEND));
 
 			if (retry <= 0) {
-				LOG_ERROR("Timed out waiting for flash write @ 0x%08x", address);
+				LOG_ERROR("Timed out waiting for flash write @ 0x%08" PRIx32, address);
 				return ERROR_FLASH_OPERATION_FAILED;
 			}
 
@@ -587,7 +587,7 @@ static int max32xxx_write(struct flash_bank *bank, const uint8_t *buffer,
 			} while ((--retry > 0) && (flsh_cn & FLSH_CN_PEND));
 
 			if (retry <= 0) {
-				LOG_ERROR("Timed out waiting for flash write @ 0x%08x", address);
+				LOG_ERROR("Timed out waiting for flash write @ 0x%08" PRIx32, address);
 				return ERROR_FLASH_OPERATION_FAILED;
 			}
 
@@ -625,7 +625,7 @@ static int max32xxx_write(struct flash_bank *bank, const uint8_t *buffer,
 		} while ((--retry > 0) && (flsh_cn & FLSH_CN_PEND));
 
 		if (retry <= 0) {
-			LOG_ERROR("Timed out waiting for flash write @ 0x%08x", address);
+			LOG_ERROR("Timed out waiting for flash write @ 0x%08" PRIx32, address);
 			return ERROR_FLASH_OPERATION_FAILED;
 		}
 	}
@@ -633,7 +633,7 @@ static int max32xxx_write(struct flash_bank *bank, const uint8_t *buffer,
 	/* Check access violations */
 	target_read_u32(target, info->flc_base + FLSH_INT, &flsh_int);
 	if (flsh_int & FLSH_INT_AF) {
-		LOG_ERROR("Flash Error writing 0x%x bytes at 0x%08x", count, offset);
+		LOG_ERROR("Flash Error writing 0x%" PRIx32 " bytes at 0x%08" PRIx32, count, offset);
 		max32xxx_flash_op_post(bank);
 		return ERROR_FLASH_OPERATION_FAILED;
 	}
@@ -675,7 +675,7 @@ static int max32xxx_probe(struct flash_bank *bank)
 	if ((arm_pid == ARM_PID_DEFAULT_CM3) || arm_pid == ARM_PID_DEFAULT_CM4) {
 		uint32_t max326xx_id;
 		target_read_u32(target, MAX326XX_ID_REG, &max326xx_id);
-		LOG_DEBUG("max326xx_id = 0x%x", max326xx_id);
+		LOG_DEBUG("max326xx_id = 0x%" PRIx32, max326xx_id);
 		max326xx_id = ((max326xx_id & 0xFF000000) >> 24);
 		if (max326xx_id == MAX326XX_ID)
 			info->max326xx = 1;
diff --git a/src/flash/nor/msp432.c b/src/flash/nor/msp432.c
index d2417bc89b..b6933e1e9b 100644
--- a/src/flash/nor/msp432.c
+++ b/src/flash/nor/msp432.c
@@ -320,7 +320,7 @@ static int msp432_init(struct flash_bank *bank)
 		/* Explicit device type check failed. Report this. */
 		LOG_WARNING(
 			"msp432: Unrecognized MSP432P4 Device ID and Hardware "
-			"Rev (%04X, %02X)", msp432_bank->device_id,
+			"Rev (%04" PRIX32 ", %02" PRIX32 ")", msp432_bank->device_id,
 			msp432_bank->hardware_rev);
 	} else if (MSP432P401X_DEPR == msp432_bank->device_type) {
 		LOG_WARNING(
@@ -330,7 +330,7 @@ static int msp432_init(struct flash_bank *bank)
 		/* Explicit device type check failed. Report this. */
 		LOG_WARNING(
 			"msp432: Unrecognized MSP432E4 DID0 and DID1 values "
-			"(%08X, %08X)", msp432_bank->device_id,
+			"(%08" PRIX32 ", %08" PRIX32 ")", msp432_bank->device_id,
 			msp432_bank->hardware_rev);
 	}
 
@@ -1012,14 +1012,14 @@ static int msp432_info(struct flash_bank *bank, char *buf, int buf_size)
 			break;
 		case MSP432E4X_GUESS:
 			printed = snprintf(buf, buf_size,
-				"Unrecognized MSP432E4 DID0 and DID1 IDs (%08X, %08X)",
+				"Unrecognized MSP432E4 DID0 and DID1 IDs (%08" PRIX32 ", %08" PRIX32 ")",
 				msp432_bank->device_id, msp432_bank->hardware_rev);
 			break;
 		case MSP432P401X_GUESS:
 		case MSP432P411X_GUESS:
 		default:
 			printed = snprintf(buf, buf_size,
-				"Unrecognized MSP432P4 Device ID and Hardware Rev (%04X, %02X)",
+				"Unrecognized MSP432P4 Device ID and Hardware Rev (%04" PRIX32 ", %02" PRIX32 ")",
 				msp432_bank->device_id, msp432_bank->hardware_rev);
 			break;
 	}
diff --git a/src/flash/nor/niietcm4.c b/src/flash/nor/niietcm4.c
index 2a20edcee9..1831314ddd 100644
--- a/src/flash/nor/niietcm4.c
+++ b/src/flash/nor/niietcm4.c
@@ -411,7 +411,7 @@ COMMAND_HANDLER(niietcm4_handle_uflash_read_byte_command)
 	else
 		return ERROR_COMMAND_SYNTAX_ERROR;
 
-	COMMAND_PARSE_NUMBER(uint, CMD_ARGV[1], uflash_addr);
+	COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], uflash_addr);
 
 	retval = target_write_u32(target, UFMA, uflash_addr);
 	if (retval != ERROR_OK)
@@ -427,8 +427,8 @@ COMMAND_HANDLER(niietcm4_handle_uflash_read_byte_command)
 	if (retval != ERROR_OK)
 		return retval;
 	command_print(CMD,  "Read userflash %s region:\n"
-						"address = 0x%04x,\n"
-						"value   = 0x%02x.", CMD_ARGV[0], uflash_addr, uflash_data);
+						"address = 0x%04" PRIx32 ",\n"
+						"value   = 0x%02" PRIx32 ".", CMD_ARGV[0], uflash_addr, uflash_data);
 	return retval;
 }
 
@@ -463,14 +463,14 @@ COMMAND_HANDLER(niietcm4_handle_uflash_write_byte_command)
 	else
 		return ERROR_COMMAND_SYNTAX_ERROR;
 
-	COMMAND_PARSE_NUMBER(uint, CMD_ARGV[1], uflash_addr);
-	COMMAND_PARSE_NUMBER(uint, CMD_ARGV[2], uflash_data);
+	COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], uflash_addr);
+	COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], uflash_data);
 
 	int page_num = uflash_addr/USERFLASH_PAGE_SIZE;
 
 	command_print(CMD, "Write userflash %s region:\n"
-					   "address = 0x%04x,\n"
-					   "value   = 0x%02x.\n"
+					   "address = 0x%04" PRIx32 ",\n"
+					   "value   = 0x%02" PRIx32 ".\n"
 					   "Please wait ... ", CMD_ARGV[0], uflash_addr, uflash_data);
 	/* dump */
 	uint32_t uflash_dump[USERFLASH_PAGE_SIZE];
@@ -803,7 +803,7 @@ COMMAND_HANDLER(niietcm4_handle_extmem_cfg_command)
 		return ERROR_COMMAND_SYNTAX_ERROR;
 
 	uint32_t pin;
-	COMMAND_PARSE_NUMBER(uint, CMD_ARGV[1], pin);
+	COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], pin);
 	if (pin > 15)
 		return ERROR_COMMAND_SYNTAX_ERROR;
 
@@ -1427,7 +1427,7 @@ static int niietcm4_write(struct flash_bank *bank, const uint8_t *buffer,
 		/* write 16 bytes per try */
 		for (unsigned int i = 0; i < count; i += 16) {
 			/* current addr */
-			LOG_INFO("%d byte of %d", i, count);
+			LOG_INFO("%u byte of %" PRIu32, i, count);
 			flash_addr = offset + i;
 			retval = target_write_u32(target, FMA, flash_addr);
 			if (retval != ERROR_OK)
@@ -1596,31 +1596,31 @@ static int niietcm4_probe_k1921vk01t(struct flash_bank *bank)
 				"\n"
 				"MEMORY CONFIGURATION\n"
 				"Bootflash :\n"
-				"    %d kB total\n"
-				"    %d pages %d kB each\n"
-				"    0x%08x base address\n"
+				"    %" PRIu32 " kB total\n"
+				"    %" PRIu32 " pages %" PRIu32 " kB each\n"
+				"    0x%08" PRIx32 " base address\n"
 				"%s"
 				"Info bootflash :\n"
-				"    %d kB total\n"
-				"    %d pages %d kB each\n"
+				"    %" PRIu32 " kB total\n"
+				"    %" PRIu32 " pages %" PRIu32 " kB each\n"
 				"    %s\n"
 				"%s"
 				"Userflash :\n"
-				"    %d kB total\n"
-				"    %d pages %d B each\n"
-				"    %d bit cells\n"
+				"    %" PRIu32 " kB total\n"
+				"    %" PRIu32 " pages %" PRIu32 " B each\n"
+				"    %" PRIu32 " bit cells\n"
 				"    not mapped to global address space\n"
 				"Info userflash :\n"
-				"    %d B total\n"
-				"    %d pages of %d B each\n"
-				"    %d bit cells\n"
+				"    %" PRIu32 " B total\n"
+				"    %" PRIu32 " pages of %" PRIu32 " B each\n"
+				"    %" PRIu32 " bit cells\n"
 				"    not mapped to global address space\n"
 				"RAM :\n"
 				"    192 kB total\n"
 				"    0x20000000 base address\n"
 				"External memory :\n"
 				"    8/16 bit address space\n"
-				"    0x%08x base address\n"
+				"    0x%08" PRIx32 " base address\n"
 				"\n"
 				"INFOWORD STATUS\n"
 				"Bootflash info region remap :\n"
@@ -1628,9 +1628,9 @@ static int niietcm4_probe_k1921vk01t(struct flash_bank *bank)
 				"External memory boot port :\n"
 				"    %s\n"
 				"External memory boot pin :\n"
-				"    %d\n"
+				"    %" PRIu32 "\n"
 				"External memory interface alternative function :\n"
-				"    %d\n"
+				"    %" PRIu32 "\n"
 				"Option boot from external memory :\n"
 				"    %s\n",
 				bflash_size/1024,
diff --git a/src/flash/nor/numicro.c b/src/flash/nor/numicro.c
index c212cbc309..7609fa81c0 100644
--- a/src/flash/nor/numicro.c
+++ b/src/flash/nor/numicro.c
@@ -1583,7 +1583,7 @@ static int numicro_write(struct flash_bank *bank, const uint8_t *buffer,
 		/* program command */
 		for (uint32_t i = 0; i < count; i += 4) {
 
-			LOG_DEBUG("write longword @ %08X", offset + i);
+			LOG_DEBUG("write longword @ %08" PRIX32, offset + i);
 
 			retval = target_write_u32(target, NUMICRO_FLASH_ISPADR, bank->base + offset + i);
 			if (retval != ERROR_OK)
diff --git a/src/flash/nor/pic32mx.c b/src/flash/nor/pic32mx.c
index ae5ebb9322..c42cfb2bbe 100644
--- a/src/flash/nor/pic32mx.c
+++ b/src/flash/nor/pic32mx.c
@@ -771,7 +771,7 @@ static int pic32mx_probe(struct flash_bank *bank)
 		}
 	}
 
-	LOG_INFO("flash size = %" PRId32 "kbytes", num_pages / 1024);
+	LOG_INFO("flash size = %" PRIu32 "kbytes", num_pages / 1024);
 
 	free(bank->sectors);
 
@@ -916,7 +916,7 @@ COMMAND_HANDLER(pic32mx_handle_unlock_command)
 		mchip_cmd = MCHP_STATUS;
 		mips_ejtag_drscan_8(ejtag_info, &mchip_cmd);
 		if (timeout-- == 0) {
-			LOG_DEBUG("timeout waiting for unlock: 0x%" PRIx32 "", mchip_cmd);
+			LOG_DEBUG("timeout waiting for unlock: 0x%" PRIx8 "", mchip_cmd);
 			break;
 		}
 		alive_sleep(1);
diff --git a/src/flash/nor/psoc5lp.c b/src/flash/nor/psoc5lp.c
index 25a0ee0259..c651dea7a6 100644
--- a/src/flash/nor/psoc5lp.c
+++ b/src/flash/nor/psoc5lp.c
@@ -919,7 +919,7 @@ static int psoc5lp_eeprom_write(struct flash_bank *bank,
 		memset(buf + byte_count, bank->default_padded_value,
 				EEPROM_ROW_SIZE - byte_count);
 
-		LOG_DEBUG("Padding %d bytes", EEPROM_ROW_SIZE - byte_count);
+		LOG_DEBUG("Padding %" PRIu32 " bytes", EEPROM_ROW_SIZE - byte_count);
 		retval = psoc5lp_spc_load_row(target, SPC_ARRAY_EEPROM,
 				buf, EEPROM_ROW_SIZE);
 		if (retval != ERROR_OK)
diff --git a/src/flash/nor/psoc6.c b/src/flash/nor/psoc6.c
index 09a1bed563..df151c1b5e 100644
--- a/src/flash/nor/psoc6.c
+++ b/src/flash/nor/psoc6.c
@@ -378,7 +378,7 @@ static int call_sromapi(struct target *target,
 
 	bool is_success = (*data_out & SROMAPI_STATUS_MSK) == SROMAPI_STAT_SUCCESS;
 	if (!is_success) {
-		LOG_ERROR("SROM API execution failed. Status: 0x%08X", (uint32_t)*data_out);
+		LOG_ERROR("SROM API execution failed. Status: 0x%08" PRIX32, *data_out);
 		return ERROR_TARGET_FAILURE;
 	}
 
@@ -513,9 +513,9 @@ static int psoc6_get_info(struct flash_bank *bank, char *buf, int buf_size)
 		return hr;
 
 	snprintf(buf, buf_size,
-		"PSoC6 Silicon ID: 0x%08X\n"
+		"PSoC6 Silicon ID: 0x%08" PRIX32 "\n"
 		"Protection: %s\n"
-		"Main Flash size: %d kB\n"
+		"Main Flash size: %" PRIu32 " kB\n"
 		"Work Flash size: 32 kB\n",
 		psoc6_info->silicon_id,
 		protection_to_str(psoc6_info->protection),
@@ -660,7 +660,7 @@ static int psoc6_erase_sector(struct flash_bank *bank, struct working_area *wa,
 {
 	struct target *target = bank->target;
 
-	LOG_DEBUG("Erasing SECTOR @%08X", addr);
+	LOG_DEBUG("Erasing SECTOR @%08" PRIX32, addr);
 
 	int hr = target_write_u32(target, wa->address, SROMAPI_ERASESECTOR_REQ);
 	if (hr != ERROR_OK)
@@ -673,7 +673,7 @@ static int psoc6_erase_sector(struct flash_bank *bank, struct working_area *wa,
 	uint32_t data_out;
 	hr = call_sromapi(target, SROMAPI_ERASESECTOR_REQ, wa->address, &data_out);
 	if (hr != ERROR_OK)
-		LOG_ERROR("SECTOR @%08X not erased!", addr);
+		LOG_ERROR("SECTOR @%08" PRIX32 " not erased!", addr);
 
 	return hr;
 }
@@ -689,7 +689,7 @@ static int psoc6_erase_row(struct flash_bank *bank, struct working_area *wa, uin
 {
 	struct target *target = bank->target;
 
-	LOG_DEBUG("Erasing ROW @%08X", addr);
+	LOG_DEBUG("Erasing ROW @%08" PRIX32, addr);
 
 	int hr = target_write_u32(target, wa->address, SROMAPI_ERASEROW_REQ);
 	if (hr != ERROR_OK)
@@ -702,7 +702,7 @@ static int psoc6_erase_row(struct flash_bank *bank, struct working_area *wa, uin
 	uint32_t data_out;
 	hr = call_sromapi(target, SROMAPI_ERASEROW_REQ, wa->address, &data_out);
 	if (hr != ERROR_OK)
-		LOG_ERROR("ROW @%08X not erased!", addr);
+		LOG_ERROR("ROW @%08" PRIX32 " not erased!", addr);
 
 	return hr;
 }
@@ -792,7 +792,7 @@ static int psoc6_program_row(struct flash_bank *bank,
 	uint32_t data_out;
 	int hr = ERROR_OK;
 
-	LOG_DEBUG("Programming ROW @%08X", addr);
+	LOG_DEBUG("Programming ROW @%08" PRIX32, addr);
 
 	hr = target_alloc_working_area(target, psoc6_info->row_sz + 32, &wa);
 	if (hr != ERROR_OK)
@@ -863,7 +863,7 @@ static int psoc6_program(struct flash_bank *bank,
 
 		hr = psoc6_program_row(bank, aligned_addr, page_buf, is_sflash);
 		if (hr != ERROR_OK) {
-			LOG_ERROR("Failed to program Flash at address 0x%08X", aligned_addr);
+			LOG_ERROR("Failed to program Flash at address 0x%08" PRIX32, aligned_addr);
 			goto exit;
 		}
 
@@ -959,11 +959,11 @@ int handle_reset_halt(struct target *target)
 	 * Ignoring return value of mem_ap_write_atomic_u32 seems to be ok here */
 	if (is_cm0) {
 		/* Reset the CM0 by asserting SYSRESETREQ. This will also reset CM4 */
-		LOG_INFO("psoc6.cm0: bkpt @0x%08X, issuing SYSRESETREQ", reset_addr);
+		LOG_INFO("psoc6.cm0: bkpt @0x%08" PRIX32 ", issuing SYSRESETREQ", reset_addr);
 		mem_ap_write_atomic_u32(cm->debug_ap, NVIC_AIRCR,
 			AIRCR_VECTKEY | AIRCR_SYSRESETREQ);
 	} else {
-		LOG_INFO("psoc6.cm4: bkpt @0x%08X, issuing VECTRESET", reset_addr);
+		LOG_INFO("psoc6.cm4: bkpt @0x%08" PRIX32 ", issuing VECTRESET", reset_addr);
 		mem_ap_write_atomic_u32(cm->debug_ap, NVIC_AIRCR,
 			AIRCR_VECTKEY | AIRCR_VECTRESET);
 	}
diff --git a/src/flash/nor/renesas_rpchf.c b/src/flash/nor/renesas_rpchf.c
index 933b6e5205..f99749f3dd 100644
--- a/src/flash/nor/renesas_rpchf.c
+++ b/src/flash/nor/renesas_rpchf.c
@@ -451,8 +451,8 @@ static int rpchf_spansion_write_words(struct flash_bank *bank, const uint8_t *wo
 
 	/* Check for valid size */
 	if (wordcount > bufferwsize) {
-		LOG_ERROR("Number of data words %" PRId32 " exceeds available buffersize %"
-			PRId32, wordcount, buffersize);
+		LOG_ERROR("Number of data words %" PRIu32 " exceeds available buffersize %"
+			PRIu32, wordcount, buffersize);
 		return ERROR_FLASH_OPERATION_FAILED;
 	}
 
@@ -583,7 +583,7 @@ static int rpchf_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t
 
 	/* handle unaligned tail bytes */
 	if (count > 0) {
-		LOG_INFO("Fixup %" PRId32 " unaligned tail bytes", count);
+		LOG_INFO("Fixup %" PRIu32 " unaligned tail bytes", count);
 
 		/* read a complete word from flash */
 		retval = cfi_target_read_memory(bank, write_p, 1, current_word);
@@ -612,7 +612,7 @@ static int rpchf_read(struct flash_bank *bank, uint8_t *buffer, uint32_t offset,
 	struct cfi_flash_bank *cfi_info = bank->driver_priv;
 	struct target *target = bank->target;
 
-	LOG_DEBUG("reading buffer of %" PRIi32 " byte at 0x%8.8" PRIx32,
+	LOG_DEBUG("reading buffer of %" PRIu32 " byte at 0x%8.8" PRIx32,
 		  count, offset);
 
 	if (bank->target->state != TARGET_HALTED) {
diff --git a/src/flash/nor/sh_qspi.c b/src/flash/nor/sh_qspi.c
index 1ba9753392..4ec7ebe658 100644
--- a/src/flash/nor/sh_qspi.c
+++ b/src/flash/nor/sh_qspi.c
@@ -508,7 +508,7 @@ static int sh_qspi_write(struct flash_bank *bank, const uint8_t *buffer,
 	}
 
 	if (offset & 0xff) {
-		LOG_ERROR("sh_qspi_write_page: unaligned write address: %08x",
+		LOG_ERROR("sh_qspi_write_page: unaligned write address: %08" PRIx32,
 			  offset);
 		return ERROR_FAIL;
 	}
diff --git a/src/flash/nor/stm32l4x.c b/src/flash/nor/stm32l4x.c
index 0b5e1b04b4..379f1b4b38 100644
--- a/src/flash/nor/stm32l4x.c
+++ b/src/flash/nor/stm32l4x.c
@@ -1015,7 +1015,7 @@ static int stm32l4_probe(struct flash_bank *bank)
 	const int gap_size_kb = stm32l4_info->hole_sectors * page_size_kb;
 
 	if (gap_size_kb != 0) {
-		LOG_INFO("gap detected from 0x%08" PRIx32 " to 0x%08" PRIx32,
+		LOG_INFO("gap detected from 0x%08x to 0x%08x",
 			STM32_FLASH_BANK_BASE + stm32l4_info->bank1_sectors
 				* page_size_kb * 1024,
 			STM32_FLASH_BANK_BASE + (stm32l4_info->bank1_sectors
diff --git a/src/flash/nor/stm32lx.c b/src/flash/nor/stm32lx.c
index 34c7408b01..3cb1a49982 100644
--- a/src/flash/nor/stm32lx.c
+++ b/src/flash/nor/stm32lx.c
@@ -446,7 +446,7 @@ static int stm32lx_write_half_pages(struct flash_bank *bank, const uint8_t *buff
 
 	/* Make sure we're performing a half-page aligned write. */
 	if (count % hp_nb) {
-		LOG_ERROR("The byte count must be %" PRIu32 "B-aligned but count is %" PRIi32 "B)", hp_nb, count);
+		LOG_ERROR("The byte count must be %" PRIu32 "B-aligned but count is %" PRIu32 "B)", hp_nb, count);
 		return ERROR_FAIL;
 	}
 
diff --git a/src/flash/nor/tcl.c b/src/flash/nor/tcl.c
index 3bdaf0b59d..e935b3b4af 100644
--- a/src/flash/nor/tcl.c
+++ b/src/flash/nor/tcl.c
@@ -141,7 +141,7 @@ COMMAND_HANDLER(handle_flash_info_command)
 				protect_state = "protection state unknown";
 
 			command_print(CMD,
-				"\t#%3i: 0x%8.8" PRIx32 " (0x%" PRIx32 " %" PRIi32 "kB) %s",
+				"\t#%3i: 0x%8.8" PRIx32 " (0x%" PRIx32 " %" PRIu32 "kB) %s",
 				j,
 				block_array[j].offset,
 				block_array[j].size,
@@ -222,7 +222,7 @@ COMMAND_HANDLER(handle_flash_erase_check_command)
 
 		blank = false;
 		command_print(CMD,
-			"\t#%3i: 0x%8.8" PRIx32 " (0x%" PRIx32 " %" PRIi32 "kB) %s",
+			"\t#%3i: 0x%8.8" PRIx32 " (0x%" PRIx32 " %" PRIu32 "kB) %s",
 			j,
 			p->sectors[j].offset,
 			p->sectors[j].size,
@@ -288,8 +288,7 @@ COMMAND_HANDLER(handle_flash_erase_address_command)
 		retval = flash_erase_address_range(target, do_pad, address, length);
 
 	if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) {
-		command_print(CMD, "erased address " TARGET_ADDR_FMT " (length %"
-				PRIi32 ")"
+		command_print(CMD, "erased address " TARGET_ADDR_FMT " (length %" PRIu32 ")"
 			" in %fs (%0.3f KiB/s)", address, length,
 			duration_elapsed(&bench), duration_kbps(&bench, length));
 	}
@@ -326,7 +325,7 @@ COMMAND_HANDLER(handle_flash_erase_command)
 
 	if (!(last <= (p->num_sectors - 1))) {
 		command_print(CMD, "ERROR: "
-			"last sector must be <= %" PRIu32,
+			"last sector must be <= %u",
 			p->num_sectors - 1);
 		return ERROR_FAIL;
 	}
@@ -384,7 +383,7 @@ COMMAND_HANDLER(handle_flash_protect_command)
 
 	if (!(last <= (uint32_t)(num_blocks - 1))) {
 		command_print(CMD, "ERROR: "
-			"last %s must be <= %" PRIu32,
+			"last %s must be <= %d",
 			(p->num_prot_blocks) ? "block" : "sector",
 			num_blocks - 1);
 		return ERROR_FAIL;
@@ -541,7 +540,7 @@ COMMAND_HANDLER(handle_flash_fill_command)
 		LOG_WARNING("Start address " TARGET_ADDR_FMT
 			" breaks the required alignment of flash bank %s",
 			address, bank->name);
-		LOG_WARNING("Padding %" PRId32 " bytes from " TARGET_ADDR_FMT,
+		LOG_WARNING("Padding %" PRIu32 " bytes from " TARGET_ADDR_FMT,
 		    padding_at_start, aligned_start);
 	}
 
@@ -571,7 +570,7 @@ COMMAND_HANDLER(handle_flash_fill_command)
 
 	if (padding_at_end) {
 		memset(ptr, bank->default_padded_value, padding_at_end);
-		LOG_INFO("Padding at " TARGET_ADDR_FMT " with %" PRId32
+		LOG_INFO("Padding at " TARGET_ADDR_FMT " with %" PRIu32
 			" bytes (bank write end alignment)",
 			end_addr + 1, padding_at_end);
 	}
@@ -759,7 +758,7 @@ COMMAND_HANDLER(handle_flash_write_bank_command)
 		LOG_WARNING("Start offset 0x%08" PRIx32
 			" breaks the required alignment of flash bank %s",
 			offset, bank->name);
-		LOG_WARNING("Padding %" PRId32 " bytes from " TARGET_ADDR_FMT,
+		LOG_WARNING("Padding %" PRIu32 " bytes from " TARGET_ADDR_FMT,
 		    padding_at_start, aligned_start);
 	}
 
@@ -781,7 +780,7 @@ COMMAND_HANDLER(handle_flash_write_bank_command)
 
 	if (padding_at_end) {
 		memset(ptr, bank->default_padded_value, padding_at_end);
-		LOG_INFO("Padding at " TARGET_ADDR_FMT " with %" PRId32
+		LOG_INFO("Padding at " TARGET_ADDR_FMT " with %" PRIu32
 			" bytes (bank write end alignment)",
 			end_addr + 1, padding_at_end);
 	}
@@ -988,7 +987,7 @@ COMMAND_HANDLER(handle_flash_verify_bank_command)
 		for (t = 0; t < length; t++) {
 			if (buffer_flash[t] == buffer_file[t])
 				continue;
-			command_print(CMD, "diff %d address 0x%08x. Was 0x%02x instead of 0x%02x",
+			command_print(CMD, "diff %d address 0x%08" PRIx32 ". Was 0x%02x instead of 0x%02x",
 					diffs, t + offset, buffer_flash[t], buffer_file[t]);
 			if (diffs++ >= 127) {
 				command_print(CMD, "More than 128 errors, the rest are not printed.");
diff --git a/src/flash/nor/tms470.c b/src/flash/nor/tms470.c
index 611688c6ae..3004682b8e 100644
--- a/src/flash/nor/tms470.c
+++ b/src/flash/nor/tms470.c
@@ -901,7 +901,7 @@ static int tms470_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t
 
 	tms470_read_part_info(bank);
 
-	LOG_INFO("Writing %" PRId32 " bytes starting at " TARGET_ADDR_FMT,
+	LOG_INFO("Writing %" PRIu32 " bytes starting at " TARGET_ADDR_FMT,
 			count, bank->base + offset);
 
 	/* set GLBCTRL.4  */
diff --git a/src/flash/nor/w600.c b/src/flash/nor/w600.c
index 0439593269..2506f2b550 100644
--- a/src/flash/nor/w600.c
+++ b/src/flash/nor/w600.c
@@ -240,13 +240,13 @@ static int w600_write(struct flash_bank *bank, const uint8_t *buffer,
 	}
 
 	if ((offset % W600_FLASH_PAGESIZE) != 0) {
-		LOG_WARNING("offset 0x%" PRIx32 " breaks required %" PRIu32 "-byte alignment",
+		LOG_WARNING("offset 0x%" PRIx32 " breaks required %d-byte alignment",
 			offset, W600_FLASH_PAGESIZE);
 		return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
 	}
 
 	if ((count % W600_FLASH_PAGESIZE) != 0) {
-		LOG_WARNING("count 0x%" PRIx32 " breaks required %" PRIu32 "-byte alignment",
+		LOG_WARNING("count 0x%" PRIx32 " breaks required %d-byte alignment",
 			offset, W600_FLASH_PAGESIZE);
 		return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
 	}
@@ -323,7 +323,7 @@ static int w600_probe(struct flash_bank *bank)
 		flash_size = 1 << flash_size;
 	}
 
-	LOG_INFO("flash size = %dkbytes", flash_size / 1024);
+	LOG_INFO("flash size = %" PRIu32 "kbytes", flash_size / 1024);
 
 	/* calculate numbers of pages */
 	size_t num_pages = flash_size / W600_FLASH_SECSIZE;
diff --git a/src/flash/nor/xcf.c b/src/flash/nor/xcf.c
index ded5e5e344..29eef2dc33 100644
--- a/src/flash/nor/xcf.c
+++ b/src/flash/nor/xcf.c
@@ -624,7 +624,7 @@ static int xcf_probe(struct flash_bank *bank)
 			bank->num_sectors = 4;
 			break;
 		default:
-			LOG_ERROR("Unknown flash device ID 0x%X", id);
+			LOG_ERROR("Unknown flash device ID 0x%" PRIX32, id);
 			return ERROR_FAIL;
 	}
 
@@ -640,7 +640,7 @@ static int xcf_probe(struct flash_bank *bank)
 	bank->driver_priv = priv;
 
 	LOG_INFO("product name: %s", product_name(bank));
-	LOG_INFO("device id = 0x%X ", bank->target->tap->idcode);
+	LOG_INFO("device id = 0x%" PRIX32, bank->target->tap->idcode);
 	LOG_INFO("flash size = %d configuration bits",
 		bank->num_sectors * XCF_DATA_SECTOR_SIZE * 8);
 	LOG_INFO("number of sectors = %u", bank->num_sectors);
diff --git a/src/flash/nor/xmc1xxx.c b/src/flash/nor/xmc1xxx.c
index eda1823f98..757dd952f5 100644
--- a/src/flash/nor/xmc1xxx.c
+++ b/src/flash/nor/xmc1xxx.c
@@ -253,7 +253,7 @@ static int xmc1xxx_write(struct flash_bank *bank, const uint8_t *buffer,
 #include "../../../contrib/loaders/flash/xmc1xxx/write.inc"
 	};
 
-	LOG_DEBUG("Infineon XMC1000 write at 0x%08" PRIx32 " (%" PRId32 " bytes)",
+	LOG_DEBUG("Infineon XMC1000 write at 0x%08" PRIx32 " (%" PRIu32 " bytes)",
 		offset, byte_count);
 
 	if (offset & (NVM_BLOCK_SIZE - 1)) {
@@ -262,7 +262,7 @@ static int xmc1xxx_write(struct flash_bank *bank, const uint8_t *buffer,
 		return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
 	}
 	if (byte_count & (NVM_BLOCK_SIZE - 1)) {
-		LOG_WARNING("length %" PRId32 " is not block aligned, rounding up",
+		LOG_WARNING("length %" PRIu32 " is not block aligned, rounding up",
 			byte_count);
 	}
 
@@ -306,7 +306,7 @@ static int xmc1xxx_write(struct flash_bank *bank, const uint8_t *buffer,
 		uint32_t blocks = MIN(block_count, data_workarea->size / NVM_BLOCK_SIZE);
 		uint32_t addr = bank->base + offset;
 
-		LOG_DEBUG("copying %" PRId32 " bytes to SRAM " TARGET_ADDR_FMT,
+		LOG_DEBUG("copying %" PRIu32 " bytes to SRAM " TARGET_ADDR_FMT,
 			MIN(blocks * NVM_BLOCK_SIZE, byte_count),
 			data_workarea->address);
 
@@ -329,7 +329,7 @@ static int xmc1xxx_write(struct flash_bank *bank, const uint8_t *buffer,
 			}
 		}
 
-		LOG_DEBUG("writing 0x%08" PRIx32 "-0x%08" PRIx32 " (%" PRId32 "x)",
+		LOG_DEBUG("writing 0x%08" PRIx32 "-0x%08" PRIx32 " (%" PRIu32 "x)",
 			addr, addr + blocks * NVM_BLOCK_SIZE - 1, blocks);
 
 		retval = xmc1xxx_nvm_check_idle(target);
@@ -429,7 +429,7 @@ static int xmc1xxx_get_info_command(struct flash_bank *bank, char *buf, int buf_
 	}
 	LOG_DEBUG("ID[7] = %08" PRIX32, chipid[7]);
 
-	snprintf(buf, buf_size, "XMC%" PRIx32 "00 %X flash %uKB ROM %uKB SRAM %uKB",
+	snprintf(buf, buf_size, "XMC%" PRIx32 "00 %" PRIX32 " flash %" PRIu32 "KB ROM %" PRIu32 "KB SRAM %" PRIu32 "KB",
 			(chipid[0] >> 12) & 0xff,
 			0xAA + (chipid[7] >> 28) - 1,
 			(((chipid[6] >> 12) & 0x3f) - 1) * 4,
-- 
2.30.2