From 79f519bb633e0d37a9b9ce4b7a1dc16aa14014cd Mon Sep 17 00:00:00 2001 From: Tomas Vanek Date: Sun, 21 Jan 2024 12:29:14 +0100 Subject: [PATCH] target/cortex_m: fix couple of comments Fix obsoleted references to Cortex-M3 from the time when M3 was the only supported Cortex. Fix typo. Signed-off-by: Tomas Vanek Change-Id: I6f93265f1b9328fec063fecd819210deb28aaf2c Reviewed-on: https://review.openocd.org/c/openocd/+/8099 Tested-by: jenkins Reviewed-by: Antonio Borneo --- src/target/cortex_m.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c index fb1794af22..4894cabf8b 100644 --- a/src/target/cortex_m.c +++ b/src/target/cortex_m.c @@ -1607,7 +1607,7 @@ static int cortex_m_assert_reset(struct target *target) } /* some cores support connecting while srst is asserted - * use that mode is it has been configured */ + * use that mode if it has been configured */ bool srst_asserted = false; @@ -1693,9 +1693,8 @@ static int cortex_m_assert_reset(struct target *target) /* srst is asserted, ignore AP access errors */ retval = ERROR_OK; } else { - /* Use a standard Cortex-M3 software reset mechanism. - * We default to using VECTRESET as it is supported on all current cores - * (except Cortex-M0, M0+ and M1 which support SYSRESETREQ only!) + /* Use a standard Cortex-M software reset mechanism. + * We default to using VECTRESET. * This has the disadvantage of not resetting the peripherals, so a * reset-init event handler is needed to perform any peripheral resets. */ @@ -2785,7 +2784,7 @@ static int cortex_m_init_arch_info(struct target *target, armv7m_init_arch_info(target, armv7m); /* default reset mode is to use srst if fitted - * if not it will use CORTEX_M3_RESET_VECTRESET */ + * if not it will use CORTEX_M_RESET_VECTRESET */ cortex_m->soft_reset_config = CORTEX_M_RESET_VECTRESET; armv7m->arm.dap = dap; @@ -2842,8 +2841,7 @@ static int cortex_m_verify_pointer(struct command_invocation *cmd, /* * Only stuff below this line should need to verify that its target - * is a Cortex-M3. Everything else should have indirected through the - * cortexm3_target structure, which is only used with CM3 targets. + * is a Cortex-M with available DAP access (not a HLA adapter). */ COMMAND_HANDLER(handle_cortex_m_vector_catch_command) @@ -2902,7 +2900,7 @@ COMMAND_HANDLER(handle_cortex_m_vector_catch_command) break; } if (i == ARRAY_SIZE(vec_ids)) { - LOG_TARGET_ERROR(target, "No CM3 vector '%s'", CMD_ARGV[CMD_ARGC]); + LOG_TARGET_ERROR(target, "No Cortex-M vector '%s'", CMD_ARGV[CMD_ARGC]); return ERROR_COMMAND_SYNTAX_ERROR; } } -- 2.30.2