From 8d1dcb9bcde55ff29c1967d86c5f8985620df923 Mon Sep 17 00:00:00 2001 From: =?utf8?q?=C3=98yvind=20Harboe?= Date: Mon, 21 Jun 2010 09:02:02 +0200 Subject: [PATCH] cortex a8: add missing error handling MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit cortex examine was missing error handling. Signed-off-by: Øyvind Harboe --- src/target/cortex_a8.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/src/target/cortex_a8.c b/src/target/cortex_a8.c index cfec48b651..933b42e4ce 100644 --- a/src/target/cortex_a8.c +++ b/src/target/cortex_a8.c @@ -1523,8 +1523,14 @@ static int cortex_a8_examine_first(struct target *target) /* We do one extra read to ensure DAP is configured, * we call ahbap_debugport_init(swjdp) instead */ - ahbap_debugport_init(swjdp); - mem_ap_read_atomic_u32(swjdp, armv7a->debug_base + CPUDBG_CPUID, &cpuid); + retval = ahbap_debugport_init(swjdp); + if (retval != ERROR_OK) + return retval; + + retval = mem_ap_read_atomic_u32(swjdp, armv7a->debug_base + CPUDBG_CPUID, &cpuid); + if (retval != ERROR_OK) + return retval; + if ((retval = mem_ap_read_atomic_u32(swjdp, armv7a->debug_base + CPUDBG_CPUID, &cpuid)) != ERROR_OK) { @@ -1559,7 +1565,9 @@ static int cortex_a8_examine_first(struct target *target) LOG_DEBUG("didr = 0x%08" PRIx32, didr); armv7a->armv4_5_common.core_type = ARM_MODE_MON; - cortex_a8_dpm_setup(cortex_a8, didr); + retval = cortex_a8_dpm_setup(cortex_a8, didr); + if (retval != ERROR_OK) + return retval; /* Setup Breakpoint Register Pairs */ cortex_a8->brp_num = ((didr >> 24) & 0x0F) + 1; -- 2.30.2