From 8e5eaac5291b69a73d7cd943b26bc5235d34ef13 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Andreas=20F=C3=A4rber?= Date: Thu, 23 Apr 2015 12:30:39 +0200 Subject: [PATCH] tcl/interface/ftdi: Add Digilent JTAG-HS3 config MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Derived from tcl/interface/digilent-hs1.cfg. JTAG-HS3 has an open drain buffer on pin 14 for SRST to work with PS_SRST_B on Xilinx Zynq SoC. Change-Id: I1e9e72d0511528a61207e318aff937ae9fad5bf9 Signed-off-by: Andreas Färber Reviewed-on: http://openocd.zylin.com/2728 Tested-by: jenkins Reviewed-by: Robert Jordens Reviewed-by: Spencer Oliver --- tcl/interface/ftdi/digilent_jtag_hs3.cfg | 13 +++++++++++++ 1 file changed, 13 insertions(+) create mode 100644 tcl/interface/ftdi/digilent_jtag_hs3.cfg diff --git a/tcl/interface/ftdi/digilent_jtag_hs3.cfg b/tcl/interface/ftdi/digilent_jtag_hs3.cfg new file mode 100644 index 0000000000..f7b8e570cc --- /dev/null +++ b/tcl/interface/ftdi/digilent_jtag_hs3.cfg @@ -0,0 +1,13 @@ +# +# Digilent JTAG-HS3 +# + +interface ftdi +ftdi_vid_pid 0x0403 0x6014 +ftdi_device_desc "Digilent USB Device" + +# From Digilent support: +# The SRST pin is [...] 0x20 and 0x10 is the /OE (active low output enable) + +ftdi_layout_init 0x2088 0x308b +ftdi_layout_signal nSRST -data 0x2000 -noe 0x1000 -- 2.30.2