From abd78a0ff8df04cd46a68ff8a716bf1eda215af0 Mon Sep 17 00:00:00 2001 From: Moritz Fischer Date: Wed, 5 Jul 2017 11:48:34 -0700 Subject: [PATCH] zynq_7000: Add zynqpl_program command This allows for programming the PL part of the Xilinx Zynq 7000 Change-Id: I89e86c0f381951091f6948c46802d17d7f1f3500 Signed-off-by: Moritz Fischer Reviewed-on: http://openocd.zylin.com/4177 Tested-by: jenkins Reviewed-by: Matthias Welwarsky --- tcl/target/zynq_7000.cfg | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/tcl/target/zynq_7000.cfg b/tcl/target/zynq_7000.cfg index 07a6c83523..1562768c53 100644 --- a/tcl/target/zynq_7000.cfg +++ b/tcl/target/zynq_7000.cfg @@ -27,3 +27,22 @@ adapter_khz 1000 ${_TARGETNAME}0 configure -event reset-assert-post "cortex_a dbginit" ${_TARGETNAME}1 configure -event reset-assert-post "cortex_a dbginit" + +pld device virtex2 zynq_pl.bs 1 + +set XC7_JSHUTDOWN 0x0d +set XC7_JPROGRAM 0x0b +set XC7_JSTART 0x0c +set XC7_BYPASS 0x3f + +proc zynqpl_program {tap} { + global XC7_JSHUTDOWN XC7_JPROGRAM XC7_JSTART XC7_BYPASS + irscan $tap $XC7_JSHUTDOWN + irscan $tap $XC7_JPROGRAM + runtest 60000 + #JSTART prevents this from working... + #irscan $tap $XC7_JSTART + runtest 2000 + irscan $tap $XC7_BYPASS + runtest 2000 +} -- 2.30.2