From cdb6ea4f9ff6f61dc4eeadab4dd3edd5d49ab88e Mon Sep 17 00:00:00 2001 From: Tarek BOCHKATI Date: Sun, 29 Aug 2021 16:33:55 +0100 Subject: [PATCH 1/1] flash/stm32l4x: fix segmentation fault with HLA adapters and STM32WLx devices CPU2 (Cortex-M0+) is supported only with non-hla adapters because it is on AP1. Using HLA adapters armv7m.debug_ap is null, and checking ap_num triggers a segfault. Change-Id: I501f5b69e629aa8d2836b5194063d74d5bfddb12 Signed-off-by: Tarek BOCHKATI Fixes: https://github.com/STMicroelectronics/OpenOCD/issues/6 Reviewed-on: https://review.openocd.org/c/openocd/+/6535 Tested-by: jenkins Reviewed-by: Oleksij Rempel --- src/flash/nor/stm32l4x.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/src/flash/nor/stm32l4x.c b/src/flash/nor/stm32l4x.c index e4d291e6dc..8734aeb784 100644 --- a/src/flash/nor/stm32l4x.c +++ b/src/flash/nor/stm32l4x.c @@ -1646,7 +1646,10 @@ static int stm32l4_read_idcode(struct flash_bank *bank, uint32_t *id) struct cortex_m_common *cortex_m = target_to_cm(bank->target); - if (cortex_m->core_info->partno == CORTEX_M0P_PARTNO && cortex_m->armv7m.debug_ap->ap_num == 1) { + /* CPU2 (Cortex-M0+) is supported only with non-hla adapters because it is on AP1. + * Using HLA adapters armv7m.debug_ap is null, and checking ap_num triggers a segfault */ + if (cortex_m->core_info->partno == CORTEX_M0P_PARTNO && + cortex_m->armv7m.debug_ap && cortex_m->armv7m.debug_ap->ap_num == 1) { uint32_t uid64_ids; /* UID64 is contains @@ -1954,7 +1957,10 @@ static int stm32l4_probe(struct flash_bank *bank) page_size_kb = 2; num_pages = flash_size_kb / page_size_kb; stm32l4_info->bank1_sectors = num_pages; - if (armv7m->debug_ap->ap_num == 1) + + /* CPU2 (Cortex-M0+) is supported only with non-hla adapters because it is on AP1. + * Using HLA adapters armv7m->debug_ap is null, and checking ap_num triggers a segfault */ + if (armv7m->debug_ap && armv7m->debug_ap->ap_num == 1) stm32l4_info->flash_regs = stm32wl_cpu2_flash_regs; break; default: -- 2.30.2