From fc4cbc0f988c347be298518b32643fc2fc4e692d Mon Sep 17 00:00:00 2001
From: Andrew Leech <coronasensei@gmail.com>
Date: Tue, 9 Nov 2010 08:05:02 +0100
Subject: [PATCH] lpc3131: target definition

---
 tcl/target/lpc3131.cfg | 76 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 76 insertions(+)
 create mode 100644 tcl/target/lpc3131.cfg

diff --git a/tcl/target/lpc3131.cfg b/tcl/target/lpc3131.cfg
new file mode 100644
index 0000000000..5c6aa3ce86
--- /dev/null
+++ b/tcl/target/lpc3131.cfg
@@ -0,0 +1,76 @@
+######################################
+# Target:    NXP lpc3131
+######################################
+
+if { [info exists CHIPNAME] } {
+   set  _CHIPNAME $CHIPNAME
+} else {
+   set  _CHIPNAME lpc3131
+}
+
+if { [info exists ENDIAN] } {
+   set  _ENDIAN $ENDIAN
+} else {
+   set  _ENDIAN little
+}
+
+# ARM926EJS core
+if { [info exists CPUTAPID ] } {
+   set _CPUTAPID $CPUTAPID
+} else {
+   set _CPUTAPID 0x07926f0f
+}
+
+# Scan Tap
+# Wired to seperate STDO pin on the lpc3131, externally muxed to TDO on ea3131 module 
+# JTAGSEL pin must be 0 to activate, which reassigns arm tdo to a pass through.
+if { [info exists SJCTAPID ] } {
+   set _SJCTAPID $SJCTAPID
+} else {
+   set _SJCTAPID 0x1541E02B
+}
+
+jtag newtap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
+
+##################################################################
+# various symbol definitions, to avoid hard-wiring addresses
+##################################################################
+
+global lpc313x
+set lpc313x [ dict create ]
+
+# Physical addresses for controllers and memory
+dict set lpc313x sram0			0x11028000
+dict set lpc313x sram1			0x11040000
+dict set lpc313x uart			0x15001000
+dict set lpc313x cgu			0x13004000
+dict set lpc313x ioconfig		0x13003000
+dict set lpc313x sysconfig		0x13002800
+dict set lpc313x wdt			0x13002400
+
+##################################################################
+# Target configuration
+##################################################################
+
+jtag_nsrst_delay 1000
+jtag_ntrst_delay 0
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME 
+
+$_TARGETNAME invoke-event halted
+
+$_TARGETNAME configure -work-area-phys [dict get $lpc313x sram0] -work-area-size 0x30000 -work-area-backup 0
+
+$_TARGETNAME configure -event reset-init {
+	echo "\nRunning reset init script for LPC3131\n"
+	halt
+	wait_halt
+	reg cpsr 0xa00000d3	#Supervisor mode
+	reg pc 0x11029000
+	poll
+	sleep 500
+}
+
+arm7_9 fast_memory_access enable
+arm7_9 dcc_downloads enable
-- 
2.30.2