jtag/vdebug: adding xtensa config

[openocd.git] / tcl / target / stm32l1.cfg

diff --git a/tcl/target/stm32l1.cfg b/tcl/target/stm32l1.cfg
index 054fa9b74f64667d5093f8ebbaef6e0b8a6899f9..53d9076e19752626174605c306416a2c93a282e0 100644 (file)
--- a/tcl/target/stm32l1.cfg
+++ b/tcl/target/stm32l1.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 #
 # stm32l1 devices support both JTAG and SWD transports.
 #
@@ -23,9 +25,9 @@ if { [info exists WORKAREASIZE] } {
 
 # JTAG speed should be <= F_CPU/6.
 # F_CPU after reset is 2MHz, so use F_JTAG max = 333kHz
-adapter_khz 300
+adapter speed 300
 
-adapter_nsrst_delay 100
+adapter srst delay 100
 if {[using_jtag]} {
  jtag_ntrst_delay 100
 }
@@ -73,13 +75,13 @@ proc stm32l_enable_HSI {} {
        echo "STM32L: Enabling HSI"
 
        # Set HSION in RCC_CR
-       mww 0x40023800 0x00000101
+       mmw 0x40023800 0x00000101 0
 
        # Set HSI as SYSCLK
-       mww 0x40023808 0x00000001
+       mmw 0x40023808 0x00000001 0
 
        # Increase JTAG speed
-       adapter_khz 2000
+       adapter speed 2000
 }
 
 $_TARGETNAME configure -event reset-init {
@@ -87,7 +89,7 @@ $_TARGETNAME configure -event reset-init {
 }
 
 $_TARGETNAME configure -event reset-start {
-       adapter_khz 300
+       adapter speed 300
 }
 
 $_TARGETNAME configure -event examine-end {
@@ -99,9 +101,16 @@ $_TARGETNAME configure -event examine-end {
        mmw 0xE0042008 0x00001800 0
 }
 
-$_TARGETNAME configure -event trace-config {
+tpiu create $_CHIPNAME.tpiu -dap $_CHIPNAME.dap -ap-num 0 -baseaddr 0xE0040000
+
+lappend _telnet_autocomplete_skip _proc_pre_enable_$_CHIPNAME.tpiu
+proc _proc_pre_enable_$_CHIPNAME.tpiu {_targetname} {
+       targets $_targetname
+
        # Set TRACE_IOEN; TRACE_MODE is set to async; when using sync
        # change this value accordingly to configure trace pins
        # assignment
        mmw 0xE0042004 0x00000020 0
 }
+
+$_CHIPNAME.tpiu configure -event pre-enable "_proc_pre_enable_$_CHIPNAME.tpiu $_TARGETNAME"