contrib/firmware/angie/hdl/src/angie_openocd.ucf

   1 ## SPDX-License-Identifier: BSD-3-Clause
   2 ##--------------------------------------------------------------------------
   3 ## Project Context: nanoXplore USB-JTAG Adapter Board, Spartan6
   4 ## Design Name:     NJTAG USB-JTAG Adapter FPGA source code
   5 ## Module Name:     _angie_openocd.ucf
   6 ## Target Device:   XC6SLX9-2 TQ144
   7 ## Tool versions:   ISE Webpack 13.2 -> 14.2
   8 ## Author:          Ahmed BOUDJELIDA    nanoXplore SAS
   9 ##--------------------------------------------------------------------------
  10 # WARNING: PullUps on JTAG inputs should be enabled after configuration
  11 # (bitgen option) since the pins are not connected.
  12
  13 net TRST        LOC = 'P48' ;
  14 net TMS         LOC = 'P43' ;
  15 net TCK         LOC = 'P44' ;
  16 net TDI         LOC = 'P45' ;
  17 net TDO         LOC = 'P46' ;
  18 net SRST    LOC = 'P61' ;
  19 net SI_TDO      LOC = 'P16' ;
  20 net SO_TRST     LOC = 'P32' ;
  21 net SO_TMS      LOC = 'P27' ;
  22 net SO_TCK      LOC = 'P30' ;
  23 net SO_TDI      LOC = 'P26' ;
  24 net SO_SRST     LOC = 'P12' ;
  25 net ST_0        LOC = 'P29' ;
  26 net ST_1        LOC = 'P21' ;
  27 net ST_2        LOC = 'P11' ;
  28 net FTP<0>      LOC = 'P121' ;
  29 net FTP<1>      LOC = 'P120' ;
  30 net FTP<2>      LOC = 'P119' ;
  31 net FTP<3>      LOC = 'P116' ;
  32 net FTP<4>      LOC = 'P111' ;
  33 net FTP<5>      LOC = 'P112' ;
  34 net FTP<6>      LOC = 'P115' ;
  35 net FTP<7>      LOC = 'P114' ;