1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 /***************************************************************************
4 * Copyright (C) 2015 by Ivan Meleca *
6 ***************************************************************************/
9 * r0 = flash destination address, status
11 * r2 = workarea start address
12 * r3 = workarea end address
28 ldr r6, [r2, #0] /* read wp */
29 cmp r6, #0 /* abort if wp == 0 */
31 ldr r5, [r2, #4] /* read rp */
32 cmp r5, r6 /* wait until rp != wp */
35 ldr r6, fstat /* Clear error flags */
39 ldr r6, fccobix /* FCCOBIX = 0 */
43 ldr r6, fccobhi /* Program FLASH command */
44 mov r7, #6 /* FCCOBHI = 6 */
47 lsr r7, r0, #16 /* FCCOBLO = flash destination address >> 16 */
51 ldr r6, fccobix /* Index for lower byte address bits[15:0] */
53 strb r7, [r6] /* FCCOBIX = 1*/
55 uxtb r7, r0 /* Memory address bits[15:0] */
57 strb r7, [r6] /* FCCOBLO = flash destination address */
61 strb r7, [r6] /* FCCOBHI = flash destination address >> 8 */
63 ldr r6, fccobix /* FCCOBIX = 2 */
67 ldrb r7, [r5, #1] /* FCCOBHI = rp >> 8 */
71 ldrb r7, [r5] /* FCCOBLO = rp */
75 ldr r6, fccobix /* FCCOBIX = 3 */
79 ldrb r7, [r5, #3] /* FCCOBHI = rp >> 24 */
83 ldrb r7, [r5, #2] /* FCCOBLO = rp >> 16 */
87 sub r1, r1, #1 /* Two words (4 bytes) queued, decrement counter */
88 add r0, r0, #4 /* flash address += 4 */
89 add r5, r5, #4 /* rp += 4 */
91 cmp r5, r3 /* Wrap? */
97 cmp r1, #0 /* Done? */
100 ldr r6, [r2, #0] /* read wp */
102 beq execute /* execute if rp == wp */
104 ldr r6, fccobix /* FCCOBIX = 4 */
108 ldrb r7, [r5, #1] /* FCCOBHI = rp >> 8 */
112 ldrb r7, [r5] /* FCCOBLO = rp */
116 ldr r6, fccobix /* FCCOBIX = 5 */
120 ldrb r7, [r5, #3] /* FCCOBHI = rp >> 24 */
124 ldrb r7, [r5, #2] /* FCCOBLO = rp >> 16 */
128 sub r1, r1, #1 /* Two words (4 bytes) queued, decrement counter */
129 add r0, r0, #4 /* flash address += 4 */
130 add r5, r5, #4 /* rp += 4 */
132 cmp r5, r3 /* Wrap? */
138 ldr r6, fstat /* Launch the command */
144 ldrb r6, [r6] /* Wait until finished */
148 mov r7, #48 /* Check error */
152 mov r6, #0 /* Clear error */
154 str r5, [r2, #4] /* Store rp */
156 cmp r1, #0 /* Done? */
162 str r0, [r2, #4] /* set rp = 0 on error */
165 mov r0, r6 /* Set result code */