[openocd.git] / doc / openocd.texi
1 \input texinfo @c -*-texinfo-*-
2 @c %**start of header
3 @setfilename openocd.info
4 @settitle Open On-Chip Debugger (OpenOCD)
5 @dircategory Development
6 @direntry
7 * OpenOCD: (openocd). Open On-Chip Debugger.
8 @end direntry
9 @c %**end of header
11 @include version.texi
13 @copying
14 Copyright @copyright{} 2007-2008 Spen @email{spen@@spen-soft.co.uk}@*
15 Copyright @copyright{} 2008 Oyvind Harboe @email{oyvind.harboe@@zylin.com}
16 @quotation
17 Permission is granted to copy, distribute and/or modify this document
18 under the terms of the GNU Free Documentation License, Version 1.2 or
19 any later version published by the Free Software Foundation; with no
20 Invariant Sections, with no Front-Cover Texts, and with no Back-Cover
21 Texts. A copy of the license is included in the section entitled ``GNU
22 Free Documentation License''.
23 @end quotation
24 @end copying
26 @titlepage
27 @title Open On-Chip Debugger (OpenOCD)
28 @subtitle Edition @value{EDITION} for OpenOCD version @value{VERSION}
29 @subtitle @value{UPDATED}
30 @page
31 @vskip 0pt plus 1filll
32 @insertcopying
33 @end titlepage
35 @contents
37 @node Top, About, , (dir)
38 @top OpenOCD
40 This manual documents edition @value{EDITION} of the Open On-Chip Debugger
41 (OpenOCD) version @value{VERSION}, @value{UPDATED}.
43 @insertcopying
45 @menu
46 * About:: About OpenOCD.
47 * Developers:: OpenOCD developers
48 * Building:: Building OpenOCD
49 * Running:: Running OpenOCD
50 * Configuration:: OpenOCD Configuration.
51 * Target library:: Target library
52 * Commands:: OpenOCD Commands
53 * Sample Scripts:: Sample Target Scripts
54 * GDB and OpenOCD:: Using GDB and OpenOCD
55 * TCL and OpenOCD:: Using TCL and OpenOCD
56 * TCL scripting API:: Tcl scripting API
57 * Upgrading:: Deprecated/Removed Commands
58 * FAQ:: Frequently Asked Questions
59 * License:: GNU Free Documentation License
60 * Index:: Main index.
61 @end menu
63 @node About
64 @unnumbered About
65 @cindex about
67 The Open On-Chip Debugger (OpenOCD) aims to provide debugging, in-system programming
68 and boundary-scan testing for embedded target devices. The targets are interfaced
69 using JTAG (IEEE 1149.1) compliant hardware, but this may be extended to other
70 connection types in the future.
72 OpenOCD currently supports Wiggler (clones), FTDI FT2232 based JTAG interfaces, the
73 Amontec JTAG Accelerator, and the Gateworks GW1602. It allows ARM7 (ARM7TDMI and ARM720t),
74 ARM9 (ARM920t, ARM922t, ARM926ej--s, ARM966e--s), XScale (PXA25x, IXP42x) and
75 Cortex-M3 (Luminary Stellaris LM3 and ST STM32) based cores to be debugged.
77 Flash writing is supported for external CFI compatible flashes (Intel and AMD/Spansion
78 command set) and several internal flashes (LPC2000, AT91SAM7, STR7x, STR9x, LM3
79 and STM32x). Preliminary support for using the LPC3180's NAND flash controller is included.
81 @node Developers
82 @chapter Developers
83 @cindex developers
85 OpenOCD was created by Dominic Rath as part of a diploma thesis written at the
86 University of Applied Sciences Augsburg (@uref{http://www.fh-augsburg.de}).
87 Others interested in improving the state of free and open debug and testing technology
88 are welcome to participate.
90 Other developers have contributed support for additional targets and flashes as well
91 as numerous bugfixes and enhancements. See the AUTHORS file for regular contributors.
93 The main OpenOCD web site is available at @uref{http://openocd.berlios.de/web/}
95 @node Building
96 @chapter Building
97 @cindex building OpenOCD
99 If you are interested in getting actual work done rather than building
100 OpenOCD, then check if your interface supplier provides binaries for
101 you. Chances are that that binary is from some SVN version that is more
102 stable than SVN trunk where bleeding edge development takes place.
105 You can download the current SVN version with SVN client of your choice from the
106 following repositories:
108 (@uref{svn://svn.berlios.de/openocd/trunk})
110 or
112 (@uref{http://svn.berlios.de/svnroot/repos/openocd/trunk})
114 Using the SVN command line client, you can use the following command to fetch the
115 latest version (make sure there is no (non-svn) directory called "openocd" in the
116 current directory):
118 @smallexample
119 svn checkout svn://svn.berlios.de/openocd/trunk openocd
120 @end smallexample
122 Building OpenOCD requires a recent version of the GNU autotools.
123 On my build system, I'm using autoconf 2.13 and automake 1.9. For building on Windows,
124 you have to use Cygwin. Make sure that your @env{PATH} environment variable contains no
125 other locations with Unix utils (like UnxUtils) - these can't handle the Cygwin
126 paths, resulting in obscure dependency errors (This is an observation I've gathered
127 from the logs of one user - correct me if I'm wrong).
129 You further need the appropriate driver files, if you want to build support for
130 a FTDI FT2232 based interface:
131 @itemize @bullet
132 @item @b{ftdi2232} libftdi (@uref{http://www.intra2net.com/opensource/ftdi/})
133 @item @b{ftd2xx} libftd2xx (@uref{http://www.ftdichip.com/Drivers/D2XX.htm})
134 @item When using the Amontec JTAGkey, you have to get the drivers from the Amontec
135 homepage (@uref{www.amontec.com}), as the JTAGkey uses a non-standard VID/PID.
136 @end itemize
138 libftdi is supported under windows. Versions earlier than 0.13 will require patching.
139 see contrib/libftdi for more details.
141 In general, the D2XX driver provides superior performance (several times as fast),
142 but has the draw-back of being binary-only - though that isn't that bad, as it isn't
143 a kernel module, only a user space library.
145 To build OpenOCD (on both Linux and Cygwin), use the following commands:
146 @smallexample
147 ./bootstrap
148 @end smallexample
149 Bootstrap generates the configure script, and prepares building on your system.
150 @smallexample
151 ./configure
152 @end smallexample
153 Configure generates the Makefiles used to build OpenOCD.
154 @smallexample
155 make
156 @end smallexample
157 Make builds OpenOCD, and places the final executable in ./src/.
159 The configure script takes several options, specifying which JTAG interfaces
160 should be included:
162 @itemize @bullet
163 @item
164 @option{--enable-parport}
165 @item
166 @option{--enable-parport_ppdev}
167 @item
168 @option{--enable-parport_giveio}
169 @item
170 @option{--enable-amtjtagaccel}
171 @item
172 @option{--enable-ft2232_ftd2xx}
173 @footnote{Using the latest D2XX drivers from FTDI and following their installation
174 instructions, I had to use @option{--enable-ft2232_libftd2xx} for OpenOCD to
175 build properly.}
176 @item
177 @option{--enable-ft2232_libftdi}
178 @item
179 @option{--with-ftd2xx=/path/to/d2xx/}
180 @item
181 @option{--enable-gw16012}
182 @item
183 @option{--enable-usbprog}
184 @item
185 @option{--enable-presto_libftdi}
186 @item
187 @option{--enable-presto_ftd2xx}
188 @item
189 @option{--enable-jlink}
190 @end itemize
192 If you want to access the parallel port using the PPDEV interface you have to specify
193 both the @option{--enable-parport} AND the @option{--enable-parport_ppdev} option since
194 the @option{--enable-parport_ppdev} option actually is an option to the parport driver
195 (see @uref{http://forum.sparkfun.com/viewtopic.php?t=3795} for more info).
197 Cygwin users have to specify the location of the FTDI D2XX package. This should be an
198 absolute path containing no spaces.
200 Linux users should copy the various parts of the D2XX package to the appropriate
201 locations, i.e. /usr/include, /usr/lib.
203 Miscellaneous configure options
205 @itemize @bullet
206 @item
207 @option{--enable-gccwarnings} - enable extra gcc warnings during build
208 @end itemize
210 @node Running
211 @chapter Running
212 @cindex running OpenOCD
213 @cindex --configfile
214 @cindex --debug_level
215 @cindex --logfile
216 @cindex --search
217 OpenOCD runs as a daemon, waiting for connections from clients (Telnet, GDB, Other).
218 Run with @option{--help} or @option{-h} to view the available command line switches.
220 It reads its configuration by default from the file openocd.cfg located in the current
221 working directory. This may be overwritten with the @option{-f <configfile>} command line
222 switch. The @option{-f} command line switch can be specified multiple times, in which case the config files
223 are executed in order.
225 Also it is possible to interleave commands w/config scripts using the @option{-c} command line switch.
227 To enable debug output (when reporting problems or working on OpenOCD itself), use
228 the @option{-d} command line switch. This sets the @option{debug_level} to "3", outputting
229 the most information, including debug messages. The default setting is "2", outputting
230 only informational messages, warnings and errors. You can also change this setting
231 from within a telnet or gdb session using @option{debug_level <n>} @xref{debug_level}.
233 You can redirect all output from the daemon to a file using the @option{-l <logfile>} switch.
235 Search paths for config/script files can be added to OpenOCD by using
236 the @option{-s <search>} switch. The current directory and the OpenOCD target library
237 is in the search path by default.
239 Note! OpenOCD will launch the GDB & telnet server even if it can not establish a connection
240 with the target. In general, it is possible for the JTAG controller to be unresponsive until
241 the target is set up correctly via e.g. GDB monitor commands in a GDB init script.
243 @node Configuration
244 @chapter Configuration
245 @cindex configuration
246 OpenOCD runs as a daemon, and reads it current configuration
247 by default from the file openocd.cfg in the current directory. A different configuration
248 file can be specified with the @option{-f <conf.file>} command line switch specified when starting OpenOCD.
250 The configuration file is used to specify on which ports the daemon listens for new
251 connections, the JTAG interface used to connect to the target, the layout of the JTAG
252 chain, the targets that should be debugged, and connected flashes.
254 @section Daemon configuration
256 @itemize @bullet
257 @item @b{init}
258 @*This command terminates the configuration stage and enters the normal
259 command mode. This can be useful to add commands to the startup scripts and commands
260 such as resetting the target, programming flash, etc. To reset the CPU upon startup,
261 add "init" and "reset" at the end of the config script or at the end of the
262 OpenOCD command line using the @option{-c} command line switch.
263 @cindex init
264 @item @b{telnet_port} <@var{number}>
265 @cindex telnet_port
266 @*Port on which to listen for incoming telnet connections
267 @item @b{tcl_port} <@var{number}>
268 @cindex tcl_port
269 @*Port on which to listen for incoming TCL syntax. This port is intended as
270 a simplified RPC connection that can be used by clients to issue commands
271 and get the output from the TCL engine.
272 @item @b{gdb_port} <@var{number}>
273 @cindex gdb_port
274 @*First port on which to listen for incoming GDB connections. The GDB port for the
275 first target will be gdb_port, the second target will listen on gdb_port + 1, and so on.
276 @item @b{gdb_breakpoint_override} <@var{hard|soft|disabled}>
277 @cindex gdb_breakpoint_override
278 @anchor{gdb_breakpoint_override}
279 @*Force breakpoint type for gdb 'break' commands.
280 The raison d'etre for this option is to support GDB GUI's without
281 a hard/soft breakpoint concept where the default OpenOCD and
282 GDB behaviour is not sufficient. Note that GDB will use hardware
283 breakpoints if the memory map has been set up for flash regions.
285 This option replaces older arm7_9 target commands that addressed
286 the same issue.
287 @item @b{gdb_detach} <@var{resume|reset|halt|nothing}>
288 @cindex gdb_detach
289 @*Configures what OpenOCD will do when gdb detaches from the daeman.
290 Default behaviour is <@var{resume}>
291 @item @b{gdb_memory_map} <@var{enable|disable}>
292 @cindex gdb_memory_map
293 @*Set to <@var{enable}> to cause OpenOCD to send the memory configuration to gdb when
294 requested. gdb will then know when to set hardware breakpoints, and program flash
295 using the gdb load command. @option{gdb_flash_program enable} will also need enabling
296 for flash programming to work.
297 Default behaviour is <@var{enable}>
298 @xref{gdb_flash_program}.
299 @item @b{gdb_flash_program} <@var{enable|disable}>
300 @cindex gdb_flash_program
301 @anchor{gdb_flash_program}
302 @*Set to <@var{enable}> to cause OpenOCD to program the flash memory when a
303 vFlash packet is received.
304 Default behaviour is <@var{enable}>
305 @end itemize
307 @section JTAG interface configuration
309 @itemize @bullet
310 @item @b{interface} <@var{name}>
311 @cindex interface
312 @*Use the interface driver <@var{name}> to connect to the target. Currently supported
313 interfaces are
314 @itemize @minus
315 @item @b{parport}
316 PC parallel port bit-banging (Wigglers, PLD download cable, ...)
317 @end itemize
318 @itemize @minus
319 @item @b{amt_jtagaccel}
320 Amontec Chameleon in its JTAG Accelerator configuration connected to a PC's EPP
321 mode parallel port
322 @end itemize
323 @itemize @minus
324 @item @b{ft2232}
325 FTDI FT2232 based devices using either the open-source libftdi or the binary only
326 FTD2XX driver. The FTD2XX is superior in performance, but not available on every
327 platform. The libftdi uses libusb, and should be portable to all systems that provide
328 libusb.
329 @end itemize
330 @itemize @minus
331 @item @b{ep93xx}
332 Cirrus Logic EP93xx based single-board computer bit-banging (in development)
333 @end itemize
334 @itemize @minus
335 @item @b{presto}
336 ASIX PRESTO USB JTAG programmer.
337 @end itemize
338 @itemize @minus
339 @item @b{usbprog}
340 usbprog is a freely programmable USB adapter.
341 @end itemize
342 @itemize @minus
343 @item @b{gw16012}
344 Gateworks GW16012 JTAG programmer.
345 @end itemize
346 @itemize @minus
347 @item @b{jlink}
348 Segger jlink usb adapter
349 @end itemize
350 @end itemize
352 @itemize @bullet
353 @item @b{jtag_speed} <@var{reset speed}>
354 @cindex jtag_speed
355 @*Limit the maximum speed of the JTAG interface. Usually, a value of zero means maximum
356 speed. The actual effect of this option depends on the JTAG interface used.
358 The speed used during reset can be adjusted using setting jtag_speed during
359 pre_reset and post_reset events.
360 @itemize @minus
362 @item wiggler: maximum speed / @var{number}
363 @item ft2232: 6MHz / (@var{number}+1)
364 @item amt jtagaccel: 8 / 2**@var{number}
365 @item jlink: maximum speed in kHz (0-12000), 0 will use RTCK
366 @end itemize
368 Note: Make sure the jtag clock is no more than @math{1/6th × CPU-Clock}. This is
369 especially true for synthesized cores (-S).
371 @item @b{jtag_khz} <@var{reset speed kHz}>
372 @cindex jtag_khz
373 @*Same as jtag_speed, except that the speed is specified in maximum kHz. If
374 the device can not support the rate asked for, or can not translate from
375 kHz to jtag_speed, then an error is returned. 0 means RTCK. If RTCK
376 is not supported, then an error is reported.
378 @item @b{reset_config} <@var{signals}> [@var{combination}] [@var{trst_type}] [@var{srst_type}]
379 @cindex reset_config
380 @*The configuration of the reset signals available on the JTAG interface AND the target.
381 If the JTAG interface provides SRST, but the target doesn't connect that signal properly,
382 then OpenOCD can't use it. <@var{signals}> can be @option{none}, @option{trst_only},
383 @option{srst_only} or @option{trst_and_srst}.
385 [@var{combination}] is an optional value specifying broken reset signal implementations.
386 @option{srst_pulls_trst} states that the testlogic is reset together with the reset of
387 the system (e.g. Philips LPC2000, "broken" board layout), @option{trst_pulls_srst} says
388 that the system is reset together with the test logic (only hypothetical, I haven't
389 seen hardware with such a bug, and can be worked around).
390 @option{combined} imples both @option{srst_pulls_trst} and @option{trst_pulls_srst}.
391 The default behaviour if no option given is @option{separate}.
393 The [@var{trst_type}] and [@var{srst_type}] parameters allow the driver type of the
394 reset lines to be specified. Possible values are @option{trst_push_pull} (default)
395 and @option{trst_open_drain} for the test reset signal, and @option{srst_open_drain}
396 (default) and @option{srst_push_pull} for the system reset. These values only affect
397 JTAG interfaces with support for different drivers, like the Amontec JTAGkey and JTAGAccelerator.
399 @item @b{jtag_device} <@var{IR length}> <@var{IR capture}> <@var{IR mask}> <@var{IDCODE instruction}>
400 @cindex jtag_device
401 @*Describes the devices that form the JTAG daisy chain, with the first device being
402 the one closest to TDO. The parameters are the length of the instruction register
403 (4 for all ARM7/9s), the value captured during Capture-IR (0x1 for ARM7/9), and a mask
404 of bits that should be validated when doing IR scans (all four bits (0xf) for ARM7/9).
405 The IDCODE instruction will in future be used to query devices for their JTAG
406 identification code. This line is the same for all ARM7 and ARM9 devices.
407 Other devices, like CPLDs, require different parameters. An example configuration
408 line for a Xilinx XC9500 CPLD would look like this:
409 @smallexample
410 jtag_device 8 0x01 0x0e3 0xfe
411 @end smallexample
412 The instruction register (IR) is 8 bits long, during Capture-IR 0x01 is loaded into
413 the IR, but only bits 0-1 and 5-7 should be checked, the others (2-4) might vary.
414 The IDCODE instruction is 0xfe.
416 @item @b{jtag_nsrst_delay} <@var{ms}>
417 @cindex jtag_nsrst_delay
418 @*How long (in milliseconds) OpenOCD should wait after deasserting nSRST before
419 starting new JTAG operations.
420 @item @b{jtag_ntrst_delay} <@var{ms}>
421 @cindex jtag_ntrst_delay
422 @*Same @b{jtag_nsrst_delay}, but for nTRST
424 The jtag_n[st]rst_delay options are useful if reset circuitry (like a reset supervisor,
425 or on-chip features) keep a reset line asserted for some time after the external reset
426 got deasserted.
427 @end itemize
429 @section parport options
431 @itemize @bullet
432 @item @b{parport_port} <@var{number}>
433 @cindex parport_port
434 @*Either the address of the I/O port (default: 0x378 for LPT1) or the number of
435 the @file{/dev/parport} device
437 When using PPDEV to access the parallel port, use the number of the parallel port:
438 @option{parport_port 0} (the default). If @option{parport_port 0x378} is specified
439 you may encounter a problem.
440 @item @b{parport_cable} <@var{name}>
441 @cindex parport_cable
442 @*The layout of the parallel port cable used to connect to the target.
443 Currently supported cables are
444 @itemize @minus
445 @item @b{wiggler}
446 @cindex wiggler
447 The original Wiggler layout, also supported by several clones, such
448 as the Olimex ARM-JTAG
449 @item @b{wiggler2}
450 @cindex wiggler2
451 Same as original wiggler except an led is fitted on D5.
452 @item @b{wiggler_ntrst_inverted}
453 @cindex wiggler_ntrst_inverted
454 Same as original wiggler except TRST is inverted.
455 @item @b{old_amt_wiggler}
456 @cindex old_amt_wiggler
457 The Wiggler configuration that comes with Amontec's Chameleon Programmer. The new
458 version available from the website uses the original Wiggler layout ('@var{wiggler}')
459 @item @b{chameleon}
460 @cindex chameleon
461 The Amontec Chameleon's CPLD when operated in configuration mode. This is only used to
462 program the Chameleon itself, not a connected target.
463 @item @b{dlc5}
464 @cindex dlc5
465 The Xilinx Parallel cable III.
466 @item @b{triton}
467 @cindex triton
468 The parallel port adapter found on the 'Karo Triton 1 Development Board'.
469 This is also the layout used by the HollyGates design
470 (see @uref{http://www.lartmaker.nl/projects/jtag/}).
471 @item @b{flashlink}
472 @cindex flashlink
473 The ST Parallel cable.
474 @item @b{arm-jtag}
475 @cindex arm-jtag
476 Same as original wiggler except SRST and TRST connections reversed and
477 TRST is also inverted.
478 @item @b{altium}
479 @cindex altium
480 Altium Universal JTAG cable.
481 @end itemize
482 @item @b{parport_write_on_exit} <@var{on|off}>
483 @cindex parport_write_on_exit
484 @*This will configure the parallel driver to write a known value to the parallel
485 interface on exiting OpenOCD
486 @end itemize
488 @section amt_jtagaccel options
489 @itemize @bullet
490 @item @b{parport_port} <@var{number}>
491 @cindex parport_port
492 @*Either the address of the I/O port (default: 0x378 for LPT1) or the number of the
493 @file{/dev/parport} device
494 @end itemize
495 @section ft2232 options
497 @itemize @bullet
498 @item @b{ft2232_device_desc} <@var{description}>
499 @cindex ft2232_device_desc
500 @*The USB device description of the FTDI FT2232 device. If not specified, the FTDI
501 default value is used. This setting is only valid if compiled with FTD2XX support.
502 @item @b{ft2232_layout} <@var{name}>
503 @cindex ft2232_layout
504 @*The layout of the FT2232 GPIO signals used to control output-enables and reset
505 signals. Valid layouts are
506 @itemize @minus
507 @item @b{usbjtag}
508 "USBJTAG-1" layout described in the original OpenOCD diploma thesis
509 @item @b{jtagkey}
510 Amontec JTAGkey and JTAGkey-tiny
511 @item @b{signalyzer}
512 Signalyzer
513 @item @b{olimex-jtag}
514 Olimex ARM-USB-OCD
515 @item @b{m5960}
516 American Microsystems M5960
517 @item @b{evb_lm3s811}
518 Luminary Micro EVB_LM3S811 as a JTAG interface (not onboard processor), no TRST or
519 SRST signals on external connector
520 @item @b{comstick}
521 Hitex STR9 comstick
522 @item @b{stm32stick}
523 Hitex STM32 Performance Stick
524 @item @b{flyswatter}
525 Tin Can Tools Flyswatter
526 @item @b{turtelizer2}
527 egnite Software turtelizer2
528 @item @b{oocdlink}
529 OOCDLink
530 @end itemize
532 @item @b{ft2232_vid_pid} <@var{vid}> <@var{pid}>
533 @*The vendor ID and product ID of the FTDI FT2232 device. If not specified, the FTDI
534 default values are used. Multiple <@var{vid}>, <@var{pid}> pairs may be given, eg.
535 @smallexample
536 ft2232_vid_pid 0x0403 0xcff8 0x15ba 0x0003
537 @end smallexample
538 @item @b{ft2232_latency} <@var{ms}>
539 @*On some systems using ft2232 based JTAG interfaces the FT_Read function call in
540 ft2232_read() fails to return the expected number of bytes. This can be caused by
541 USB communication delays and has proved hard to reproduce and debug. Setting the
542 FT2232 latency timer to a larger value increases delays for short USB packages but it
543 also reduces the risk of timeouts before receiving the expected number of bytes.
544 The OpenOCD default value is 2 and for some systems a value of 10 has proved useful.
545 @end itemize
547 @section ep93xx options
548 @cindex ep93xx options
549 Currently, there are no options available for the ep93xx interface.
551 @page
552 @section Target configuration
554 @itemize @bullet
555 @item @b{target} <@var{type}> <@var{endianess}> <@var{JTAG pos}>
556 <@var{variant}>
557 @cindex target
558 @*Defines a target that should be debugged. Currently supported types are:
559 @itemize @minus
560 @item @b{arm7tdmi}
561 @item @b{arm720t}
562 @item @b{arm9tdmi}
563 @item @b{arm920t}
564 @item @b{arm922t}
565 @item @b{arm926ejs}
566 @item @b{arm966e}
567 @item @b{cortex_m3}
568 @item @b{feroceon}
569 @item @b{xscale}
570 @item @b{mips_m4k}
571 @end itemize
573 If you want to use a target board that is not on this list, see Adding a new
574 target board
576 Endianess may be @option{little} or @option{big}.
578 @item @b{target_script} <@var{target#}> <@var{event}> <@var{script_file}>
579 @cindex target_script
580 @*Event is one of the following:
581 @option{pre_reset}, @option{reset}, @option{post_reset}, @option{post_halt},
582 @option{pre_resume} or @option{gdb_program_config}.
583 @option{post_reset} and @option{reset} will produce the same results.
585 @item @b{working_area} <@var{target#}> <@var{address}> <@var{size}>
586 <@var{backup}|@var{nobackup}>
587 @cindex working_area
588 @*Specifies a working area for the debugger to use. This may be used to speed-up
589 downloads to target memory and flash operations, or to perform otherwise unavailable
590 operations (some coprocessor operations on ARM7/9 systems, for example). The last
591 parameter decides whether the memory should be preserved (<@var{backup}>) or can simply be overwritten (<@var{nobackup}>). If possible, use
592 a working_area that doesn't need to be backed up, as performing a backup slows down operation.
593 @end itemize
595 @subsection arm7tdmi options
596 @cindex arm7tdmi options
597 target arm7tdmi <@var{endianess}> <@var{jtag#}>
598 @*The arm7tdmi target definition requires at least one additional argument, specifying
599 the position of the target in the JTAG daisy-chain. The first JTAG device is number 0.
600 The optional [@var{variant}] parameter has been removed in recent versions.
601 The correct feature set is determined at runtime.
603 @subsection arm720t options
604 @cindex arm720t options
605 ARM720t options are similar to ARM7TDMI options.
607 @subsection arm9tdmi options
608 @cindex arm9tdmi options
609 ARM9TDMI options are similar to ARM7TDMI options. Supported variants are
610 @option{arm920t}, @option{arm922t} and @option{arm940t}.
611 This enables the hardware single-stepping support found on these cores.
613 @subsection arm920t options
614 @cindex arm920t options
615 ARM920t options are similar to ARM9TDMI options.
617 @subsection arm966e options
618 @cindex arm966e options
619 ARM966e options are similar to ARM9TDMI options.
621 @subsection cortex_m3 options
622 @cindex cortex_m3 options
623 use variant <@var{variant}> @option{lm3s} when debugging luminary lm3s targets. This will cause
624 openocd to use a software reset rather than asserting SRST to avoid a issue with clearing
625 the debug registers. This is fixed in Fury Rev B, DustDevil Rev B, Tempest, these revisions will
626 be detected and the normal reset behaviour used.
628 @subsection xscale options
629 @cindex xscale options
630 Supported variants are @option{ixp42x}, @option{ixp45x}, @option{ixp46x},
631 @option{pxa250}, @option{pxa255}, @option{pxa26x}.
633 @section Flash configuration
634 @cindex Flash configuration
636 @itemize @bullet
637 @item @b{flash bank} <@var{driver}> <@var{base}> <@var{size}> <@var{chip_width}>
638 <@var{bus_width}> <@var{target#}> [@var{driver_options ...}]
639 @cindex flash bank
640 @*Configures a flash bank at <@var{base}> of <@var{size}> bytes and <@var{chip_width}>
641 and <@var{bus_width}> bytes using the selected flash <driver>.
642 @end itemize
644 @subsection lpc2000 options
645 @cindex lpc2000 options
647 @b{flash bank lpc2000} <@var{base}> <@var{size}> 0 0 <@var{target#}> <@var{variant}>
648 <@var{clock}> [@var{calc_checksum}]
649 @*LPC flashes don't require the chip and bus width to be specified. Additional
650 parameters are the <@var{variant}>, which may be @var{lpc2000_v1} (older LPC21xx and LPC22xx)
651 or @var{lpc2000_v2} (LPC213x, LPC214x, LPC210[123], LPC23xx and LPC24xx), the number
652 of the target this flash belongs to (first is 0), the frequency at which the core
653 is currently running (in kHz - must be an integral number), and the optional keyword
654 @var{calc_checksum}, telling the driver to calculate a valid checksum for the exception
655 vector table.
657 @subsection cfi options
658 @cindex cfi options
660 @b{flash bank cfi} <@var{base}> <@var{size}> <@var{chip_width}> <@var{bus_width}>
661 <@var{target#}> [@var{jedec_probe}|@var{x16_as_x8}]
662 @*CFI flashes require the number of the target they're connected to as an additional
663 argument. The CFI driver makes use of a working area (specified for the target)
664 to significantly speed up operation.
666 @var{chip_width} and @var{bus_width} are specified in bytes.
668 The @var{jedec_probe} option is used to detect certain non-CFI flash roms, like AM29LV010 and similar types.
670 @var{x16_as_x8} ???
672 @subsection at91sam7 options
673 @cindex at91sam7 options
675 @b{flash bank at91sam7} 0 0 0 0 <@var{target#}>
676 @*AT91SAM7 flashes only require the @var{target#}, all other values are looked up after
677 reading the chip-id and type.
679 @subsection str7 options
680 @cindex str7 options
682 @b{flash bank str7x} <@var{base}> <@var{size}> 0 0 <@var{target#}> <@var{variant}>
683 @*variant can be either STR71x, STR73x or STR75x.
685 @subsection str9 options
686 @cindex str9 options
688 @b{flash bank str9x} <@var{base}> <@var{size}> 0 0 <@var{target#}>
689 @*The str9 needs the flash controller to be configured prior to Flash programming, eg.
690 @smallexample
691 str9x flash_config 0 4 2 0 0x80000
692 @end smallexample
693 This will setup the BBSR, NBBSR, BBADR and NBBADR registers respectively.
695 @subsection str9 options (str9xpec driver)
697 @b{flash bank str9xpec} <@var{base}> <@var{size}> 0 0 <@var{target#}>
698 @*Before using the flash commands the turbo mode will need enabling using str9xpec
699 @option{enable_turbo} <@var{num>.}
701 Only use this driver for locking/unlocking the device or configuring the option bytes.
702 Use the standard str9 driver for programming.
704 @subsection stellaris (LM3Sxxx) options
705 @cindex stellaris (LM3Sxxx) options
707 @b{flash bank stellaris} <@var{base}> <@var{size}> 0 0 <@var{target#}>
708 @*stellaris flash plugin only require the @var{target#}.
710 @subsection stm32x options
711 @cindex stm32x options
713 @b{flash bank stm32x} <@var{base}> <@var{size}> 0 0 <@var{target#}>
714 @*stm32x flash plugin only require the @var{target#}.
716 @subsection aduc702x options
717 @cindex aduc702x options
719 @b{flash bank aduc702x} <@var{base}> <@var{size}> 0 0 <@var{target#}>
720 @*aduc702x flash plugin require the flash @var{base}, @var{size} and @var{target#}.
722 @section mFlash configuration
723 @cindex mFlash configuration
725 @itemize @bullet
726 @item @b{mflash bank} <@var{soc}> <@var{base}> <@var{chip_width}> <@var{bus_width}>
727 <@var{RST pin}> <@var{WP pin}> <@var{DPD pin}> <@var{target #}>
728 @cindex mflash bank
729 @*Configures a mflash for <@var{soc}> host bank at <@var{base}>. <@var{chip_width}> and
730 <@var{bus_width}> are bytes order. Pin number format is dependent on host GPIO calling convention.
731 If WP or DPD pin was not used, write -1. Currently, mflash bank support s3c2440 and pxa270.
732 @end itemize
733 (ex. of s3c2440) mflash <@var{RST pin}> is GPIO B1, <@var{WP pin}> and <@var{DPD pin}> are not used.
734 @smallexample
735 mflash bank s3c2440 0x10000000 2 2 1b -1 -1 0
736 @end smallexample
737 (ex. of pxa270) mflash <@var{RST pin}> is GPIO 43, <@var{DPD pin}> is not used and <@var{DPD pin}> is GPIO 51.
738 @smallexample
739 mflash bank pxa270 0x08000000 2 2 43 -1 51 0
740 @end smallexample
742 @node Target library
743 @chapter Target library
744 @cindex Target library
746 OpenOCD comes with a target configuration script library. These scripts can be
747 used as-is or serve as a starting point.
749 The target library is published together with the openocd executable and
750 the path to the target library is in the OpenOCD script search path.
751 Similarly there are example scripts for configuring the JTAG interface.
753 The command line below uses the example parport configuration scripts
754 that ship with OpenOCD, then configures the str710.cfg target and
755 finally issues the init and reset command. The communication speed
756 is set to 10kHz for reset and 8MHz for post reset.
759 @smallexample
760 openocd -f interface/parport.cfg -f target/str710.cfg -c "init" -c "reset"
761 @end smallexample
764 To list the target scripts available:
766 @smallexample
767 $ ls /usr/local/lib/openocd/target
769 arm7_fast.cfg lm3s6965.cfg pxa255.cfg stm32.cfg xba_revA3.cfg
770 at91eb40a.cfg lpc2148.cfg pxa255_sst.cfg str710.cfg zy1000.cfg
771 at91r40008.cfg lpc2294.cfg sam7s256.cfg str912.cfg
772 at91sam9260.cfg nslu2.cfg sam7x256.cfg wi-9c.cfg
773 @end smallexample
776 @node Commands
777 @chapter Commands
778 @cindex commands
780 OpenOCD allows user interaction through a GDB server (default: port 3333),
781 a telnet interface (default: port 4444), and a TCL interface (default: port 5555). The command line interpreter
782 is available from both the telnet interface and a GDB session. To issue commands to the
783 interpreter from within a GDB session, use the @option{monitor} command, e.g. use
784 @option{monitor poll} to issue the @option{poll} command. All output is relayed through the
785 GDB session.
787 The TCL interface is used as a simplified RPC mechanism that feeds all the
788 input into the TCL interpreter and returns the output from the evaluation of
789 the commands.
791 @section Daemon
793 @itemize @bullet
794 @item @b{sleep} <@var{msec}>
795 @cindex sleep
796 @*Wait for n milliseconds before resuming. Useful in connection with script files
797 (@var{script} command and @var{target_script} configuration).
799 @item @b{shutdown}
800 @cindex shutdown
801 @*Close the OpenOCD daemon, disconnecting all clients (GDB, Telnet, Other).
803 @item @b{debug_level} [@var{n}]
804 @cindex debug_level
805 @anchor{debug_level}
806 @*Display or adjust debug level to n<0-3>
808 @item @b{fast} [@var{enable|disable}]
809 @cindex fast
810 @*Default disabled. Set default behaviour of OpenOCD to be "fast and dangerous". For instance ARM7/9 DCC memory
811 downloads and fast memory access will work if the JTAG interface isn't too fast and
812 the core doesn't run at a too low frequency. Note that this option only changes the default
813 and that the indvidual options, like DCC memory downloads, can be enabled and disabled
814 individually.
816 The target specific "dangerous" optimisation tweaking options may come and go
817 as more robust and user friendly ways are found to ensure maximum throughput
818 and robustness with a minimum of configuration.
820 Typically the "fast enable" is specified first on the command line:
822 @smallexample
823 openocd -c "fast enable" -c "interface dummy" -f target/str710.cfg
824 @end smallexample
826 @item @b{log_output} <@var{file}>
827 @cindex log_output
828 @*Redirect logging to <file> (default: stderr)
830 @item @b{script} <@var{file}>
831 @cindex script
832 @*Execute commands from <file>
834 @end itemize
836 @subsection Target state handling
837 @itemize @bullet
838 @item @b{reg} [@option{#}|@option{name}] [value]
839 @cindex reg
840 @*Access a single register by its number[@option{#}] or by its [@option{name}].
841 No arguments: list all available registers for the current target.
842 Number or name argument: display a register
843 Number or name and value arguments: set register value
845 @item @b{poll} [@option{on}|@option{off}]
846 @cindex poll
847 @*Poll the target for its current state. If the target is in debug mode, architecture
848 specific information about the current state is printed. An optional parameter
849 allows continuous polling to be enabled and disabled.
851 @item @b{halt} [@option{ms}]
852 @cindex halt
853 @*Send a halt request to the target and wait for it to halt for up to [@option{ms}] milliseconds.
854 Default [@option{ms}] is 5 seconds if no arg given.
855 Optional arg @option{ms} is a timeout in milliseconds. Using 0 as the [@option{ms}]
856 will stop OpenOCD from waiting.
858 @item @b{wait_halt} [@option{ms}]
859 @cindex wait_halt
860 @*Wait for the target to enter debug mode. Optional [@option{ms}] is
861 a timeout in milliseconds. Default [@option{ms}] is 5 seconds if no
862 arg given.
864 @item @b{resume} [@var{address}]
865 @cindex resume
866 @*Resume the target at its current code position, or at an optional address.
867 OpenOCD will wait 5 seconds for the target to resume.
869 @item @b{step} [@var{address}]
870 @cindex step
871 @*Single-step the target at its current code position, or at an optional address.
873 @item @b{reset} [@option{run}|@option{halt}|@option{init}]
874 @cindex reset
875 @*Perform a hard-reset. The optional parameter specifies what should happen after the reset.
877 With no arguments a "reset run" is executed
878 @itemize @minus
879 @item @b{run}
880 @cindex reset run
881 @*Let the target run.
882 @item @b{halt}
883 @cindex reset halt
884 @*Immediately halt the target (works only with certain configurations).
885 @item @b{init}
886 @cindex reset init
887 @*Immediately halt the target, and execute the reset script (works only with certain
888 configurations)
889 @end itemize
891 @item @b{soft_reset_halt}
892 @cindex reset
893 @*Requesting target halt and executing a soft reset.
894 @end itemize
896 @subsection Memory access commands
897 These commands allow accesses of a specific size to the memory system:
898 @itemize @bullet
899 @item @b{mdw} <@var{addr}> [@var{count}]
900 @cindex mdw
901 @*display memory words
902 @item @b{mdh} <@var{addr}> [@var{count}]
903 @cindex mdh
904 @*display memory half-words
905 @item @b{mdb} <@var{addr}> [@var{count}]
906 @cindex mdb
907 @*display memory bytes
908 @item @b{mww} <@var{addr}> <@var{value}>
909 @cindex mww
910 @*write memory word
911 @item @b{mwh} <@var{addr}> <@var{value}>
912 @cindex mwh
913 @*write memory half-word
914 @item @b{mwb} <@var{addr}> <@var{value}>
915 @cindex mwb
916 @*write memory byte
918 @item @b{load_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
919 @cindex load_image
920 @anchor{load_image}
921 @*Load image <@var{file}> to target memory at <@var{address}>
922 @item @b{dump_image} <@var{file}> <@var{address}> <@var{size}>
923 @cindex dump_image
924 @anchor{dump_image}
925 @*Dump <@var{size}> bytes of target memory starting at <@var{address}> to a
926 (binary) <@var{file}>.
927 @item @b{verify_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
928 @cindex verify_image
929 @*Verify <@var{file}> against target memory starting at <@var{address}>.
930 This will first attempt comparison using a crc checksum, if this fails it will try a binary compare.
931 @end itemize
933 @subsection Breakpoint commands
934 @cindex Breakpoint commands
935 @itemize @bullet
936 @item @b{bp} <@var{addr}> <@var{len}> [@var{hw}]
937 @cindex bp
938 @*set breakpoint <address> <length> [hw]
939 @item @b{rbp} <@var{addr}>
940 @cindex rbp
941 @*remove breakpoint <adress>
942 @item @b{wp} <@var{addr}> <@var{len}> <@var{r}|@var{w}|@var{a}> [@var{value}] [@var{mask}]
943 @cindex wp
944 @*set watchpoint <address> <length> <r/w/a> [value] [mask]
945 @item @b{rwp} <@var{addr}>
946 @cindex rwp
947 @*remove watchpoint <adress>
948 @end itemize
950 @subsection Flash commands
951 @cindex Flash commands
952 @itemize @bullet
953 @item @b{flash banks}
954 @cindex flash banks
955 @*List configured flash banks
956 @item @b{flash info} <@var{num}>
957 @cindex flash info
958 @*Print info about flash bank <@option{num}>
959 @item @b{flash probe} <@var{num}>
960 @cindex flash probe
961 @*Identify the flash, or validate the parameters of the configured flash. Operation
962 depends on the flash type.
963 @item @b{flash erase_check} <@var{num}>
964 @cindex flash erase_check
965 @*Check erase state of sectors in flash bank <@var{num}>. This is the only operation that
966 updates the erase state information displayed by @option{flash info}. That means you have
967 to issue an @option{erase_check} command after erasing or programming the device to get
968 updated information.
969 @item @b{flash protect_check} <@var{num}>
970 @cindex flash protect_check
971 @*Check protection state of sectors in flash bank <num>.
972 @option{flash erase_sector} using the same syntax.
973 @item @b{flash erase_sector} <@var{num}> <@var{first}> <@var{last}>
974 @cindex flash erase_sector
975 @anchor{flash erase_sector}
976 @*Erase sectors at bank <@var{num}>, starting at sector <@var{first}> up to and including
977 <@var{last}>. Sector numbering starts at 0. Depending on the flash type, erasing may
978 require the protection to be disabled first (e.g. Intel Advanced Bootblock flash using
979 the CFI driver).
980 @item @b{flash erase_address} <@var{address}> <@var{length}>
981 @cindex flash erase_address
982 @*Erase sectors starting at <@var{address}> for <@var{length}> bytes
983 @item @b{flash write_bank} <@var{num}> <@var{file}> <@var{offset}>
984 @cindex flash write_bank
985 @anchor{flash write_bank}
986 @*Write the binary <@var{file}> to flash bank <@var{num}>, starting at
987 <@option{offset}> bytes from the beginning of the bank.
988 @item @b{flash write_image} [@var{erase}] <@var{file}> [@var{offset}] [@var{type}]
989 @cindex flash write_image
990 @anchor{flash write_image}
991 @*Write the image <@var{file}> to the current target's flash bank(s). A relocation
992 [@var{offset}] can be specified and the file [@var{type}] can be specified
993 explicitly as @option{bin} (binary), @option{ihex} (Intel hex), @option{elf}
994 (ELF file) or @option{s19} (Motorola s19). Flash memory will be erased prior to programming
995 if the @option{erase} parameter is given.
996 @item @b{flash protect} <@var{num}> <@var{first}> <@var{last}> <@option{on}|@option{off}>
997 @cindex flash protect
998 @*Enable (@var{on}) or disable (@var{off}) protection of flash sectors <@var{first}> to
999 <@var{last}> of @option{flash bank} <@var{num}>.
1000 @end itemize
1002 @subsection mFlash commands
1003 @cindex mFlash commands
1004 @itemize @bullet
1005 @item @b{mflash probe}
1006 @cindex mflash probe
1007 Probe mflash.
1008 @item @b{mflash write} <@var{num}> <@var{file}> <@var{offset}>
1009 @cindex mflash write
1010 Write the binary <@var{file}> to mflash bank <@var{num}>, starting at
1011 <@var{offset}> bytes from the beginning of the bank.
1012 @item @b{mflash dump} <@var{num}> <@var{file}> <@var{offset}> <@var{size}>
1013 @cindex mflash dump
1014 Dump <size> bytes, starting at <@var{offset}> bytes from the beginning of the <@var{num}> bank
1015 to a <@var{file}>.
1016 @end itemize
1018 @page
1019 @section Target Commands
1020 @cindex Target Commands
1022 @subsection Overview
1023 @cindex Overview
1024 Pre "TCL" - many commands in OpenOCD where implemented as C functions. Post "TCL"
1025 (Jim-Tcl to be more exact, June 2008) TCL became a bigger part of OpenOCD.
1027 One of the biggest changes is the introduction of 'target specific'
1028 commands. When every time you create a target, a special command name is
1029 created specifically for that target.
1030 For example - in TCL/TK - if you create a button (or any other screen object) you
1031 can specify various "button configuration parameters". One of those parameters is
1032 the "object cmd/name" [ In TK - this is referred to as the object path ]. Later
1033 you can use that 'path' as a command to modify the button, for example to make it
1034 "grey", or change the color. In effect, the "path" function is an 'object
1035 oriented command'. The TCL change in OpenOCD follows the same principle, you create
1036 a target, and a specific "targetname" command is created.
1038 There are two methods of creating a target:
1040 @enumerate
1041 @item
1042 Using the old syntax (deprecated). Target names are autogenerated as:
1043 "target0", "target1", etc.;
1044 @cindex old syntax
1045 @item
1046 Using the new syntax, you can specify the name of the target.
1047 @cindex new syntax
1048 @end enumerate
1050 As most users will have a single JTAG target, and by default the command name will
1051 probably default to "target0", thus for reasons of simplicity the instructions below
1052 use the name "target0".
1054 @subsection Commands
1055 @cindex Commands
1056 OpenOCD has the following 'target' or 'target-like' commands:
1058 @enumerate
1059 @item
1060 @b{targets (plural)} - lists all known targets and a little bit of information about each
1061 target, most importantly the target *COMMAND*NAME* (it also lists the target number);
1062 @cindex targets
1063 @item
1064 @b{target (singular)} - used to create, configure list, etc the targets;
1065 @cindex target
1066 @item
1067 @b{target0} - the command object for the first target. Unless you specified another name.
1068 @cindex target0
1069 @end enumerate
1071 @subsubsection Targets Command
1072 @cindex Targets Command
1073 The "targets" command has 2 functions:
1075 @itemize
1076 @item
1077 With a parameter, you can change the current command line target.
1079 NOTE: "with a parameter" is really only useful with 'multiple JTAG targets' not something
1080 you normally encounter (ie: If you had 2 arm chips - sharing the same JTAG chain).
1081 @verbatim
1082 # using a target name.
1083 (gdb) mon targets target0
1084 # or a target by number.
1085 (gdb) mon targets 3
1086 @end verbatim
1087 @cindex with a parameter
1088 @item
1089 Plain, without any parameter lists targets, for example:
1091 @verbatim
1092 (gdb) mon targets
1093 CmdName Type Endian ChainPos State
1094 -- ---------- ---------- ---------- -------- ----------
1095 0: target0 arm7tdmi little 0 halted
1096 @end verbatim
1098 This shows:
1099 @enumerate a
1100 @item
1101 in this example, a single target;
1102 @item
1103 target number 0 (1st column);
1104 @item
1105 the 'object name' is target0 (the default name);
1106 @item
1107 it is an arm7tdmi;
1108 @item
1109 little endian;
1110 @item
1111 the position in the JTAG chain;
1112 @item
1113 and is currently halted.
1114 @end enumerate
1115 @cindex without any parameter
1116 @end itemize
1118 @subsubsection Target Command
1119 @cindex Target Command
1121 The "target" command has the following options:
1122 @itemize
1123 @item
1124 target create
1126 @verbatim
1127 target create CMDNAME TYPE ... config options ...
1128 argv[0] = 'target'
1129 argv[1] = 'create'
1130 argv[2] = the 'object command'
1131 (normally, target0, see (3) above)
1132 argv[3] = the target type, ie: arm7tdmi
1133 argv[4..N] = configuration parameters
1134 @end verbatim
1135 @item
1136 target types
1138 Lists all supported target types; ie: arm7tdmi, xscale, fericon, cortex-m3.
1139 The result TCL list of all known target types (and is human readable).
1140 @item
1141 target names
1143 Returns a TCL list of all known target commands (and is human readable).
1145 Example:
1146 @verbatim
1147 foreach t [target names] {
1148 puts [format "Target: %s\n" $t]
1149 }
1150 @end verbatim
1151 @item
1152 target current
1154 Returns the TCL command name of the current target.
1156 Example:
1157 @verbatim
1158 set ct [target current]
1159 set t [$ct cget -type]
1161 puts "Current target name is: $ct, and is a: $t"
1162 @end verbatim
1163 @item
1164 target number <VALUE>
1166 Returns the TCL command name of the specified target.
1168 Example
1169 @verbatim
1170 set thename [target number $x]
1171 puts [format "Target %d is: %s\n" $x $thename]
1172 @end verbatim
1173 For instance, assuming the defaults
1174 @verbatim
1175 target number 0
1176 @end verbatim
1177 Would return 'target0' (or whatever you called it)
1178 @item
1179 target count
1181 Returns the larget+1 target number.
1183 Example:
1184 @verbatim
1185 set c [target count]
1186 for { set x 0 } { $x < $c } { incr x } {
1187 # Assuming you have this function..
1188 print_target_details $x
1189 }
1190 @end verbatim
1191 @end itemize
1193 @subsubsection Target0 Command
1194 @cindex Target0 Command
1195 The "target0" command (the "Target Object" command):
1197 Once a target is 'created' a command object by that targets name is created, for example
1198 @verbatim
1199 target create BiGRed arm7tdmi -endian little -chain-position 3
1200 @end verbatim
1202 Would create a [case sensitive] "command" BiGRed
1204 If you use the old [deprecated] syntax, the name is automatically
1205 generated and is in the form:
1206 @verbatim
1207 target0, target1, target2, target3, ... etc.
1208 @end verbatim
1210 @subsubsection Target CREATE, CONFIGURE and CGET Options Command
1211 @cindex Target CREATE, CONFIGURE and CGET Options Command
1212 The commands:
1213 @verbatim
1214 target create CMDNAME TYPE [configure-options]
1215 CMDNAME configure [configure-options]
1216 CMDNAME cget [configure-options]
1217 @end verbatim
1218 @itemize
1219 @item
1220 In the 'create' case, one is creating the target and can specify any
1221 number of configuration parameters.
1222 @item
1223 In the 'CMDNAME configure' case, one can change the setting [Not all things can, or should be changed].
1224 @item
1225 In the 'CMDNAME cget' case, the goal is to query the target for a
1226 specific configuration option.
1227 @end itemize
1229 In the above, the "default" name target0 is 'target0'.
1231 Example:
1233 From the (gdb) prompt, one can type this:
1235 @verbatim
1236 (gdb) mon target0 configure -endian big
1237 @end verbatim
1239 And change target0 to 'big-endian'. This is a contrived example,
1240 specifically for this document - don't expect changing endian
1241 'mid-operation' to work you should set the endian at creation.
1243 Known options [30/august/2008] are:
1244 @itemize
1245 @item
1246 [Mandatory 'create' Options]
1247 @itemize
1248 @item
1249 type arm7tdmi|arm720|etc ...
1250 @item
1251 chain-position NUMBER
1252 @item
1253 endian ENDIAN
1254 @end itemize
1255 @item
1256 Optional
1257 @itemize
1258 @item
1259 event EVENTNAME "tcl-action"
1260 @item
1261 reset RESETACTION
1262 @item
1263 work-area-virt ADDR
1264 @item
1265 work-area-phys ADDR
1266 @item
1267 work-area-size ADDR
1268 @item
1269 work-area-backup BOOLEAN
1270 @end itemize
1271 @end itemize
1272 Hint: To get a list of available options, try this:
1273 @verbatim
1274 (gdb) mon target0 cget -BLAHBLAHBLAH
1275 @end verbatim
1277 the above causes an error - and a helpful list of valid options.
1279 One can query any of the above options at run time, for example:
1280 @verbatim
1281 (gdb) mon target0 cget -OPTION [param]
1282 @end verbatim
1284 Example TCL script
1286 @verbatim
1287 # For all targets...
1288 set c [target count]
1289 for { set x 0 } { $x < $c } { incr x ] {
1290 set n [target number $x]
1291 set t [$n cget -type]
1292 set e [$n cget -endian]
1293 puts [format "%d: %s, %s, endian: %s\n" $x $n $t $n]
1294 }
1295 @end verbatim
1297 Might produce:
1299 @verbatim
1300 0: pic32chip, mips_m4k, endain: little
1301 1: arm7, arm7tdmi, endian: big
1302 2: blackfin, bf534, endian: little
1303 @end verbatim
1305 Notice the above example is not target0, target1, target2 Why? Because in this contrived multi-target example -
1306 more human understandable target names might be helpful.
1308 For example these two are the same:
1310 @verbatim
1311 (gdb) mon blackfin configure -event FOO {puts "Hi mom"}
1312 @end verbatim
1314 or:
1316 @verbatim
1317 (gdb) mon [target number 2] configure -event FOO {puts "Hi mom"}
1318 @end verbatim
1320 In the second case, we use [] to get the command name of target #2, in this contrived example - it is "blackfin".
1322 Two important configuration options are:
1324 "-event" and "-reset"
1326 The "-reset" option specifies what should happen when the chip is reset, for example should it 'halt', 're-init',
1327 or what.
1329 The "-event" option less you specify a TCL command to occur when a specific event occurs.
1331 @subsection Target Events
1332 @cindex Target Events
1334 @subsubsection Overview
1335 @cindex Overview
1336 At various points in time - certain 'target' events happen. You can create a custom event action to occur at that time.
1337 For example - after reset, the PLLs and CLOCKs may need to be reconfigured, or perhaps the SDRAM needs to be re-initialized.
1338 Often the easiest way to do that is to create a simple script file containing the series of (mww [poke memory]) commands
1339 you would type by hand, to reconfigure the target clocks. You could specify the "event action" like this:
1341 @verbatim
1342 (gdb) mon target0 configure -event reset-init "script cfg.clocks"
1343 @end verbatim
1345 In the above example, when the event "reset-init" occurs, the "action-string" will be evaluated as if you typed it at the
1346 console:
1347 @itemize
1348 @item @b{Option1} - The simple approach (above) is to create a script file with lots of "mww" (memory write word) commands
1349 to configure your targets clocks and/or external memory;
1350 @item @b{Option2} - You can instead create a fancy TCL procedure and invoke that procedure instead of sourcing a file [In fact,
1351 "script" is a TCL procedure that loads a file].
1352 @end itemize
1354 @subsubsection Details
1355 @cindex Details
1356 There are many events one could use, to get a current list of events type the following invalid command, you'll get a helpful
1357 "runtime error" message, see below [list valid as of 30/august/2008]:
1359 @verbatim
1360 (gdb) mon target0 cget -event FAFA
1361 Runtime error, file "../../../openocd23/src/helper/command.c", line 433:
1362 -event: Unknown: FAFA, try one of: old-pre_reset,
1363 old-gdb_program_config, old-post_reset, halted,
1364 resumed, resume-start, resume-end, reset-start,
1365 reset-assert-pre, reset-assert-post,
1366 reset-deassert-pre, reset-deassert-post,
1367 reset-halt-pre, reset-halt-post, reset-wait-pre,
1368 reset-wait-post, reset-init, reset-end,
1369 examine-start, examine-end, debug-halted,
1370 debug-resumed, gdb-attach, gdb-detach,
1371 gdb-flash-write-start, gdb-flash-write-end,
1372 gdb-flash-erase-start, gdb-flash-erase-end,
1373 resume-start, resume-ok, or resume-end
1374 @end verbatim
1376 NOTE: The event-names "old-*" are deprecated and exist only to help old scripts continue to function, and the old "target_script"
1377 command to work. Please do not rely on them.
1379 These are some other important names:
1380 @itemize
1381 @item gdb-flash-erase-start
1382 @item gdb-flash-erase-end
1383 @item gdb-flash-write-start
1384 @item gdb-flash-write-end
1385 @end itemize
1387 These occur when GDB/OpenOCD attempts to erase & program the FLASH chip via GDB. For example - some PCBs may have a simple GPIO
1388 pin that acts like a "flash write protect" you might need to write a script that disables "write protect".
1390 To get a list of current 'event actions', type the following command:
1392 @verbatim
1393 (gdb) mon target0 eventlist
1395 Event actions for target (0) target0
1397 Event | Body
1398 ------------------------- | ----------------------------------------
1399 old-post_reset | script event/sam7x256_reset.script
1400 @end verbatim
1402 Here is a simple example for all targets:
1404 @verbatim
1405 (gdb) mon foreach x [target names] { $x eventlist }
1406 @end verbatim
1408 The above uses some TCL tricks:
1409 @enumerate a
1410 @item foreach VARIABLE LIST BODY
1411 @item to generate the list, we use [target names]
1412 @item the BODY, contains $x - the loop variable and expands to the target specific name
1413 @end enumerate
1415 Recalling the earlier discussion - the "object command" there are other things you can
1416 do besides "configure" the target.
1418 Note: Many of these commands exist as "global" commands, and they also exist as target
1419 specific commands. For example, the "mww" (memory write word) operates on the current
1420 target if you have more then 1 target, you must switch. In contrast to the normal
1421 commands, these commands operate on the specific target. For example, the command "mww"
1422 writes data to the *current* command line target.
1424 Often, you have only a single target - but if you have multiple targets (ie: a PIC32
1425 and an at91sam7 - your reset-init scripts might get a bit more complicated, ie: you must
1426 specify which of the two chips you want to write to. Writing 'pic32' clock configuration
1427 to an at91sam7 does not work).
1429 The commands are [as of 30/august/2008]:
1430 @verbatim
1434 Write(poke): 32, 16, 8bit values to memory.
1439 Human 'hexdump' with ascii 32, 16, 8bit values
1441 TNAME mem2array [see mem2array command]
1442 TNAME array2mem [see array2mem command]
1444 TNAME curstate
1445 Returns the current state of the target.
1447 TNAME examine
1448 See 'advanced target reset'
1449 TNAME poll
1450 See 'advanced target reset'
1451 TNAME reset assert
1452 See 'advanced target reset'
1453 TNAME reset deassert
1454 See 'advanced target reset'
1455 TNAME halt
1456 See 'advanced target reset'
1457 TNAME waitstate STATENAME
1458 See 'advanced target reset'
1459 @end verbatim
1461 @page
1462 @section Target Specific Commands
1463 @cindex Target Specific Commands
1465 @subsection AT91SAM7 specific commands
1466 @cindex AT91SAM7 specific commands
1467 The flash configuration is deduced from the chip identification register. The flash
1468 controller handles erases automatically on a page (128/265 byte) basis so erase is
1469 not necessary for flash programming. AT91SAM7 processors with less than 512K flash
1470 only have a single flash bank embedded on chip. AT91SAM7xx512 have two flash planes
1471 that can be erased separatly. Only an EraseAll command is supported by the controller
1472 for each flash plane and this is called with
1473 @itemize @bullet
1474 @item @b{flash erase} <@var{num}> @var{first_plane} @var{last_plane}
1475 @*bulk erase flash planes first_plane to last_plane.
1476 @item @b{at91sam7 gpnvm} <@var{num}> <@var{bit}> <@option{set}|@option{clear}>
1477 @cindex at91sam7 gpnvm
1478 @*set or clear a gpnvm bit for the processor
1479 @end itemize
1481 @subsection STR9 specific commands
1482 @cindex STR9 specific commands
1483 These are flash specific commands when using the str9xpec driver.
1484 @itemize @bullet
1485 @item @b{str9xpec enable_turbo} <@var{num}>
1486 @cindex str9xpec enable_turbo
1487 @*enable turbo mode, simply this will remove the str9 from the chain and talk
1488 directly to the embedded flash controller.
1489 @item @b{str9xpec disable_turbo} <@var{num}>
1490 @cindex str9xpec disable_turbo
1491 @*restore the str9 into jtag chain.
1492 @item @b{str9xpec lock} <@var{num}>
1493 @cindex str9xpec lock
1494 @*lock str9 device. The str9 will only respond to an unlock command that will
1495 erase the device.
1496 @item @b{str9xpec unlock} <@var{num}>
1497 @cindex str9xpec unlock
1498 @*unlock str9 device.
1499 @item @b{str9xpec options_read} <@var{num}>
1500 @cindex str9xpec options_read
1501 @*read str9 option bytes.
1502 @item @b{str9xpec options_write} <@var{num}>
1503 @cindex str9xpec options_write
1504 @*write str9 option bytes.
1505 @end itemize
1507 @subsection STR9 configuration
1508 @cindex STR9 configuration
1509 @itemize @bullet
1510 @item @b{str9x flash_config} <@var{bank}> <@var{BBSR}> <@var{NBBSR}>
1511 <@var{BBADR}> <@var{NBBADR}>
1512 @cindex str9x flash_config
1513 @*Configure str9 flash controller.
1514 @smallexample
1515 eg. str9x flash_config 0 4 2 0 0x80000
1516 This will setup
1517 BBSR - Boot Bank Size register
1518 NBBSR - Non Boot Bank Size register
1519 BBADR - Boot Bank Start Address register
1520 NBBADR - Boot Bank Start Address register
1521 @end smallexample
1522 @end itemize
1524 @subsection STR9 option byte configuration
1525 @cindex STR9 option byte configuration
1526 @itemize @bullet
1527 @item @b{str9xpec options_cmap} <@var{num}> <@option{bank0}|@option{bank1}>
1528 @cindex str9xpec options_cmap
1529 @*configure str9 boot bank.
1530 @item @b{str9xpec options_lvdthd} <@var{num}> <@option{2.4v}|@option{2.7v}>
1531 @cindex str9xpec options_lvdthd
1532 @*configure str9 lvd threshold.
1533 @item @b{str9xpec options_lvdsel} <@var{num}> <@option{vdd}|@option{vdd_vddq}>
1534 @cindex str9xpec options_lvdsel
1535 @*configure str9 lvd source.
1536 @item @b{str9xpec options_lvdwarn} <@var{bank}> <@option{vdd}|@option{vdd_vddq}>
1537 @cindex str9xpec options_lvdwarn
1538 @*configure str9 lvd reset warning source.
1539 @end itemize
1541 @subsection STM32x specific commands
1542 @cindex STM32x specific commands
1544 These are flash specific commands when using the stm32x driver.
1545 @itemize @bullet
1546 @item @b{stm32x lock} <@var{num}>
1547 @cindex stm32x lock
1548 @*lock stm32 device.
1549 @item @b{stm32x unlock} <@var{num}>
1550 @cindex stm32x unlock
1551 @*unlock stm32 device.
1552 @item @b{stm32x options_read} <@var{num}>
1553 @cindex stm32x options_read
1554 @*read stm32 option bytes.
1555 @item @b{stm32x options_write} <@var{num}> <@option{SWWDG}|@option{HWWDG}>
1556 <@option{RSTSTNDBY}|@option{NORSTSTNDBY}> <@option{RSTSTOP}|@option{NORSTSTOP}>
1557 @cindex stm32x options_write
1558 @*write stm32 option bytes.
1559 @item @b{stm32x mass_erase} <@var{num}>
1560 @cindex stm32x mass_erase
1561 @*mass erase flash memory.
1562 @end itemize
1564 @subsection Stellaris specific commands
1565 @cindex Stellaris specific commands
1567 These are flash specific commands when using the Stellaris driver.
1568 @itemize @bullet
1569 @item @b{stellaris mass_erase} <@var{num}>
1570 @cindex stellaris mass_erase
1571 @*mass erase flash memory.
1572 @end itemize
1574 @page
1575 @section Architecture Specific Commands
1576 @cindex Architecture Specific Commands
1578 @subsection ARMV4/5 specific commands
1579 @cindex ARMV4/5 specific commands
1581 These commands are specific to ARM architecture v4 and v5, like all ARM7/9 systems
1582 or Intel XScale (XScale isn't supported yet).
1583 @itemize @bullet
1584 @item @b{armv4_5 reg}
1585 @cindex armv4_5 reg
1586 @*Display a list of all banked core registers, fetching the current value from every
1587 core mode if necessary. OpenOCD versions before rev. 60 didn't fetch the current
1588 register value.
1589 @item @b{armv4_5 core_mode} [@var{arm}|@var{thumb}]
1590 @cindex armv4_5 core_mode
1591 @*Displays the core_mode, optionally changing it to either ARM or Thumb mode.
1592 The target is resumed in the currently set @option{core_mode}.
1593 @end itemize
1595 @subsection ARM7/9 specific commands
1596 @cindex ARM7/9 specific commands
1598 These commands are specific to ARM7 and ARM9 targets, like ARM7TDMI, ARM720t,
1599 ARM920t or ARM926EJ-S.
1600 @itemize @bullet
1601 @item @b{arm7_9 dbgrq} <@var{enable}|@var{disable}>
1602 @cindex arm7_9 dbgrq
1603 @*Enable use of the DBGRQ bit to force entry into debug mode. This should be
1604 safe for all but ARM7TDMI--S cores (like Philips LPC).
1605 @item @b{arm7_9 fast_memory_access} <@var{enable}|@var{disable}>
1606 @cindex arm7_9 fast_memory_access
1607 @anchor{arm7_9 fast_memory_access}
1608 @*Allow OpenOCD to read and write memory without checking completion of
1609 the operation. This provides a huge speed increase, especially with USB JTAG
1610 cables (FT2232), but might be unsafe if used with targets running at a very low
1611 speed, like the 32kHz startup clock of an AT91RM9200.
1612 @item @b{arm7_9 dcc_downloads} <@var{enable}|@var{disable}>
1613 @cindex arm7_9 dcc_downloads
1614 @*Enable the use of the debug communications channel (DCC) to write larger (>128 byte)
1615 amounts of memory. DCC downloads offer a huge speed increase, but might be potentially
1616 unsafe, especially with targets running at a very low speed. This command was introduced
1617 with OpenOCD rev. 60.
1618 @end itemize
1620 @subsection ARM720T specific commands
1621 @cindex ARM720T specific commands
1623 @itemize @bullet
1624 @item @b{arm720t cp15} <@var{num}> [@var{value}]
1625 @cindex arm720t cp15
1626 @*display/modify cp15 register <@option{num}> [@option{value}].
1627 @item @b{arm720t md<bhw>_phys} <@var{addr}> [@var{count}]
1628 @cindex arm720t md<bhw>_phys
1629 @*Display memory at physical address addr.
1630 @item @b{arm720t mw<bhw>_phys} <@var{addr}> <@var{value}>
1631 @cindex arm720t mw<bhw>_phys
1632 @*Write memory at physical address addr.
1633 @item @b{arm720t virt2phys} <@var{va}>
1634 @cindex arm720t virt2phys
1635 @*Translate a virtual address to a physical address.
1636 @end itemize
1638 @subsection ARM9TDMI specific commands
1639 @cindex ARM9TDMI specific commands
1641 @itemize @bullet
1642 @item @b{arm9tdmi vector_catch} <@var{all}|@var{none}>
1643 @cindex arm9tdmi vector_catch
1644 @*Catch arm9 interrupt vectors, can be @option{all} @option{none} or any of the following:
1645 @option{reset} @option{undef} @option{swi} @option{pabt} @option{dabt} @option{reserved}
1646 @option{irq} @option{fiq}.
1648 Can also be used on other arm9 based cores, arm966, arm920t and arm926ejs.
1649 @end itemize
1651 @subsection ARM966E specific commands
1652 @cindex ARM966E specific commands
1654 @itemize @bullet
1655 @item @b{arm966e cp15} <@var{num}> [@var{value}]
1656 @cindex arm966e cp15
1657 @*display/modify cp15 register <@option{num}> [@option{value}].
1658 @end itemize
1660 @subsection ARM920T specific commands
1661 @cindex ARM920T specific commands
1663 @itemize @bullet
1664 @item @b{arm920t cp15} <@var{num}> [@var{value}]
1665 @cindex arm920t cp15
1666 @*display/modify cp15 register <@option{num}> [@option{value}].
1667 @item @b{arm920t cp15i} <@var{num}> [@var{value}] [@var{address}]
1668 @cindex arm920t cp15i
1669 @*display/modify cp15 (interpreted access) <@option{opcode}> [@option{value}] [@option{address}]
1670 @item @b{arm920t cache_info}
1671 @cindex arm920t cache_info
1672 @*Print information about the caches found. This allows you to see if your target
1673 is a ARM920T (2x16kByte cache) or ARM922T (2x8kByte cache).
1674 @item @b{arm920t md<bhw>_phys} <@var{addr}> [@var{count}]
1675 @cindex arm920t md<bhw>_phys
1676 @*Display memory at physical address addr.
1677 @item @b{arm920t mw<bhw>_phys} <@var{addr}> <@var{value}>
1678 @cindex arm920t mw<bhw>_phys
1679 @*Write memory at physical address addr.
1680 @item @b{arm920t read_cache} <@var{filename}>
1681 @cindex arm920t read_cache
1682 @*Dump the content of ICache and DCache to a file.
1683 @item @b{arm920t read_mmu} <@var{filename}>
1684 @cindex arm920t read_mmu
1685 @*Dump the content of the ITLB and DTLB to a file.
1686 @item @b{arm920t virt2phys} <@var{va}>
1687 @cindex arm920t virt2phys
1688 @*Translate a virtual address to a physical address.
1689 @end itemize
1691 @subsection ARM926EJS specific commands
1692 @cindex ARM926EJS specific commands
1694 @itemize @bullet
1695 @item @b{arm926ejs cp15} <@var{num}> [@var{value}]
1696 @cindex arm926ejs cp15
1697 @*display/modify cp15 register <@option{num}> [@option{value}].
1698 @item @b{arm926ejs cache_info}
1699 @cindex arm926ejs cache_info
1700 @*Print information about the caches found.
1701 @item @b{arm926ejs md<bhw>_phys} <@var{addr}> [@var{count}]
1702 @cindex arm926ejs md<bhw>_phys
1703 @*Display memory at physical address addr.
1704 @item @b{arm926ejs mw<bhw>_phys} <@var{addr}> <@var{value}>
1705 @cindex arm926ejs mw<bhw>_phys
1706 @*Write memory at physical address addr.
1707 @item @b{arm926ejs virt2phys} <@var{va}>
1708 @cindex arm926ejs virt2phys
1709 @*Translate a virtual address to a physical address.
1710 @end itemize
1712 @page
1713 @section Debug commands
1714 @cindex Debug commands
1715 The following commands give direct access to the core, and are most likely
1716 only useful while debugging OpenOCD.
1717 @itemize @bullet
1718 @item @b{arm7_9 write_xpsr} <@var{32-bit value}> <@option{0=cpsr}, @option{1=spsr}>
1719 @cindex arm7_9 write_xpsr
1720 @*Immediately write either the current program status register (CPSR) or the saved
1721 program status register (SPSR), without changing the register cache (as displayed
1722 by the @option{reg} and @option{armv4_5 reg} commands).
1723 @item @b{arm7_9 write_xpsr_im8} <@var{8-bit value}> <@var{rotate 4-bit}>
1724 <@var{0=cpsr},@var{1=spsr}>
1725 @cindex arm7_9 write_xpsr_im8
1726 @*Write the 8-bit value rotated right by 2*rotate bits, using an immediate write
1727 operation (similar to @option{write_xpsr}).
1728 @item @b{arm7_9 write_core_reg} <@var{num}> <@var{mode}> <@var{value}>
1729 @cindex arm7_9 write_core_reg
1730 @*Write a core register, without changing the register cache (as displayed by the
1731 @option{reg} and @option{armv4_5 reg} commands). The <@var{mode}> argument takes the
1732 encoding of the [M4:M0] bits of the PSR.
1733 @end itemize
1735 @page
1736 @section JTAG commands
1737 @cindex JTAG commands
1738 @itemize @bullet
1739 @item @b{scan_chain}
1740 @cindex scan_chain
1741 @*Print current scan chain configuration.
1742 @item @b{jtag_reset} <@var{trst}> <@var{srst}>
1743 @cindex jtag_reset
1744 @*Toggle reset lines.
1745 @item @b{endstate} <@var{tap_state}>
1746 @cindex endstate
1747 @*Finish JTAG operations in <@var{tap_state}>.
1748 @item @b{runtest} <@var{num_cycles}>
1749 @cindex runtest
1750 @*Move to Run-Test/Idle, and execute <@var{num_cycles}>
1751 @item @b{statemove} [@var{tap_state}]
1752 @cindex statemove
1753 @*Move to current endstate or [@var{tap_state}]
1754 @item @b{irscan} <@var{device}> <@var{instr}> [@var{dev2}] [@var{instr2}] ...
1755 @cindex irscan
1756 @*Execute IR scan <@var{device}> <@var{instr}> [@var{dev2}] [@var{instr2}] ...
1757 @item @b{drscan} <@var{device}> [@var{dev2}] [@var{var2}] ...
1758 @cindex drscan
1759 @*Execute DR scan <@var{device}> [@var{dev2}] [@var{var2}] ...
1760 @item @b{verify_ircapture} <@option{enable}|@option{disable}>
1761 @cindex verify_ircapture
1762 @*Verify value captured during Capture-IR. Default is enabled.
1763 @item @b{var} <@var{name}> [@var{num_fields}|@var{del}] [@var{size1}] ...
1764 @cindex var
1765 @*Allocate, display or delete variable <@var{name}> [@var{num_fields}|@var{del}] [@var{size1}] ...
1766 @item @b{field} <@var{var}> <@var{field}> [@var{value}|@var{flip}]
1767 @cindex field
1768 Display/modify variable field <@var{var}> <@var{field}> [@var{value}|@var{flip}].
1769 @end itemize
1771 @page
1772 @section Target Requests
1773 @cindex Target Requests
1774 OpenOCD can handle certain target requests, currently debugmsg are only supported for arm7_9 and cortex_m3.
1775 See libdcc in the contrib dir for more details.
1776 @itemize @bullet
1777 @item @b{target_request debugmsgs} <@var{enable}|@var{disable}>
1778 @cindex target_request debugmsgs
1779 @*Enable/disable target debugmsgs requests. debugmsgs enable messages to be sent to the debugger while the target is running.
1780 @end itemize
1782 @node Sample Scripts
1783 @chapter Sample Scripts
1784 @cindex scripts
1786 This page shows how to use the target library.
1788 The configuration script can be divided in the following section:
1789 @itemize @bullet
1790 @item daemon configuration
1791 @item interface
1792 @item jtag scan chain
1793 @item target configuration
1794 @item flash configuration
1795 @end itemize
1797 Detailed information about each section can be found at OpenOCD configuration.
1799 @section AT91R40008 example
1800 @cindex AT91R40008 example
1801 To start OpenOCD with a target script for the AT91R40008 CPU and reset
1802 the CPU upon startup of the OpenOCD daemon.
1803 @smallexample
1804 openocd -f interface/parport.cfg -f target/at91r40008.cfg -c init -c reset
1805 @end smallexample
1808 @node GDB and OpenOCD
1809 @chapter GDB and OpenOCD
1810 @cindex GDB and OpenOCD
1811 OpenOCD complies with the remote gdbserver protocol, and as such can be used
1812 to debug remote targets.
1814 @section Connecting to gdb
1815 @cindex Connecting to gdb
1816 Use GDB 6.7 or newer with OpenOCD if you run into trouble. For instance 6.3 has a
1817 known bug where it produces bogus memory access errors, which has since
1818 been fixed: look up 1836 in http://sourceware.org/cgi-bin/gnatsweb.pl?database=gdb
1821 A connection is typically started as follows:
1822 @smallexample
1823 target remote localhost:3333
1824 @end smallexample
1825 This would cause gdb to connect to the gdbserver on the local pc using port 3333.
1827 To see a list of available OpenOCD commands type @option{monitor help} on the
1828 gdb commandline.
1830 OpenOCD supports the gdb @option{qSupported} packet, this enables information
1831 to be sent by the gdb server (openocd) to gdb. Typical information includes
1832 packet size and device memory map.
1834 Previous versions of OpenOCD required the following gdb options to increase
1835 the packet size and speed up gdb communication.
1836 @smallexample
1837 set remote memory-write-packet-size 1024
1838 set remote memory-write-packet-size fixed
1839 set remote memory-read-packet-size 1024
1840 set remote memory-read-packet-size fixed
1841 @end smallexample
1842 This is now handled in the @option{qSupported} PacketSize.
1844 @section Programming using gdb
1845 @cindex Programming using gdb
1847 By default the target memory map is sent to gdb, this can be disabled by
1848 the following OpenOCD config option:
1849 @smallexample
1850 gdb_memory_map disable
1851 @end smallexample
1852 For this to function correctly a valid flash config must also be configured
1853 in OpenOCD. For faster performance you should also configure a valid
1854 working area.
1856 Informing gdb of the memory map of the target will enable gdb to protect any
1857 flash area of the target and use hardware breakpoints by default. This means
1858 that the OpenOCD option @option{gdb_breakpoint_override} is not required when
1859 using a memory map. @xref{gdb_breakpoint_override}.
1861 To view the configured memory map in gdb, use the gdb command @option{info mem}
1862 All other unasigned addresses within gdb are treated as RAM.
1864 GDB 6.8 and higher set any memory area not in the memory map as inaccessible,
1865 this can be changed to the old behaviour by using the following gdb command.
1866 @smallexample
1867 set mem inaccessible-by-default off
1868 @end smallexample
1870 If @option{gdb_flash_program enable} is also used, gdb will be able to
1871 program any flash memory using the vFlash interface.
1873 gdb will look at the target memory map when a load command is given, if any
1874 areas to be programmed lie within the target flash area the vFlash packets
1875 will be used.
1877 If the target needs configuring before gdb programming, a script can be executed.
1878 @smallexample
1879 target_script 0 gdb_program_config config.script
1880 @end smallexample
1882 To verify any flash programming the gdb command @option{compare-sections}
1883 can be used.
1885 @node TCL and OpenOCD
1886 @chapter TCL and OpenOCD
1887 @cindex TCL and OpenOCD
1888 OpenOCD embeds a TCL interpreter (see JIM) for command parsing and scripting
1889 support.
1891 The TCL interpreter can be invoked from the interactive command line, files, and a network port.
1893 The command and file interfaces are fairly straightforward, while the network
1894 port is geared toward intergration with external clients. A small example
1895 of an external TCL script that can connect to openocd is shown below.
1897 @verbatim
1898 # Simple tcl client to connect to openocd
1899 puts "Use empty line to exit"
1900 set fo [socket 6666]
1901 puts -nonewline stdout "> "
1902 flush stdout
1903 while {[gets stdin line] >= 0} {
1904 if {$line eq {}} break
1905 puts $fo $line
1906 flush $fo
1907 gets $fo line
1908 puts $line
1909 puts -nonewline stdout "> "
1910 flush stdout
1911 }
1912 close $fo
1913 @end verbatim
1915 This script can easily be modified to front various GUIs or be a sub
1916 component of a larger framework for control and interaction.
1919 @node TCL scripting API
1920 @chapter TCL scripting API
1921 @cindex TCL scripting API
1922 API rules
1924 The commands are stateless. E.g. the telnet command line has a concept
1925 of currently active target, the Tcl API proc's take this sort of state
1926 information as an argument to each proc.
1928 There are three main types of return values: single value, name value
1929 pair list and lists.
1931 Name value pair. The proc 'foo' below returns a name/value pair
1932 list.
1934 @verbatim
1936 > set foo(me) Duane
1937 > set foo(you) Oyvind
1938 > set foo(mouse) Micky
1939 > set foo(duck) Donald
1941 If one does this:
1943 > set foo
1945 The result is:
1947 me Duane you Oyvind mouse Micky duck Donald
1949 Thus, to get the names of the associative array is easy:
1951 foreach { name value } [set foo] {
1952 puts "Name: $name, Value: $value"
1953 }
1954 @end verbatim
1956 Lists returned must be relatively small. Otherwise a range
1957 should be passed in to the proc in question.
1959 Low level commands are prefixed with "openocd_", e.g. openocd_flash_banks
1960 is the low level API upon which "flash banks" is implemented.
1962 OpenOCD commands can consist of two words, e.g. "flash banks". The
1963 startup.tcl "unknown" proc will translate this into a tcl proc
1964 called "flash_banks".
1967 @node Upgrading
1968 @chapter Deprecated/Removed Commands
1969 @cindex Deprecated/Removed Commands
1970 Certain OpenOCD commands have been deprecated/removed during the various revisions.
1972 @itemize @bullet
1973 @item @b{load_binary}
1974 @cindex load_binary
1975 @*use @option{load_image} command with same args. @xref{load_image}.
1976 @item @b{target}
1977 @cindex target
1978 @*@option{target} no longer take the reset_init, reset_run, run_and_halt, run_and_init. The @option{reset} command
1979 always does a @option{reset run} when passed no arguments.
1980 @item @b{dump_binary}
1981 @cindex dump_binary
1982 @*use @option{dump_image} command with same args. @xref{dump_image}.
1983 @item @b{flash erase}
1984 @cindex flash erase
1985 @*use @option{flash erase_sector} command with same args. @xref{flash erase_sector}.
1986 @item @b{flash write}
1987 @cindex flash write
1988 @*use @option{flash write_bank} command with same args. @xref{flash write_bank}.
1989 @item @b{flash write_binary}
1990 @cindex flash write_binary
1991 @*use @option{flash write_bank} command with same args. @xref{flash write_bank}.
1992 @item @b{arm7_9 fast_writes}
1993 @cindex arm7_9 fast_writes
1994 @*use @option{arm7_9 fast_memory_access} command with same args. @xref{arm7_9 fast_memory_access}.
1995 @item @b{flash auto_erase}
1996 @cindex flash auto_erase
1997 @*use @option{flash write_image} command passing @option{erase} as the first parameter. @xref{flash write_image}.
1998 @item @b{daemon_startup}
1999 @cindex daemon_startup
2000 @*this config option has been removed, simply adding @option{init} and @option{reset halt} to
2001 the end of your config script will give the same behaviour as using @option{daemon_startup reset}
2002 and @option{target cortex_m3 little reset_halt 0}.
2003 @item @b{arm7_9 sw_bkpts}
2004 @cindex arm7_9 sw_bkpts
2005 @*On by default. See also @option{gdb_breakpoint_override}. @xref{gdb_breakpoint_override}.
2006 @item @b{arm7_9 force_hw_bkpts}
2007 @cindex arm7_9 force_hw_bkpts
2008 @*Use @option{gdb_breakpoint_override} instead. Note that GDB will use hardware breakpoints
2009 for flash if the gdb memory map has been set up(default when flash is declared in
2010 target configuration). @xref{gdb_breakpoint_override}.
2011 @item @b{run_and_halt_time}
2012 @cindex run_and_halt_time
2013 @*This command has been removed for simpler reset behaviour, it can be simulated with the
2014 following commands:
2015 @smallexample
2016 reset run
2017 sleep 100
2018 halt
2019 @end smallexample
2020 @end itemize
2022 @node FAQ
2023 @chapter FAQ
2024 @cindex faq
2025 @enumerate
2026 @item OpenOCD complains about a missing cygwin1.dll.
2028 Make sure you have Cygwin installed, or at least a version of OpenOCD that
2029 claims to come with all the necessary dlls. When using Cygwin, try launching
2030 OpenOCD from the Cygwin shell.
2032 @item I'm trying to set a breakpoint using GDB (or a frontend like Insight or
2033 Eclipse), but OpenOCD complains that "Info: arm7_9_common.c:213
2034 arm7_9_add_breakpoint(): sw breakpoint requested, but software breakpoints not enabled".
2036 GDB issues software breakpoints when a normal breakpoint is requested, or to implement
2037 source-line single-stepping. On ARMv4T systems, like ARM7TDMI, ARM720t or ARM920t,
2038 software breakpoints consume one of the two available hardware breakpoints.
2040 @item When erasing or writing LPC2000 on-chip flash, the operation fails sometimes
2041 and works sometimes fine.
2043 Make sure the core frequency specified in the @option{flash lpc2000} line matches the
2044 clock at the time you're programming the flash. If you've specified the crystal's
2045 frequency, make sure the PLL is disabled, if you've specified the full core speed
2046 (e.g. 60MHz), make sure the PLL is enabled.
2048 @item When debugging using an Amontec Chameleon in its JTAG Accelerator configuration,
2049 I keep getting "Error: amt_jtagaccel.c:184 amt_wait_scan_busy(): amt_jtagaccel timed
2050 out while waiting for end of scan, rtck was disabled".
2052 Make sure your PC's parallel port operates in EPP mode. You might have to try several
2053 settings in your PC BIOS (ECP, EPP, and different versions of those).
2055 @item When debugging with OpenOCD and GDB (plain GDB, Insight, or Eclipse),
2056 I get lots of "Error: arm7_9_common.c:1771 arm7_9_read_memory():
2057 memory read caused data abort".
2059 The errors are non-fatal, and are the result of GDB trying to trace stack frames
2060 beyond the last valid frame. It might be possible to prevent this by setting up
2061 a proper "initial" stack frame, if you happen to know what exactly has to
2062 be done, feel free to add this here.
2064 @item I get the following message in the OpenOCD console (or log file):
2065 "Warning: arm7_9_common.c:679 arm7_9_assert_reset(): srst resets test logic, too".
2067 This warning doesn't indicate any serious problem, as long as you don't want to
2068 debug your core right out of reset. Your .cfg file specified @option{jtag_reset
2069 trst_and_srst srst_pulls_trst} to tell OpenOCD that either your board,
2070 your debugger or your target uC (e.g. LPC2000) can't assert the two reset signals
2071 independently. With this setup, it's not possible to halt the core right out of
2072 reset, everything else should work fine.
2074 @item When using OpenOCD in conjunction with Amontec JTAGkey and the Yagarto
2075 Toolchain (Eclipse, arm-elf-gcc, arm-elf-gdb), the debugging seems to be
2076 unstable. When single-stepping over large blocks of code, GDB and OpenOCD
2077 quit with an error message. Is there a stability issue with OpenOCD?
2079 No, this is not a stability issue concerning OpenOCD. Most users have solved
2080 this issue by simply using a self-powered USB hub, which they connect their
2081 Amontec JTAGkey to. Apparently, some computers do not provide a USB power
2082 supply stable enough for the Amontec JTAGkey to be operated.
2084 @item When using the Amontec JTAGkey, sometimes OpenOCD crashes with the
2085 following error messages: "Error: ft2232.c:201 ft2232_read(): FT_Read returned:
2086 4" and "Error: ft2232.c:365 ft2232_send_and_recv(): couldn't read from FT2232".
2087 What does that mean and what might be the reason for this?
2089 First of all, the reason might be the USB power supply. Try using a self-powered
2090 hub instead of a direct connection to your computer. Secondly, the error code 4
2091 corresponds to an FT_IO_ERROR, which means that the driver for the FTDI USB
2092 chip ran into some sort of error - this points us to a USB problem.
2094 @item When using the Amontec JTAGkey, sometimes OpenOCD crashes with the following
2095 error message: "Error: gdb_server.c:101 gdb_get_char(): read: 10054".
2096 What does that mean and what might be the reason for this?
2098 Error code 10054 corresponds to WSAECONNRESET, which means that the debugger (GDB)
2099 has closed the connection to OpenOCD. This might be a GDB issue.
2101 @item In the configuration file in the section where flash device configurations
2102 are described, there is a parameter for specifying the clock frequency for
2103 LPC2000 internal flash devices (e.g.
2104 @option{flash bank lpc2000 0x0 0x40000 0 0 0 lpc2000_v1 14746 calc_checksum}),
2105 which must be specified in kilohertz. However, I do have a quartz crystal of a
2106 frequency that contains fractions of kilohertz (e.g. 14,745,600 Hz, i.e. 14,745.600 kHz).
2107 Is it possible to specify real numbers for the clock frequency?
2109 No. The clock frequency specified here must be given as an integral number.
2110 However, this clock frequency is used by the In-Application-Programming (IAP)
2111 routines of the LPC2000 family only, which seems to be very tolerant concerning
2112 the given clock frequency, so a slight difference between the specified clock
2113 frequency and the actual clock frequency will not cause any trouble.
2115 @item Do I have to keep a specific order for the commands in the configuration file?
2117 Well, yes and no. Commands can be given in arbitrary order, yet the devices
2118 listed for the JTAG scan chain must be given in the right order (jtag_device),
2119 with the device closest to the TDO-Pin being listed first. In general,
2120 whenever objects of the same type exist which require an index number, then
2121 these objects must be given in the right order (jtag_devices, targets and flash
2122 banks - a target references a jtag_device and a flash bank references a target).
2124 @item Sometimes my debugging session terminates with an error. When I look into the
2125 log file, I can see these error messages: Error: arm7_9_common.c:561
2126 arm7_9_execute_sys_speed(): timeout waiting for SYSCOMP
2128 TODO.
2130 @end enumerate
2132 @include fdl.texi
2134 @node Index
2135 @unnumbered Index
2137 @printindex cp
2139 @bye

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