1 /***************************************************************************
2 * Copyright (C) 2007 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
24 #include "lpc3180_nand_controller.h"
27 static int lpc3180_nand_device_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
, struct nand_device_s
*device
);
28 static int lpc3180_register_commands(struct command_context_s
*cmd_ctx
);
29 static int lpc3180_init(struct nand_device_s
*device
);
30 static int lpc3180_reset(struct nand_device_s
*device
);
31 static int lpc3180_command(struct nand_device_s
*device
, uint8_t command
);
32 static int lpc3180_address(struct nand_device_s
*device
, uint8_t address
);
33 static int lpc3180_write_data(struct nand_device_s
*device
, uint16_t data
);
34 static int lpc3180_read_data(struct nand_device_s
*device
, void *data
);
35 static int lpc3180_write_page(struct nand_device_s
*device
, uint32_t page
, uint8_t *data
, uint32_t data_size
, uint8_t *oob
, uint32_t oob_size
);
36 static int lpc3180_read_page(struct nand_device_s
*device
, uint32_t page
, uint8_t *data
, uint32_t data_size
, uint8_t *oob
, uint32_t oob_size
);
37 static int lpc3180_controller_ready(struct nand_device_s
*device
, int timeout
);
38 static int lpc3180_nand_ready(struct nand_device_s
*device
, int timeout
);
40 static int handle_lpc3180_select_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
42 nand_flash_controller_t lpc3180_nand_controller
=
45 .nand_device_command
= lpc3180_nand_device_command
,
46 .register_commands
= lpc3180_register_commands
,
48 .reset
= lpc3180_reset
,
49 .command
= lpc3180_command
,
50 .address
= lpc3180_address
,
51 .write_data
= lpc3180_write_data
,
52 .read_data
= lpc3180_read_data
,
53 .write_page
= lpc3180_write_page
,
54 .read_page
= lpc3180_read_page
,
55 .controller_ready
= lpc3180_controller_ready
,
56 .nand_ready
= lpc3180_nand_ready
,
59 /* nand device lpc3180 <target#> <oscillator_frequency>
61 static int lpc3180_nand_device_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
, struct nand_device_s
*device
)
65 LOG_WARNING("incomplete 'lpc3180' nand flash configuration");
66 return ERROR_FLASH_BANK_INVALID
;
69 target_t
*target
= get_target(args
[1]);
72 LOG_ERROR("target '%s' not defined", args
[1]);
73 return ERROR_NAND_DEVICE_INVALID
;
77 COMMAND_PARSE_NUMBER(u32
, args
[2], osc_freq
);
79 lpc3180_nand_controller_t
*lpc3180_info
;
80 lpc3180_info
= malloc(sizeof(lpc3180_nand_controller_t
));
81 device
->controller_priv
= lpc3180_info
;
83 lpc3180_info
->target
= target
;
84 lpc3180_info
->osc_freq
= osc_freq
;
86 if ((lpc3180_info
->osc_freq
< 1000) || (lpc3180_info
->osc_freq
> 20000))
88 LOG_WARNING("LPC3180 oscillator frequency should be between 1000 and 20000 kHz, was %i", lpc3180_info
->osc_freq
);
90 lpc3180_info
->selected_controller
= LPC3180_NO_CONTROLLER
;
91 lpc3180_info
->sw_write_protection
= 0;
92 lpc3180_info
->sw_wp_lower_bound
= 0x0;
93 lpc3180_info
->sw_wp_upper_bound
= 0x0;
98 static int lpc3180_register_commands(struct command_context_s
*cmd_ctx
)
100 command_t
*lpc3180_cmd
= register_command(cmd_ctx
, NULL
, "lpc3180", NULL
, COMMAND_ANY
, "commands specific to the LPC3180 NAND flash controllers");
102 register_command(cmd_ctx
, lpc3180_cmd
, "select", handle_lpc3180_select_command
, COMMAND_EXEC
, "select <'mlc'|'slc'> controller (default is mlc)");
107 static int lpc3180_pll(int fclkin
, uint32_t pll_ctrl
)
109 int bypass
= (pll_ctrl
& 0x8000) >> 15;
110 int direct
= (pll_ctrl
& 0x4000) >> 14;
111 int feedback
= (pll_ctrl
& 0x2000) >> 13;
112 int p
= (1 << ((pll_ctrl
& 0x1800) >> 11) * 2);
113 int n
= ((pll_ctrl
& 0x0600) >> 9) + 1;
114 int m
= ((pll_ctrl
& 0x01fe) >> 1) + 1;
115 int lock
= (pll_ctrl
& 0x1);
118 LOG_WARNING("PLL is not locked");
120 if (!bypass
&& direct
) /* direct mode */
121 return (m
* fclkin
) / n
;
123 if (bypass
&& !direct
) /* bypass mode */
124 return fclkin
/ (2 * p
);
126 if (bypass
& direct
) /* direct bypass mode */
129 if (feedback
) /* integer mode */
130 return m
* (fclkin
/ n
);
131 else /* non-integer mode */
132 return (m
/ (2 * p
)) * (fclkin
/ n
);
135 static float lpc3180_cycle_time(lpc3180_nand_controller_t
*lpc3180_info
)
137 target_t
*target
= lpc3180_info
->target
;
138 uint32_t sysclk_ctrl
, pwr_ctrl
, hclkdiv_ctrl
, hclkpll_ctrl
;
144 /* calculate timings */
146 /* determine current SYSCLK (13'MHz or main oscillator) */
147 target_read_u32(target
, 0x40004050, &sysclk_ctrl
);
149 if ((sysclk_ctrl
& 1) == 0)
150 sysclk
= lpc3180_info
->osc_freq
;
154 /* determine selected HCLK source */
155 target_read_u32(target
, 0x40004044, &pwr_ctrl
);
157 if ((pwr_ctrl
& (1 << 2)) == 0) /* DIRECT RUN mode */
163 target_read_u32(target
, 0x40004058, &hclkpll_ctrl
);
164 hclk_pll
= lpc3180_pll(sysclk
, hclkpll_ctrl
);
166 target_read_u32(target
, 0x40004040, &hclkdiv_ctrl
);
168 if (pwr_ctrl
& (1 << 10)) /* ARM_CLK and HCLK use PERIPH_CLK */
170 hclk
= hclk_pll
/ (((hclkdiv_ctrl
& 0x7c) >> 2) + 1);
172 else /* HCLK uses HCLK_PLL */
174 hclk
= hclk_pll
/ (1 << (hclkdiv_ctrl
& 0x3));
178 LOG_DEBUG("LPC3180 HCLK currently clocked at %i kHz", hclk
);
180 cycle
= (1.0 / hclk
) * 1000000.0;
185 static int lpc3180_init(struct nand_device_s
*device
)
187 lpc3180_nand_controller_t
*lpc3180_info
= device
->controller_priv
;
188 target_t
*target
= lpc3180_info
->target
;
189 int bus_width
= (device
->bus_width
) ? (device
->bus_width
) : 8;
190 int address_cycles
= (device
->address_cycles
) ? (device
->address_cycles
) : 3;
191 int page_size
= (device
->page_size
) ? (device
->page_size
) : 512;
193 if (target
->state
!= TARGET_HALTED
)
195 LOG_ERROR("target must be halted to use LPC3180 NAND flash controller");
196 return ERROR_NAND_OPERATION_FAILED
;
199 /* sanitize arguments */
200 if ((bus_width
!= 8) && (bus_width
!= 16))
202 LOG_ERROR("LPC3180 only supports 8 or 16 bit bus width, not %i", bus_width
);
203 return ERROR_NAND_OPERATION_NOT_SUPPORTED
;
206 /* The LPC3180 only brings out 8 bit NAND data bus, but the controller
207 * would support 16 bit, too, so we just warn about this for now
211 LOG_WARNING("LPC3180 only supports 8 bit bus width");
214 /* inform calling code about selected bus width */
215 device
->bus_width
= bus_width
;
217 if ((address_cycles
!= 3) && (address_cycles
!= 4))
219 LOG_ERROR("LPC3180 only supports 3 or 4 address cycles, not %i", address_cycles
);
220 return ERROR_NAND_OPERATION_NOT_SUPPORTED
;
223 if ((page_size
!= 512) && (page_size
!= 2048))
225 LOG_ERROR("LPC3180 only supports 512 or 2048 byte pages, not %i", page_size
);
226 return ERROR_NAND_OPERATION_NOT_SUPPORTED
;
229 /* select MLC controller if none is currently selected */
230 if (lpc3180_info
->selected_controller
== LPC3180_NO_CONTROLLER
)
232 LOG_DEBUG("no LPC3180 NAND flash controller selected, using default 'mlc'");
233 lpc3180_info
->selected_controller
= LPC3180_MLC_CONTROLLER
;
236 if (lpc3180_info
->selected_controller
== LPC3180_MLC_CONTROLLER
)
238 uint32_t mlc_icr_value
= 0x0;
240 int twp
, twh
, trp
, treh
, trhz
, trbwb
, tcea
;
242 /* FLASHCLK_CTRL = 0x22 (enable clock for MLC flash controller) */
243 target_write_u32(target
, 0x400040c8, 0x22);
245 /* MLC_CEH = 0x0 (Force nCE assert) */
246 target_write_u32(target
, 0x200b804c, 0x0);
248 /* MLC_LOCK = 0xa25e (unlock protected registers) */
249 target_write_u32(target
, 0x200b8044, 0xa25e);
251 /* MLC_ICR = configuration */
252 if (lpc3180_info
->sw_write_protection
)
253 mlc_icr_value
|= 0x8;
254 if (page_size
== 2048)
255 mlc_icr_value
|= 0x4;
256 if (address_cycles
== 4)
257 mlc_icr_value
|= 0x2;
259 mlc_icr_value
|= 0x1;
260 target_write_u32(target
, 0x200b8030, mlc_icr_value
);
262 /* calculate NAND controller timings */
263 cycle
= lpc3180_cycle_time(lpc3180_info
);
265 twp
= ((40 / cycle
) + 1);
266 twh
= ((20 / cycle
) + 1);
267 trp
= ((30 / cycle
) + 1);
268 treh
= ((15 / cycle
) + 1);
269 trhz
= ((30 / cycle
) + 1);
270 trbwb
= ((100 / cycle
) + 1);
271 tcea
= ((45 / cycle
) + 1);
273 /* MLC_LOCK = 0xa25e (unlock protected registers) */
274 target_write_u32(target
, 0x200b8044, 0xa25e);
277 target_write_u32(target
, 0x200b8034, (twp
& 0xf) | ((twh
& 0xf) << 4) |
278 ((trp
& 0xf) << 8) | ((treh
& 0xf) << 12) | ((trhz
& 0x7) << 16) |
279 ((trbwb
& 0x1f) << 19) | ((tcea
& 0x3) << 24));
281 lpc3180_reset(device
);
283 else if (lpc3180_info
->selected_controller
== LPC3180_SLC_CONTROLLER
)
286 int r_setup
, r_hold
, r_width
, r_rdy
;
287 int w_setup
, w_hold
, w_width
, w_rdy
;
289 /* FLASHCLK_CTRL = 0x05 (enable clock for SLC flash controller) */
290 target_write_u32(target
, 0x400040c8, 0x05);
292 /* SLC_CFG = 0x (Force nCE assert, ECC enabled, WIDTH = bus_width) */
293 target_write_u32(target
, 0x20020014, 0x28 | (bus_width
== 16) ? 1 : 0);
295 /* calculate NAND controller timings */
296 cycle
= lpc3180_cycle_time(lpc3180_info
);
298 r_setup
= w_setup
= 0;
299 r_hold
= w_hold
= 10 / cycle
;
300 r_width
= 30 / cycle
;
301 w_width
= 40 / cycle
;
302 r_rdy
= w_rdy
= 100 / cycle
;
304 /* SLC_TAC: SLC timing arcs register */
305 target_write_u32(target
, 0x2002002c, (r_setup
& 0xf) | ((r_hold
& 0xf) << 4) |
306 ((r_width
& 0xf) << 8) | ((r_rdy
& 0xf) << 12) | ((w_setup
& 0xf) << 16) |
307 ((w_hold
& 0xf) << 20) | ((w_width
& 0xf) << 24) | ((w_rdy
& 0xf) << 28));
309 lpc3180_reset(device
);
315 static int lpc3180_reset(struct nand_device_s
*device
)
317 lpc3180_nand_controller_t
*lpc3180_info
= device
->controller_priv
;
318 target_t
*target
= lpc3180_info
->target
;
320 if (target
->state
!= TARGET_HALTED
)
322 LOG_ERROR("target must be halted to use LPC3180 NAND flash controller");
323 return ERROR_NAND_OPERATION_FAILED
;
326 if (lpc3180_info
->selected_controller
== LPC3180_NO_CONTROLLER
)
328 LOG_ERROR("BUG: no LPC3180 NAND flash controller selected");
329 return ERROR_NAND_OPERATION_FAILED
;
331 else if (lpc3180_info
->selected_controller
== LPC3180_MLC_CONTROLLER
)
333 /* MLC_CMD = 0xff (reset controller and NAND device) */
334 target_write_u32(target
, 0x200b8000, 0xff);
336 if (!lpc3180_controller_ready(device
, 100))
338 LOG_ERROR("LPC3180 NAND controller timed out after reset");
339 return ERROR_NAND_OPERATION_TIMEOUT
;
342 else if (lpc3180_info
->selected_controller
== LPC3180_SLC_CONTROLLER
)
344 /* SLC_CTRL = 0x6 (ECC_CLEAR, SW_RESET) */
345 target_write_u32(target
, 0x20020010, 0x6);
347 if (!lpc3180_controller_ready(device
, 100))
349 LOG_ERROR("LPC3180 NAND controller timed out after reset");
350 return ERROR_NAND_OPERATION_TIMEOUT
;
357 static int lpc3180_command(struct nand_device_s
*device
, uint8_t command
)
359 lpc3180_nand_controller_t
*lpc3180_info
= device
->controller_priv
;
360 target_t
*target
= lpc3180_info
->target
;
362 if (target
->state
!= TARGET_HALTED
)
364 LOG_ERROR("target must be halted to use LPC3180 NAND flash controller");
365 return ERROR_NAND_OPERATION_FAILED
;
368 if (lpc3180_info
->selected_controller
== LPC3180_NO_CONTROLLER
)
370 LOG_ERROR("BUG: no LPC3180 NAND flash controller selected");
371 return ERROR_NAND_OPERATION_FAILED
;
373 else if (lpc3180_info
->selected_controller
== LPC3180_MLC_CONTROLLER
)
375 /* MLC_CMD = command */
376 target_write_u32(target
, 0x200b8000, command
);
378 else if (lpc3180_info
->selected_controller
== LPC3180_SLC_CONTROLLER
)
380 /* SLC_CMD = command */
381 target_write_u32(target
, 0x20020008, command
);
387 static int lpc3180_address(struct nand_device_s
*device
, uint8_t address
)
389 lpc3180_nand_controller_t
*lpc3180_info
= device
->controller_priv
;
390 target_t
*target
= lpc3180_info
->target
;
392 if (target
->state
!= TARGET_HALTED
)
394 LOG_ERROR("target must be halted to use LPC3180 NAND flash controller");
395 return ERROR_NAND_OPERATION_FAILED
;
398 if (lpc3180_info
->selected_controller
== LPC3180_NO_CONTROLLER
)
400 LOG_ERROR("BUG: no LPC3180 NAND flash controller selected");
401 return ERROR_NAND_OPERATION_FAILED
;
403 else if (lpc3180_info
->selected_controller
== LPC3180_MLC_CONTROLLER
)
405 /* MLC_ADDR = address */
406 target_write_u32(target
, 0x200b8004, address
);
408 else if (lpc3180_info
->selected_controller
== LPC3180_SLC_CONTROLLER
)
410 /* SLC_ADDR = address */
411 target_write_u32(target
, 0x20020004, address
);
417 static int lpc3180_write_data(struct nand_device_s
*device
, uint16_t data
)
419 lpc3180_nand_controller_t
*lpc3180_info
= device
->controller_priv
;
420 target_t
*target
= lpc3180_info
->target
;
422 if (target
->state
!= TARGET_HALTED
)
424 LOG_ERROR("target must be halted to use LPC3180 NAND flash controller");
425 return ERROR_NAND_OPERATION_FAILED
;
428 if (lpc3180_info
->selected_controller
== LPC3180_NO_CONTROLLER
)
430 LOG_ERROR("BUG: no LPC3180 NAND flash controller selected");
431 return ERROR_NAND_OPERATION_FAILED
;
433 else if (lpc3180_info
->selected_controller
== LPC3180_MLC_CONTROLLER
)
435 /* MLC_DATA = data */
436 target_write_u32(target
, 0x200b0000, data
);
438 else if (lpc3180_info
->selected_controller
== LPC3180_SLC_CONTROLLER
)
440 /* SLC_DATA = data */
441 target_write_u32(target
, 0x20020000, data
);
447 static int lpc3180_read_data(struct nand_device_s
*device
, void *data
)
449 lpc3180_nand_controller_t
*lpc3180_info
= device
->controller_priv
;
450 target_t
*target
= lpc3180_info
->target
;
452 if (target
->state
!= TARGET_HALTED
)
454 LOG_ERROR("target must be halted to use LPC3180 NAND flash controller");
455 return ERROR_NAND_OPERATION_FAILED
;
458 if (lpc3180_info
->selected_controller
== LPC3180_NO_CONTROLLER
)
460 LOG_ERROR("BUG: no LPC3180 NAND flash controller selected");
461 return ERROR_NAND_OPERATION_FAILED
;
463 else if (lpc3180_info
->selected_controller
== LPC3180_MLC_CONTROLLER
)
465 /* data = MLC_DATA, use sized access */
466 if (device
->bus_width
== 8)
468 uint8_t *data8
= data
;
469 target_read_u8(target
, 0x200b0000, data8
);
471 else if (device
->bus_width
== 16)
473 uint16_t *data16
= data
;
474 target_read_u16(target
, 0x200b0000, data16
);
478 LOG_ERROR("BUG: bus_width neither 8 nor 16 bit");
479 return ERROR_NAND_OPERATION_FAILED
;
482 else if (lpc3180_info
->selected_controller
== LPC3180_SLC_CONTROLLER
)
486 /* data = SLC_DATA, must use 32-bit access */
487 target_read_u32(target
, 0x20020000, &data32
);
489 if (device
->bus_width
== 8)
491 uint8_t *data8
= data
;
492 *data8
= data32
& 0xff;
494 else if (device
->bus_width
== 16)
496 uint16_t *data16
= data
;
497 *data16
= data32
& 0xffff;
501 LOG_ERROR("BUG: bus_width neither 8 nor 16 bit");
502 return ERROR_NAND_OPERATION_FAILED
;
509 static int lpc3180_write_page(struct nand_device_s
*device
, uint32_t page
, uint8_t *data
, uint32_t data_size
, uint8_t *oob
, uint32_t oob_size
)
511 lpc3180_nand_controller_t
*lpc3180_info
= device
->controller_priv
;
512 target_t
*target
= lpc3180_info
->target
;
516 if (target
->state
!= TARGET_HALTED
)
518 LOG_ERROR("target must be halted to use LPC3180 NAND flash controller");
519 return ERROR_NAND_OPERATION_FAILED
;
522 if (lpc3180_info
->selected_controller
== LPC3180_NO_CONTROLLER
)
524 LOG_ERROR("BUG: no LPC3180 NAND flash controller selected");
525 return ERROR_NAND_OPERATION_FAILED
;
527 else if (lpc3180_info
->selected_controller
== LPC3180_MLC_CONTROLLER
)
529 uint8_t *page_buffer
;
531 int quarter
, num_quarters
;
535 LOG_ERROR("LPC3180 MLC controller can't write OOB data only");
536 return ERROR_NAND_OPERATION_NOT_SUPPORTED
;
539 if (oob
&& (oob_size
> 6))
541 LOG_ERROR("LPC3180 MLC controller can't write more than 6 bytes of OOB data");
542 return ERROR_NAND_OPERATION_NOT_SUPPORTED
;
545 if (data_size
> (uint32_t)device
->page_size
)
547 LOG_ERROR("data size exceeds page size");
548 return ERROR_NAND_OPERATION_NOT_SUPPORTED
;
551 /* MLC_CMD = sequential input */
552 target_write_u32(target
, 0x200b8000, NAND_CMD_SEQIN
);
554 page_buffer
= malloc(512);
555 oob_buffer
= malloc(6);
557 if (device
->page_size
== 512)
559 /* MLC_ADDR = 0x0 (one column cycle) */
560 target_write_u32(target
, 0x200b8004, 0x0);
563 target_write_u32(target
, 0x200b8004, page
& 0xff);
564 target_write_u32(target
, 0x200b8004, (page
>> 8) & 0xff);
566 if (device
->address_cycles
== 4)
567 target_write_u32(target
, 0x200b8004, (page
>> 16) & 0xff);
571 /* MLC_ADDR = 0x0 (two column cycles) */
572 target_write_u32(target
, 0x200b8004, 0x0);
573 target_write_u32(target
, 0x200b8004, 0x0);
576 target_write_u32(target
, 0x200b8004, page
& 0xff);
577 target_write_u32(target
, 0x200b8004, (page
>> 8) & 0xff);
580 /* when using the MLC controller, we have to treat a large page device
581 * as being made out of four quarters, each the size of a small page device
583 num_quarters
= (device
->page_size
== 2048) ? 4 : 1;
585 for (quarter
= 0; quarter
< num_quarters
; quarter
++)
587 int thisrun_data_size
= (data_size
> 512) ? 512 : data_size
;
588 int thisrun_oob_size
= (oob_size
> 6) ? 6 : oob_size
;
590 memset(page_buffer
, 0xff, 512);
593 memcpy(page_buffer
, data
, thisrun_data_size
);
594 data_size
-= thisrun_data_size
;
595 data
+= thisrun_data_size
;
598 memset(oob_buffer
, 0xff, (device
->page_size
== 512) ? 6 : 24);
601 memcpy(page_buffer
, oob
, thisrun_oob_size
);
602 oob_size
-= thisrun_oob_size
;
603 oob
+= thisrun_oob_size
;
606 /* write MLC_ECC_ENC_REG to start encode cycle */
607 target_write_u32(target
, 0x200b8008, 0x0);
609 target_write_memory(target
, 0x200a8000, 4, 128, page_buffer
+ (quarter
* 512));
610 target_write_memory(target
, 0x200a8000, 1, 6, oob_buffer
+ (quarter
* 6));
612 /* write MLC_ECC_AUTO_ENC_REG to start auto encode */
613 target_write_u32(target
, 0x200b8010, 0x0);
615 if (!lpc3180_controller_ready(device
, 1000))
617 LOG_ERROR("timeout while waiting for completion of auto encode cycle");
618 return ERROR_NAND_OPERATION_FAILED
;
622 /* MLC_CMD = auto program command */
623 target_write_u32(target
, 0x200b8000, NAND_CMD_PAGEPROG
);
625 if ((retval
= nand_read_status(device
, &status
)) != ERROR_OK
)
627 LOG_ERROR("couldn't read status");
628 return ERROR_NAND_OPERATION_FAILED
;
631 if (status
& NAND_STATUS_FAIL
)
633 LOG_ERROR("write operation didn't pass, status: 0x%2.2x", status
);
634 return ERROR_NAND_OPERATION_FAILED
;
640 else if (lpc3180_info
->selected_controller
== LPC3180_SLC_CONTROLLER
)
642 return nand_write_page_raw(device
, page
, data
, data_size
, oob
, oob_size
);
648 static int lpc3180_read_page(struct nand_device_s
*device
, uint32_t page
, uint8_t *data
, uint32_t data_size
, uint8_t *oob
, uint32_t oob_size
)
650 lpc3180_nand_controller_t
*lpc3180_info
= device
->controller_priv
;
651 target_t
*target
= lpc3180_info
->target
;
653 if (target
->state
!= TARGET_HALTED
)
655 LOG_ERROR("target must be halted to use LPC3180 NAND flash controller");
656 return ERROR_NAND_OPERATION_FAILED
;
659 if (lpc3180_info
->selected_controller
== LPC3180_NO_CONTROLLER
)
661 LOG_ERROR("BUG: no LPC3180 NAND flash controller selected");
662 return ERROR_NAND_OPERATION_FAILED
;
664 else if (lpc3180_info
->selected_controller
== LPC3180_MLC_CONTROLLER
)
666 uint8_t *page_buffer
;
668 uint32_t page_bytes_done
= 0;
669 uint32_t oob_bytes_done
= 0;
673 if (oob
&& (oob_size
> 6))
675 LOG_ERROR("LPC3180 MLC controller can't read more than 6 bytes of OOB data");
676 return ERROR_NAND_OPERATION_NOT_SUPPORTED
;
680 if (data_size
> (uint32_t)device
->page_size
)
682 LOG_ERROR("data size exceeds page size");
683 return ERROR_NAND_OPERATION_NOT_SUPPORTED
;
686 if (device
->page_size
== 2048)
688 page_buffer
= malloc(2048);
689 oob_buffer
= malloc(64);
693 page_buffer
= malloc(512);
694 oob_buffer
= malloc(16);
699 /* MLC_CMD = Read OOB
700 * we can use the READOOB command on both small and large page devices,
701 * as the controller translates the 0x50 command to a 0x0 with appropriate
702 * positioning of the serial buffer read pointer
704 target_write_u32(target
, 0x200b8000, NAND_CMD_READOOB
);
708 /* MLC_CMD = Read0 */
709 target_write_u32(target
, 0x200b8000, NAND_CMD_READ0
);
712 if (device
->page_size
== 512)
714 /* small page device */
715 /* MLC_ADDR = 0x0 (one column cycle) */
716 target_write_u32(target
, 0x200b8004, 0x0);
719 target_write_u32(target
, 0x200b8004, page
& 0xff);
720 target_write_u32(target
, 0x200b8004, (page
>> 8) & 0xff);
722 if (device
->address_cycles
== 4)
723 target_write_u32(target
, 0x200b8004, (page
>> 16) & 0xff);
727 /* large page device */
728 /* MLC_ADDR = 0x0 (two column cycles) */
729 target_write_u32(target
, 0x200b8004, 0x0);
730 target_write_u32(target
, 0x200b8004, 0x0);
733 target_write_u32(target
, 0x200b8004, page
& 0xff);
734 target_write_u32(target
, 0x200b8004, (page
>> 8) & 0xff);
736 /* MLC_CMD = Read Start */
737 target_write_u32(target
, 0x200b8000, NAND_CMD_READSTART
);
740 while (page_bytes_done
< (uint32_t)device
->page_size
)
742 /* MLC_ECC_AUTO_DEC_REG = dummy */
743 target_write_u32(target
, 0x200b8014, 0xaa55aa55);
745 if (!lpc3180_controller_ready(device
, 1000))
747 LOG_ERROR("timeout while waiting for completion of auto decode cycle");
748 return ERROR_NAND_OPERATION_FAILED
;
751 target_read_u32(target
, 0x200b8048, &mlc_isr
);
757 LOG_ERROR("uncorrectable error detected: 0x%2.2x", (unsigned)mlc_isr
);
758 return ERROR_NAND_OPERATION_FAILED
;
761 LOG_WARNING("%i symbol error detected and corrected", ((int)(((mlc_isr
& 0x30) >> 4) + 1)));
766 target_read_memory(target
, 0x200a8000, 4, 128, page_buffer
+ page_bytes_done
);
771 target_read_memory(target
, 0x200a8000, 4, 4, oob_buffer
+ oob_bytes_done
);
774 page_bytes_done
+= 512;
775 oob_bytes_done
+= 16;
779 memcpy(data
, page_buffer
, data_size
);
782 memcpy(oob
, oob_buffer
, oob_size
);
787 else if (lpc3180_info
->selected_controller
== LPC3180_SLC_CONTROLLER
)
789 return nand_read_page_raw(device
, page
, data
, data_size
, oob
, oob_size
);
795 static int lpc3180_controller_ready(struct nand_device_s
*device
, int timeout
)
797 lpc3180_nand_controller_t
*lpc3180_info
= device
->controller_priv
;
798 target_t
*target
= lpc3180_info
->target
;
799 uint8_t status
= 0x0;
801 if (target
->state
!= TARGET_HALTED
)
803 LOG_ERROR("target must be halted to use LPC3180 NAND flash controller");
804 return ERROR_NAND_OPERATION_FAILED
;
809 if (lpc3180_info
->selected_controller
== LPC3180_MLC_CONTROLLER
)
811 /* Read MLC_ISR, wait for controller to become ready */
812 target_read_u8(target
, 0x200b8048, &status
);
817 else if (lpc3180_info
->selected_controller
== LPC3180_SLC_CONTROLLER
)
819 /* we pretend that the SLC controller is always ready */
824 } while (timeout
-- > 0);
829 static int lpc3180_nand_ready(struct nand_device_s
*device
, int timeout
)
831 lpc3180_nand_controller_t
*lpc3180_info
= device
->controller_priv
;
832 target_t
*target
= lpc3180_info
->target
;
834 if (target
->state
!= TARGET_HALTED
)
836 LOG_ERROR("target must be halted to use LPC3180 NAND flash controller");
837 return ERROR_NAND_OPERATION_FAILED
;
842 if (lpc3180_info
->selected_controller
== LPC3180_MLC_CONTROLLER
)
844 uint8_t status
= 0x0;
846 /* Read MLC_ISR, wait for NAND flash device to become ready */
847 target_read_u8(target
, 0x200b8048, &status
);
852 else if (lpc3180_info
->selected_controller
== LPC3180_SLC_CONTROLLER
)
854 uint32_t status
= 0x0;
856 /* Read SLC_STAT and check READY bit */
857 target_read_u32(target
, 0x20020018, &status
);
864 } while (timeout
-- > 0);
869 static int handle_lpc3180_select_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
871 lpc3180_nand_controller_t
*lpc3180_info
= NULL
;
877 if ((argc
< 1) || (argc
> 2))
879 return ERROR_COMMAND_SYNTAX_ERROR
;
883 COMMAND_PARSE_NUMBER(uint
, args
[1], num
);
884 nand_device_t
*device
= get_nand_device_by_num(num
);
887 command_print(cmd_ctx
, "nand device '#%s' is out of bounds", args
[0]);
891 lpc3180_info
= device
->controller_priv
;
895 if (strcmp(args
[1], "mlc") == 0)
897 lpc3180_info
->selected_controller
= LPC3180_MLC_CONTROLLER
;
899 else if (strcmp(args
[1], "slc") == 0)
901 lpc3180_info
->selected_controller
= LPC3180_SLC_CONTROLLER
;
905 return ERROR_COMMAND_SYNTAX_ERROR
;
909 command_print(cmd_ctx
, "%s controller selected", selected
[lpc3180_info
->selected_controller
]);
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