src/flash/nand.h

   1 /***************************************************************************
   2  *   Copyright (C) 2007 by Dominic Rath                                    *
   3  *   Dominic.Rath@gmx.de                                                   *
   4  *                                                                         *
   5  *   Partially based on linux/include/linux/mtd/nand.h                     *
   6  *   Copyright (C) 2000 David Woodhouse <dwmw2@mvhi.com>                   *
   7  *   Copyright (C) 2000 Steven J. Hill <sjhill@realitydiluted.com>         *
   8  *   Copyright (C) 2000 Thomas Gleixner <tglx@linutronix.de>               *
   9  *                                                                         *
  10  *   This program is free software; you can redistribute it and/or modify  *
  11  *   it under the terms of the GNU General Public License as published by  *
  12  *   the Free Software Foundation; either version 2 of the License, or     *
  13  *   (at your option) any later version.                                   *
  14  *                                                                         *
  15  *   This program is distributed in the hope that it will be useful,       *
  16  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  17  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  18  *   GNU General Public License for more details.                          *
  19  *                                                                         *
  20  *   You should have received a copy of the GNU General Public License     *
  21  *   along with this program; if not, write to the                         *
  22  *   Free Software Foundation, Inc.,                                       *
  23  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  24  ***************************************************************************/
  25 #ifndef NAND_H
  26 #define NAND_H
  27
  28 #include <flash/common.h>
  29 // to be removed later
  30 #include <target/target.h>
  31 // to be removed later
  32 #include <flash/nand/driver.h>
  33
  34 /**
  35  * Representation of a single NAND block in a NAND device.
  36  */
  37 struct nand_block
  38 {
  39         /** Offset to the block. */
  40         uint32_t offset;
  41
  42         /** Size of the block. */
  43         uint32_t size;
  44
  45         /** True if the block has been erased. */
  46         int is_erased;
  47
  48         /** True if the block is bad. */
  49         int is_bad;
  50 };
  51
  52 struct nand_oobfree {
  53         int offset;
  54         int length;
  55 };
  56
  57 struct nand_ecclayout {
  58         int eccbytes;
  59         int eccpos[64];
  60         int oobavail;
  61         struct nand_oobfree oobfree[2];
  62 };
  63
  64 struct nand_device
  65 {
  66         char *name;
  67         struct nand_flash_controller *controller;
  68         void *controller_priv;
  69         struct nand_manufacturer *manufacturer;
  70         struct nand_info *device;
  71         int bus_width;
  72         int address_cycles;
  73         int page_size;
  74         int erase_size;
  75         int use_raw;
  76         int num_blocks;
  77         struct nand_block *blocks;
  78         struct nand_device *next;
  79 };
  80
  81 /* NAND Flash Manufacturer ID Codes
  82  */
  83 enum
  84 {
  85         NAND_MFR_TOSHIBA = 0x98,
  86         NAND_MFR_SAMSUNG = 0xec,
  87         NAND_MFR_FUJITSU = 0x04,
  88         NAND_MFR_NATIONAL = 0x8f,
  89         NAND_MFR_RENESAS = 0x07,
  90         NAND_MFR_STMICRO = 0x20,
  91         NAND_MFR_HYNIX = 0xad,
  92         NAND_MFR_MICRON = 0x2c,
  93 };
  94
  95 struct nand_manufacturer
  96 {
  97         int id;
  98         char *name;
  99 };
 100
 101 struct nand_info
 102 {
 103         char *name;
 104         int id;
 105         int page_size;
 106         int chip_size;
 107         int erase_size;
 108         int options;
 109 };
 110
 111 /* Option constants for bizarre disfunctionality and real features
 112  */
 113 enum {
 114         /* Chip can not auto increment pages */
 115         NAND_NO_AUTOINCR = 0x00000001,
 116
 117         /* Buswitdh is 16 bit */
 118         NAND_BUSWIDTH_16 = 0x00000002,
 119
 120         /* Device supports partial programming without padding */
 121         NAND_NO_PADDING = 0x00000004,
 122
 123         /* Chip has cache program function */
 124         NAND_CACHEPRG = 0x00000008,
 125
 126         /* Chip has copy back function */
 127         NAND_COPYBACK = 0x00000010,
 128
 129         /* AND Chip which has 4 banks and a confusing page / block
 130          * assignment. See Renesas datasheet for further information */
 131         NAND_IS_AND = 0x00000020,
 132
 133         /* Chip has a array of 4 pages which can be read without
 134          * additional ready /busy waits */
 135         NAND_4PAGE_ARRAY = 0x00000040,
 136
 137         /* Chip requires that BBT is periodically rewritten to prevent
 138          * bits from adjacent blocks from 'leaking' in altering data.
 139          * This happens with the Renesas AG-AND chips, possibly others.  */
 140         BBT_AUTO_REFRESH = 0x00000080,
 141
 142         /* Chip does not require ready check on read. True
 143          * for all large page devices, as they do not support
 144          * autoincrement.*/
 145         NAND_NO_READRDY = 0x00000100,
 146
 147         /* Options valid for Samsung large page devices */
 148         NAND_SAMSUNG_LP_OPTIONS = (NAND_NO_PADDING | NAND_CACHEPRG | NAND_COPYBACK),
 149
 150         /* Options for new chips with large page size. The pagesize and the
 151          * erasesize is determined from the extended id bytes
 152          */
 153         LP_OPTIONS = (NAND_SAMSUNG_LP_OPTIONS | NAND_NO_READRDY | NAND_NO_AUTOINCR),
 154         LP_OPTIONS16 = (LP_OPTIONS | NAND_BUSWIDTH_16),
 155 };
 156
 157 enum
 158 {
 159         /* Standard NAND flash commands */
 160         NAND_CMD_READ0 = 0x0,
 161         NAND_CMD_READ1 = 0x1,
 162         NAND_CMD_RNDOUT = 0x5,
 163         NAND_CMD_PAGEPROG = 0x10,
 164         NAND_CMD_READOOB = 0x50,
 165         NAND_CMD_ERASE1 = 0x60,
 166         NAND_CMD_STATUS = 0x70,
 167         NAND_CMD_STATUS_MULTI = 0x71,
 168         NAND_CMD_SEQIN = 0x80,
 169         NAND_CMD_RNDIN = 0x85,
 170         NAND_CMD_READID = 0x90,
 171         NAND_CMD_ERASE2 = 0xd0,
 172         NAND_CMD_RESET = 0xff,
 173
 174         /* Extended commands for large page devices */
 175         NAND_CMD_READSTART = 0x30,
 176         NAND_CMD_RNDOUTSTART = 0xE0,
 177         NAND_CMD_CACHEDPROG = 0x15,
 178 };
 179
 180 /* Status bits */
 181 enum
 182 {
 183         NAND_STATUS_FAIL = 0x01,
 184         NAND_STATUS_FAIL_N1 = 0x02,
 185         NAND_STATUS_TRUE_READY = 0x20,
 186         NAND_STATUS_READY = 0x40,
 187         NAND_STATUS_WP = 0x80,
 188 };
 189
 190 /* OOB (spare) data formats */
 191 enum oob_formats
 192 {
 193         NAND_OOB_NONE = 0x0,    /* no OOB data at all */
 194         NAND_OOB_RAW = 0x1,             /* raw OOB data (16 bytes for 512b page sizes, 64 bytes for 2048b page sizes) */
 195         NAND_OOB_ONLY = 0x2,    /* only OOB data */
 196         NAND_OOB_SW_ECC = 0x10, /* when writing, use SW ECC (as opposed to no ECC) */
 197         NAND_OOB_HW_ECC = 0x20, /* when writing, use HW ECC (as opposed to no ECC) */
 198         NAND_OOB_SW_ECC_KW = 0x40, /* when writing, use Marvell's Kirkwood bootrom format */
 199         NAND_OOB_JFFS2 = 0x100, /* when writing, use JFFS2 OOB layout */
 200         NAND_OOB_YAFFS2 = 0x100,/* when writing, use YAFFS2 OOB layout */
 201 };
 202
 203
 204 /**
 205  * Returns the flash bank specified by @a name, which matches the
 206  * driver name and a suffix (option) specify the driver-specific
 207  * bank number. The suffix consists of the '.' and the driver-specific
 208  * bank number: when two davinci banks are defined, then 'davinci.1' refers
 209  * to the second (e.g. DM355EVM).
 210  */
 211 struct nand_device *get_nand_device_by_name(const char *name);
 212
 213 struct nand_device *get_nand_device_by_num(int num);
 214
 215 int nand_page_command(struct nand_device *nand, uint32_t page,
 216                 uint8_t cmd, bool oob_only);
 217
 218 int nand_read_page_raw(struct nand_device *nand, uint32_t page,
 219                 uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
 220 int nand_write_page_raw(struct nand_device *nand, uint32_t page,
 221                 uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
 222
 223 int nand_read_status(struct nand_device *nand, uint8_t *status);
 224
 225 int nand_calculate_ecc(struct nand_device *nand,
 226                 const uint8_t *dat, uint8_t *ecc_code);
 227 int nand_calculate_ecc_kw(struct nand_device *nand,
 228                 const uint8_t *dat, uint8_t *ecc_code);
 229
 230 int nand_register_commands(struct command_context *cmd_ctx);
 231 int nand_init(struct command_context *cmd_ctx);
 232
 233 /// helper for parsing a nand device command argument string
 234 COMMAND_HELPER(nand_command_get_device, unsigned name_index,
 235                 struct nand_device **nand);
 236
 237
 238 #define         ERROR_NAND_DEVICE_INVALID               (-1100)
 239 #define         ERROR_NAND_OPERATION_FAILED             (-1101)
 240 #define         ERROR_NAND_OPERATION_TIMEOUT    (-1102)
 241 #define         ERROR_NAND_OPERATION_NOT_SUPPORTED      (-1103)
 242 #define         ERROR_NAND_DEVICE_NOT_PROBED    (-1104)
 243 #define         ERROR_NAND_ERROR_CORRECTION_FAILED      (-1105)
 244 #define         ERROR_NAND_NO_BUFFER                    (-1106)
 245
 246 #endif /* NAND_H */