src/flash/nor/avrf.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2
   3 /***************************************************************************
   4  *   Copyright (C) 2009 by Simon Qian                                      *
   5  *   SimonQian@SimonQian.com                                               *
   6  ***************************************************************************/
   7
   8 #ifdef HAVE_CONFIG_H
   9 #include "config.h"
  10 #endif
  11
  12 #include "imp.h"
  13 #include <target/avrt.h>
  14
  15 /* AVR_JTAG_Instructions */
  16 #define AVR_JTAG_INS_LEN                                        4
  17 /* Public Instructions: */
  18 #define AVR_JTAG_INS_EXTEST                                     0x00
  19 #define AVR_JTAG_INS_IDCODE                                     0x01
  20 #define AVR_JTAG_INS_SAMPLE_PRELOAD                             0x02
  21 #define AVR_JTAG_INS_BYPASS                                     0x0F
  22 /* AVR Specified Public Instructions: */
  23 #define AVR_JTAG_INS_AVR_RESET                                  0x0C
  24 #define AVR_JTAG_INS_PROG_ENABLE                                0x04
  25 #define AVR_JTAG_INS_PROG_COMMANDS                              0x05
  26 #define AVR_JTAG_INS_PROG_PAGELOAD                              0x06
  27 #define AVR_JTAG_INS_PROG_PAGEREAD                              0x07
  28
  29 /* Data Registers: */
  30 #define AVR_JTAG_REG_BYPASS_LEN                                 1
  31 #define AVR_JTAG_REG_DEVICEID_LEN                               32
  32
  33 #define AVR_JTAG_REG_RESET_LEN                                  1
  34 #define AVR_JTAG_REG_JTAGID_LEN                                 32
  35 #define AVR_JTAG_REG_PROGRAMMING_ENABLE_LEN                     16
  36 #define AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN                    15
  37 #define AVR_JTAG_REG_FLASH_DATA_BYTE_LEN                        16
  38
  39 struct avrf_type {
  40         char name[15];
  41         uint16_t chip_id;
  42         int flash_page_size;
  43         int flash_page_num;
  44         int eeprom_page_size;
  45         int eeprom_page_num;
  46 };
  47
  48 struct avrf_flash_bank {
  49         int ppage_size;
  50         bool probed;
  51 };
  52
  53 static const struct avrf_type avft_chips_info[] = {
  54 /*      name, chip_id,  flash_page_size, flash_page_num,
  55  *                      eeprom_page_size, eeprom_page_num
  56  */
  57         {"atmega128", 0x9702, 256, 512, 8, 512},
  58         {"atmega128rfa1", 0xa701, 128, 512, 8, 512},
  59         {"atmega256rfr2", 0xa802, 256, 1024, 8, 1024},
  60         {"at90can128", 0x9781, 256, 512, 8, 512},
  61         {"at90usb128", 0x9782, 256, 512, 8, 512},
  62         {"atmega164p", 0x940a, 128, 128, 4, 128},
  63         {"atmega324p", 0x9508, 128, 256, 4, 256},
  64         {"atmega324pa", 0x9511, 128, 256, 4, 256},
  65         {"atmega644p", 0x960a, 256, 256, 8, 256},
  66         {"atmega1284p", 0x9705, 256, 512, 8, 512},
  67         {"atmega32u4", 0x9587, 128, 256, 4, 256},
  68 };
  69
  70 /* avr program functions */
  71 static int avr_jtag_reset(struct avr_common *avr, uint32_t reset)
  72 {
  73         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_AVR_RESET);
  74         avr_jtag_senddat(avr->jtag_info.tap, NULL, reset, AVR_JTAG_REG_RESET_LEN);
  75
  76         return ERROR_OK;
  77 }
  78
  79 static int avr_jtag_read_jtagid(struct avr_common *avr, uint32_t *id)
  80 {
  81         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_IDCODE);
  82         avr_jtag_senddat(avr->jtag_info.tap, id, 0, AVR_JTAG_REG_JTAGID_LEN);
  83
  84         return ERROR_OK;
  85 }
  86
  87 static int avr_jtagprg_enterprogmode(struct avr_common *avr)
  88 {
  89         avr_jtag_reset(avr, 1);
  90
  91         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);
  92         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xA370, AVR_JTAG_REG_PROGRAMMING_ENABLE_LEN);
  93
  94         return ERROR_OK;
  95 }
  96
  97 static int avr_jtagprg_leaveprogmode(struct avr_common *avr)
  98 {
  99         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
 100         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2300, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 101         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3300, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 102
 103         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);
 104         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0, AVR_JTAG_REG_PROGRAMMING_ENABLE_LEN);
 105
 106         avr_jtag_reset(avr, 0);
 107
 108         return ERROR_OK;
 109 }
 110
 111 static int avr_jtagprg_chiperase(struct avr_common *avr)
 112 {
 113         uint32_t poll_value;
 114
 115         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
 116         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2380, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 117         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3180, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 118         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 119         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 120
 121         do {
 122                 poll_value = 0;
 123                 avr_jtag_senddat(avr->jtag_info.tap,
 124                         &poll_value,
 125                         0x3380,
 126                         AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 127                 if (mcu_execute_queue() != ERROR_OK)
 128                         return ERROR_FAIL;
 129                 LOG_DEBUG("poll_value = 0x%04" PRIx32 "", poll_value);
 130         } while (!(poll_value & 0x0200));
 131
 132         return ERROR_OK;
 133 }
 134
 135 static int avr_jtagprg_writeflashpage(struct avr_common *avr,
 136         const bool ext_addressing,
 137         const uint8_t *page_buf,
 138         uint32_t buf_size,
 139         uint32_t addr,
 140         uint32_t page_size)
 141 {
 142         uint32_t poll_value;
 143
 144         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
 145         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2310, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 146
 147         /* load extended high byte */
 148         if (ext_addressing)
 149                 avr_jtag_senddat(avr->jtag_info.tap,
 150                         NULL,
 151                         0x0b00 | ((addr >> 17) & 0xFF),
 152                         AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 153
 154         /* load addr high byte */
 155         avr_jtag_senddat(avr->jtag_info.tap,
 156                 NULL,
 157                 0x0700 | ((addr >> 9) & 0xFF),
 158                 AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 159
 160         /* load addr low byte */
 161         avr_jtag_senddat(avr->jtag_info.tap,
 162                 NULL,
 163                 0x0300 | ((addr >> 1) & 0xFF),
 164                 AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 165
 166         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_PAGELOAD);
 167
 168         for (uint32_t i = 0; i < page_size; i++) {
 169                 if (i < buf_size)
 170                         avr_jtag_senddat(avr->jtag_info.tap, NULL, page_buf[i], 8);
 171                 else
 172                         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xFF, 8);
 173         }
 174
 175         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
 176
 177         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 178         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3500, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 179         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 180         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 181
 182         do {
 183                 poll_value = 0;
 184                 avr_jtag_senddat(avr->jtag_info.tap,
 185                         &poll_value,
 186                         0x3700,
 187                         AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 188                 if (mcu_execute_queue() != ERROR_OK)
 189                         return ERROR_FAIL;
 190                 LOG_DEBUG("poll_value = 0x%04" PRIx32 "", poll_value);
 191         } while (!(poll_value & 0x0200));
 192
 193         return ERROR_OK;
 194 }
 195
 196 FLASH_BANK_COMMAND_HANDLER(avrf_flash_bank_command)
 197 {
 198         struct avrf_flash_bank *avrf_info;
 199
 200         if (CMD_ARGC < 6)
 201                 return ERROR_COMMAND_SYNTAX_ERROR;
 202
 203         avrf_info = malloc(sizeof(struct avrf_flash_bank));
 204         bank->driver_priv = avrf_info;
 205
 206         avrf_info->probed = false;
 207
 208         return ERROR_OK;
 209 }
 210
 211 static int avrf_erase(struct flash_bank *bank, unsigned int first,
 212                 unsigned int last)
 213 {
 214         struct target *target = bank->target;
 215         struct avr_common *avr = target->arch_info;
 216         int status;
 217
 218         LOG_DEBUG("%s", __func__);
 219
 220         if (target->state != TARGET_HALTED) {
 221                 LOG_ERROR("Target not halted");
 222                 return ERROR_TARGET_NOT_HALTED;
 223         }
 224
 225         status = avr_jtagprg_enterprogmode(avr);
 226         if (status != ERROR_OK)
 227                 return status;
 228
 229         status = avr_jtagprg_chiperase(avr);
 230         if (status != ERROR_OK)
 231                 return status;
 232
 233         return avr_jtagprg_leaveprogmode(avr);
 234 }
 235
 236 static int avrf_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
 237 {
 238         struct target *target = bank->target;
 239         struct avr_common *avr = target->arch_info;
 240         uint32_t cur_size, cur_buffer_size, page_size;
 241         bool ext_addressing;
 242
 243         if (bank->target->state != TARGET_HALTED) {
 244                 LOG_ERROR("Target not halted");
 245                 return ERROR_TARGET_NOT_HALTED;
 246         }
 247
 248         page_size = bank->sectors[0].size;
 249         if ((offset % page_size) != 0) {
 250                 LOG_WARNING("offset 0x%" PRIx32 " breaks required %" PRIu32 "-byte alignment",
 251                         offset,
 252                         page_size);
 253                 return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
 254         }
 255
 256         LOG_DEBUG("offset is 0x%08" PRIx32 "", offset);
 257         LOG_DEBUG("count is %" PRIu32 "", count);
 258
 259         if (avr_jtagprg_enterprogmode(avr) != ERROR_OK)
 260                 return ERROR_FAIL;
 261
 262         if (bank->size > 0x20000)
 263                 ext_addressing = true;
 264         else
 265                 ext_addressing = false;
 266
 267         cur_size = 0;
 268         while (count > 0) {
 269                 if (count > page_size)
 270                         cur_buffer_size = page_size;
 271                 else
 272                         cur_buffer_size = count;
 273                 avr_jtagprg_writeflashpage(avr,
 274                         ext_addressing,
 275                         buffer + cur_size,
 276                         cur_buffer_size,
 277                         offset + cur_size,
 278                         page_size);
 279                 count -= cur_buffer_size;
 280                 cur_size += cur_buffer_size;
 281
 282                 keep_alive();
 283         }
 284
 285         return avr_jtagprg_leaveprogmode(avr);
 286 }
 287
 288 #define EXTRACT_MFG(X)  (((X) & 0xffe) >> 1)
 289 #define EXTRACT_PART(X) (((X) & 0xffff000) >> 12)
 290 #define EXTRACT_VER(X)  (((X) & 0xf0000000) >> 28)
 291
 292 static int avrf_probe(struct flash_bank *bank)
 293 {
 294         struct target *target = bank->target;
 295         struct avrf_flash_bank *avrf_info = bank->driver_priv;
 296         struct avr_common *avr = target->arch_info;
 297         const struct avrf_type *avr_info = NULL;
 298         uint32_t device_id;
 299
 300         if (bank->target->state != TARGET_HALTED) {
 301                 LOG_ERROR("Target not halted");
 302                 return ERROR_TARGET_NOT_HALTED;
 303         }
 304
 305         avrf_info->probed = false;
 306
 307         avr_jtag_read_jtagid(avr, &device_id);
 308         if (mcu_execute_queue() != ERROR_OK)
 309                 return ERROR_FAIL;
 310
 311         LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
 312         if (EXTRACT_MFG(device_id) != 0x1F)
 313                 LOG_ERROR("0x%" PRIx32 " is invalid Manufacturer for avr, 0x%X is expected",
 314                         EXTRACT_MFG(device_id),
 315                         0x1F);
 316
 317         for (size_t i = 0; i < ARRAY_SIZE(avft_chips_info); i++) {
 318                 if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id)) {
 319                         avr_info = &avft_chips_info[i];
 320                         LOG_INFO("target device is %s", avr_info->name);
 321                         break;
 322                 }
 323         }
 324
 325         if (avr_info) {
 326                 free(bank->sectors);
 327
 328                 /* chip found */
 329                 bank->base = 0x00000000;
 330                 bank->size = (avr_info->flash_page_size * avr_info->flash_page_num);
 331                 bank->num_sectors = avr_info->flash_page_num;
 332                 bank->sectors = malloc(sizeof(struct flash_sector) * avr_info->flash_page_num);
 333
 334                 for (int i = 0; i < avr_info->flash_page_num; i++) {
 335                         bank->sectors[i].offset = i * avr_info->flash_page_size;
 336                         bank->sectors[i].size = avr_info->flash_page_size;
 337                         bank->sectors[i].is_erased = -1;
 338                         bank->sectors[i].is_protected = -1;
 339                 }
 340
 341                 avrf_info->probed = true;
 342                 return ERROR_OK;
 343         } else {
 344                 /* chip not supported */
 345                 LOG_ERROR("0x%" PRIx32 " is not support for avr", EXTRACT_PART(device_id));
 346
 347                 avrf_info->probed = true;
 348                 return ERROR_FAIL;
 349         }
 350 }
 351
 352 static int avrf_auto_probe(struct flash_bank *bank)
 353 {
 354         struct avrf_flash_bank *avrf_info = bank->driver_priv;
 355         if (avrf_info->probed)
 356                 return ERROR_OK;
 357         return avrf_probe(bank);
 358 }
 359
 360 static int avrf_info(struct flash_bank *bank, struct command_invocation *cmd)
 361 {
 362         struct target *target = bank->target;
 363         struct avr_common *avr = target->arch_info;
 364         const struct avrf_type *avr_info = NULL;
 365         uint32_t device_id;
 366
 367         if (bank->target->state != TARGET_HALTED) {
 368                 LOG_ERROR("Target not halted");
 369                 return ERROR_TARGET_NOT_HALTED;
 370         }
 371
 372         avr_jtag_read_jtagid(avr, &device_id);
 373         if (mcu_execute_queue() != ERROR_OK)
 374                 return ERROR_FAIL;
 375
 376         LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
 377         if (EXTRACT_MFG(device_id) != 0x1F)
 378                 LOG_ERROR("0x%" PRIx32 " is invalid Manufacturer for avr, 0x%X is expected",
 379                         EXTRACT_MFG(device_id),
 380                         0x1F);
 381
 382         for (size_t i = 0; i < ARRAY_SIZE(avft_chips_info); i++) {
 383                 if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id)) {
 384                         avr_info = &avft_chips_info[i];
 385                         LOG_INFO("target device is %s", avr_info->name);
 386
 387                         break;
 388                 }
 389         }
 390
 391         if (avr_info) {
 392                 /* chip found */
 393                 command_print_sameline(cmd, "%s - Rev: 0x%" PRIx32 "", avr_info->name,
 394                         EXTRACT_VER(device_id));
 395                 return ERROR_OK;
 396         } else {
 397                 /* chip not supported */
 398                 command_print_sameline(cmd, "Cannot identify target as a avr\n");
 399                 return ERROR_FLASH_OPERATION_FAILED;
 400         }
 401 }
 402
 403 static int avrf_mass_erase(struct flash_bank *bank)
 404 {
 405         struct target *target = bank->target;
 406         struct avr_common *avr = target->arch_info;
 407
 408         if (target->state != TARGET_HALTED) {
 409                 LOG_ERROR("Target not halted");
 410                 return ERROR_TARGET_NOT_HALTED;
 411         }
 412
 413         if ((avr_jtagprg_enterprogmode(avr) != ERROR_OK)
 414             || (avr_jtagprg_chiperase(avr) != ERROR_OK)
 415             || (avr_jtagprg_leaveprogmode(avr) != ERROR_OK))
 416                 return ERROR_FAIL;
 417
 418         return ERROR_OK;
 419 }
 420
 421 COMMAND_HANDLER(avrf_handle_mass_erase_command)
 422 {
 423         if (CMD_ARGC < 1)
 424                 return ERROR_COMMAND_SYNTAX_ERROR;
 425
 426         struct flash_bank *bank;
 427         int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
 428         if (retval != ERROR_OK)
 429                 return retval;
 430
 431         if (avrf_mass_erase(bank) == ERROR_OK)
 432                 command_print(CMD, "avr mass erase complete");
 433         else
 434                 command_print(CMD, "avr mass erase failed");
 435
 436         LOG_DEBUG("%s", __func__);
 437         return ERROR_OK;
 438 }
 439
 440 static const struct command_registration avrf_exec_command_handlers[] = {
 441         {
 442                 .name = "mass_erase",
 443                 .usage = "<bank>",
 444                 .handler = avrf_handle_mass_erase_command,
 445                 .mode = COMMAND_EXEC,
 446                 .help = "erase entire device",
 447         },
 448         COMMAND_REGISTRATION_DONE
 449 };
 450 static const struct command_registration avrf_command_handlers[] = {
 451         {
 452                 .name = "avrf",
 453                 .mode = COMMAND_ANY,
 454                 .help = "AVR flash command group",
 455                 .usage = "",
 456                 .chain = avrf_exec_command_handlers,
 457         },
 458         COMMAND_REGISTRATION_DONE
 459 };
 460
 461 const struct flash_driver avr_flash = {
 462         .name = "avr",
 463         .commands = avrf_command_handlers,
 464         .flash_bank_command = avrf_flash_bank_command,
 465         .erase = avrf_erase,
 466         .write = avrf_write,
 467         .read = default_flash_read,
 468         .probe = avrf_probe,
 469         .auto_probe = avrf_auto_probe,
 470         .erase_check = default_flash_blank_check,
 471         .info = avrf_info,
 472         .free_driver_priv = default_flash_free_driver_priv,
 473 };