1 /***************************************************************************
2 * Copyright (C) 2005 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
5 * Copyright (C) 2008 by Spencer Oliver *
6 * spen@spen-soft.co.uk *
8 * This program is free software; you can redistribute it and/or modify *
9 * it under the terms of the GNU General Public License as published by *
10 * the Free Software Foundation; either version 2 of the License, or *
11 * (at your option) any later version. *
13 * This program is distributed in the hope that it will be useful, *
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
16 * GNU General Public License for more details. *
18 * You should have received a copy of the GNU General Public License *
19 * along with this program; if not, write to the *
20 * Free Software Foundation, Inc., *
21 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
22 ***************************************************************************/
29 #include "binarybuffer.h"
32 static int stm32x_register_commands(struct command_context_s
*cmd_ctx
);
33 static int stm32x_flash_bank_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
, struct flash_bank_s
*bank
);
34 static int stm32x_erase(struct flash_bank_s
*bank
, int first
, int last
);
35 static int stm32x_protect(struct flash_bank_s
*bank
, int set
, int first
, int last
);
36 static int stm32x_write(struct flash_bank_s
*bank
, uint8_t *buffer
, uint32_t offset
, uint32_t count
);
37 static int stm32x_probe(struct flash_bank_s
*bank
);
38 static int stm32x_auto_probe(struct flash_bank_s
*bank
);
39 //static int stm32x_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
40 static int stm32x_protect_check(struct flash_bank_s
*bank
);
41 static int stm32x_info(struct flash_bank_s
*bank
, char *buf
, int buf_size
);
43 static int stm32x_handle_lock_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
44 static int stm32x_handle_unlock_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
45 static int stm32x_handle_options_read_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
46 static int stm32x_handle_options_write_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
47 static int stm32x_handle_mass_erase_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
48 static int stm32x_mass_erase(struct flash_bank_s
*bank
);
50 flash_driver_t stm32x_flash
=
53 .register_commands
= stm32x_register_commands
,
54 .flash_bank_command
= stm32x_flash_bank_command
,
55 .erase
= stm32x_erase
,
56 .protect
= stm32x_protect
,
57 .write
= stm32x_write
,
58 .probe
= stm32x_probe
,
59 .auto_probe
= stm32x_auto_probe
,
60 .erase_check
= default_flash_mem_blank_check
,
61 .protect_check
= stm32x_protect_check
,
65 static int stm32x_register_commands(struct command_context_s
*cmd_ctx
)
67 command_t
*stm32x_cmd
= register_command(cmd_ctx
, NULL
, "stm32x", NULL
, COMMAND_ANY
, "stm32x flash specific commands");
69 register_command(cmd_ctx
, stm32x_cmd
, "lock", stm32x_handle_lock_command
, COMMAND_EXEC
,
71 register_command(cmd_ctx
, stm32x_cmd
, "unlock", stm32x_handle_unlock_command
, COMMAND_EXEC
,
72 "unlock protected device");
73 register_command(cmd_ctx
, stm32x_cmd
, "mass_erase", stm32x_handle_mass_erase_command
, COMMAND_EXEC
,
75 register_command(cmd_ctx
, stm32x_cmd
, "options_read", stm32x_handle_options_read_command
, COMMAND_EXEC
,
76 "read device option bytes");
77 register_command(cmd_ctx
, stm32x_cmd
, "options_write", stm32x_handle_options_write_command
, COMMAND_EXEC
,
78 "write device option bytes");
82 /* flash bank stm32x <base> <size> 0 0 <target#>
84 static int stm32x_flash_bank_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
, struct flash_bank_s
*bank
)
86 stm32x_flash_bank_t
*stm32x_info
;
90 LOG_WARNING("incomplete flash_bank stm32x configuration");
91 return ERROR_FLASH_BANK_INVALID
;
94 stm32x_info
= malloc(sizeof(stm32x_flash_bank_t
));
95 bank
->driver_priv
= stm32x_info
;
97 stm32x_info
->write_algorithm
= NULL
;
98 stm32x_info
->probed
= 0;
103 static uint32_t stm32x_get_flash_status(flash_bank_t
*bank
)
105 target_t
*target
= bank
->target
;
108 target_read_u32(target
, STM32_FLASH_SR
, &status
);
113 static uint32_t stm32x_wait_status_busy(flash_bank_t
*bank
, int timeout
)
115 target_t
*target
= bank
->target
;
118 /* wait for busy to clear */
119 while (((status
= stm32x_get_flash_status(bank
)) & FLASH_BSY
) && (timeout
-- > 0))
121 LOG_DEBUG("status: 0x%" PRIx32
"", status
);
124 /* Clear but report errors */
125 if (status
& (FLASH_WRPRTERR
| FLASH_PGERR
))
127 target_write_u32(target
, STM32_FLASH_SR
, FLASH_WRPRTERR
| FLASH_PGERR
);
132 static int stm32x_read_options(struct flash_bank_s
*bank
)
135 stm32x_flash_bank_t
*stm32x_info
= NULL
;
136 target_t
*target
= bank
->target
;
138 stm32x_info
= bank
->driver_priv
;
140 /* read current option bytes */
141 target_read_u32(target
, STM32_FLASH_OBR
, &optiondata
);
143 stm32x_info
->option_bytes
.user_options
= (uint16_t)0xFFF8 | ((optiondata
>> 2) & 0x07);
144 stm32x_info
->option_bytes
.RDP
= (optiondata
& (1 << OPT_READOUT
)) ? 0xFFFF : 0x5AA5;
146 if (optiondata
& (1 << OPT_READOUT
))
147 LOG_INFO("Device Security Bit Set");
149 /* each bit refers to a 4bank protection */
150 target_read_u32(target
, STM32_FLASH_WRPR
, &optiondata
);
152 stm32x_info
->option_bytes
.protection
[0] = (uint16_t)optiondata
;
153 stm32x_info
->option_bytes
.protection
[1] = (uint16_t)(optiondata
>> 8);
154 stm32x_info
->option_bytes
.protection
[2] = (uint16_t)(optiondata
>> 16);
155 stm32x_info
->option_bytes
.protection
[3] = (uint16_t)(optiondata
>> 24);
160 static int stm32x_erase_options(struct flash_bank_s
*bank
)
162 stm32x_flash_bank_t
*stm32x_info
= NULL
;
163 target_t
*target
= bank
->target
;
166 stm32x_info
= bank
->driver_priv
;
168 /* read current options */
169 stm32x_read_options(bank
);
171 /* unlock flash registers */
172 target_write_u32(target
, STM32_FLASH_KEYR
, KEY1
);
173 target_write_u32(target
, STM32_FLASH_KEYR
, KEY2
);
175 /* unlock option flash registers */
176 target_write_u32(target
, STM32_FLASH_OPTKEYR
, KEY1
);
177 target_write_u32(target
, STM32_FLASH_OPTKEYR
, KEY2
);
179 /* erase option bytes */
180 target_write_u32(target
, STM32_FLASH_CR
, FLASH_OPTER
| FLASH_OPTWRE
);
181 target_write_u32(target
, STM32_FLASH_CR
, FLASH_OPTER
| FLASH_STRT
| FLASH_OPTWRE
);
183 status
= stm32x_wait_status_busy(bank
, 10);
185 if (status
& FLASH_WRPRTERR
)
186 return ERROR_FLASH_OPERATION_FAILED
;
187 if (status
& FLASH_PGERR
)
188 return ERROR_FLASH_OPERATION_FAILED
;
190 /* clear readout protection and complementary option bytes
191 * this will also force a device unlock if set */
192 stm32x_info
->option_bytes
.RDP
= 0x5AA5;
197 static int stm32x_write_options(struct flash_bank_s
*bank
)
199 stm32x_flash_bank_t
*stm32x_info
= NULL
;
200 target_t
*target
= bank
->target
;
203 stm32x_info
= bank
->driver_priv
;
205 /* unlock flash registers */
206 target_write_u32(target
, STM32_FLASH_KEYR
, KEY1
);
207 target_write_u32(target
, STM32_FLASH_KEYR
, KEY2
);
209 /* unlock option flash registers */
210 target_write_u32(target
, STM32_FLASH_OPTKEYR
, KEY1
);
211 target_write_u32(target
, STM32_FLASH_OPTKEYR
, KEY2
);
213 /* program option bytes */
214 target_write_u32(target
, STM32_FLASH_CR
, FLASH_OPTPG
| FLASH_OPTWRE
);
216 /* write user option byte */
217 target_write_u16(target
, STM32_OB_USER
, stm32x_info
->option_bytes
.user_options
);
219 status
= stm32x_wait_status_busy(bank
, 10);
221 if (status
& FLASH_WRPRTERR
)
222 return ERROR_FLASH_OPERATION_FAILED
;
223 if (status
& FLASH_PGERR
)
224 return ERROR_FLASH_OPERATION_FAILED
;
226 /* write protection byte 1 */
227 target_write_u16(target
, STM32_OB_WRP0
, stm32x_info
->option_bytes
.protection
[0]);
229 status
= stm32x_wait_status_busy(bank
, 10);
231 if (status
& FLASH_WRPRTERR
)
232 return ERROR_FLASH_OPERATION_FAILED
;
233 if (status
& FLASH_PGERR
)
234 return ERROR_FLASH_OPERATION_FAILED
;
236 /* write protection byte 2 */
237 target_write_u16(target
, STM32_OB_WRP1
, stm32x_info
->option_bytes
.protection
[1]);
239 status
= stm32x_wait_status_busy(bank
, 10);
241 if (status
& FLASH_WRPRTERR
)
242 return ERROR_FLASH_OPERATION_FAILED
;
243 if (status
& FLASH_PGERR
)
244 return ERROR_FLASH_OPERATION_FAILED
;
246 /* write protection byte 3 */
247 target_write_u16(target
, STM32_OB_WRP2
, stm32x_info
->option_bytes
.protection
[2]);
249 status
= stm32x_wait_status_busy(bank
, 10);
251 if (status
& FLASH_WRPRTERR
)
252 return ERROR_FLASH_OPERATION_FAILED
;
253 if (status
& FLASH_PGERR
)
254 return ERROR_FLASH_OPERATION_FAILED
;
256 /* write protection byte 4 */
257 target_write_u16(target
, STM32_OB_WRP3
, stm32x_info
->option_bytes
.protection
[3]);
259 status
= stm32x_wait_status_busy(bank
, 10);
261 if (status
& FLASH_WRPRTERR
)
262 return ERROR_FLASH_OPERATION_FAILED
;
263 if (status
& FLASH_PGERR
)
264 return ERROR_FLASH_OPERATION_FAILED
;
266 /* write readout protection bit */
267 target_write_u16(target
, STM32_OB_RDP
, stm32x_info
->option_bytes
.RDP
);
269 status
= stm32x_wait_status_busy(bank
, 10);
271 if (status
& FLASH_WRPRTERR
)
272 return ERROR_FLASH_OPERATION_FAILED
;
273 if (status
& FLASH_PGERR
)
274 return ERROR_FLASH_OPERATION_FAILED
;
276 target_write_u32(target
, STM32_FLASH_CR
, FLASH_LOCK
);
281 static int stm32x_protect_check(struct flash_bank_s
*bank
)
283 target_t
*target
= bank
->target
;
284 stm32x_flash_bank_t
*stm32x_info
= bank
->driver_priv
;
291 if (target
->state
!= TARGET_HALTED
)
293 LOG_ERROR("Target not halted");
294 return ERROR_TARGET_NOT_HALTED
;
297 /* medium density - each bit refers to a 4bank protection
298 * high density - each bit refers to a 2bank protection */
299 target_read_u32(target
, STM32_FLASH_WRPR
, &protection
);
301 /* medium density - each protection bit is for 4 * 1K pages
302 * high density - each protection bit is for 2 * 2K pages */
303 num_bits
= (bank
->num_sectors
/ stm32x_info
->ppage_size
);
305 if (stm32x_info
->ppage_size
== 2)
307 /* high density flash/connectivity line protection */
311 if (protection
& (1 << 31))
314 /* bit 31 controls sector 62 - 255 protection for high density
315 * bit 31 controls sector 62 - 127 protection for connectivity line */
316 for (s
= 62; s
< bank
->num_sectors
; s
++)
318 bank
->sectors
[s
].is_protected
= set
;
321 if (bank
->num_sectors
> 61)
324 for (i
= 0; i
< num_bits
; i
++)
328 if (protection
& (1 << i
))
331 for (s
= 0; s
< stm32x_info
->ppage_size
; s
++)
332 bank
->sectors
[(i
* stm32x_info
->ppage_size
) + s
].is_protected
= set
;
337 /* low/medium density flash protection */
338 for (i
= 0; i
< num_bits
; i
++)
342 if (protection
& (1 << i
))
345 for (s
= 0; s
< stm32x_info
->ppage_size
; s
++)
346 bank
->sectors
[(i
* stm32x_info
->ppage_size
) + s
].is_protected
= set
;
353 static int stm32x_erase(struct flash_bank_s
*bank
, int first
, int last
)
355 target_t
*target
= bank
->target
;
359 if (bank
->target
->state
!= TARGET_HALTED
)
361 LOG_ERROR("Target not halted");
362 return ERROR_TARGET_NOT_HALTED
;
365 if ((first
== 0) && (last
== (bank
->num_sectors
- 1)))
367 return stm32x_mass_erase(bank
);
370 /* unlock flash registers */
371 target_write_u32(target
, STM32_FLASH_KEYR
, KEY1
);
372 target_write_u32(target
, STM32_FLASH_KEYR
, KEY2
);
374 for (i
= first
; i
<= last
; i
++)
376 target_write_u32(target
, STM32_FLASH_CR
, FLASH_PER
);
377 target_write_u32(target
, STM32_FLASH_AR
, bank
->base
+ bank
->sectors
[i
].offset
);
378 target_write_u32(target
, STM32_FLASH_CR
, FLASH_PER
| FLASH_STRT
);
380 status
= stm32x_wait_status_busy(bank
, 10);
382 if (status
& FLASH_WRPRTERR
)
383 return ERROR_FLASH_OPERATION_FAILED
;
384 if (status
& FLASH_PGERR
)
385 return ERROR_FLASH_OPERATION_FAILED
;
386 bank
->sectors
[i
].is_erased
= 1;
389 target_write_u32(target
, STM32_FLASH_CR
, FLASH_LOCK
);
394 static int stm32x_protect(struct flash_bank_s
*bank
, int set
, int first
, int last
)
396 stm32x_flash_bank_t
*stm32x_info
= NULL
;
397 target_t
*target
= bank
->target
;
398 uint16_t prot_reg
[4] = {0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF};
403 stm32x_info
= bank
->driver_priv
;
405 if (target
->state
!= TARGET_HALTED
)
407 LOG_ERROR("Target not halted");
408 return ERROR_TARGET_NOT_HALTED
;
411 if ((first
&& (first
% stm32x_info
->ppage_size
)) || ((last
+ 1) && (last
+ 1) % stm32x_info
->ppage_size
))
413 LOG_WARNING("Error: start and end sectors must be on a %d sector boundary", stm32x_info
->ppage_size
);
414 return ERROR_FLASH_SECTOR_INVALID
;
417 /* medium density - each bit refers to a 4bank protection
418 * high density - each bit refers to a 2bank protection */
419 target_read_u32(target
, STM32_FLASH_WRPR
, &protection
);
421 prot_reg
[0] = (uint16_t)protection
;
422 prot_reg
[1] = (uint16_t)(protection
>> 8);
423 prot_reg
[2] = (uint16_t)(protection
>> 16);
424 prot_reg
[3] = (uint16_t)(protection
>> 24);
426 if (stm32x_info
->ppage_size
== 2)
428 /* high density flash */
430 /* bit 7 controls sector 62 - 255 protection */
434 prot_reg
[3] &= ~(1 << 7);
436 prot_reg
[3] |= (1 << 7);
444 for (i
= first
; i
<= last
; i
++)
446 reg
= (i
/ stm32x_info
->ppage_size
) / 8;
447 bit
= (i
/ stm32x_info
->ppage_size
) - (reg
* 8);
450 prot_reg
[reg
] &= ~(1 << bit
);
452 prot_reg
[reg
] |= (1 << bit
);
457 /* medium density flash */
458 for (i
= first
; i
<= last
; i
++)
460 reg
= (i
/ stm32x_info
->ppage_size
) / 8;
461 bit
= (i
/ stm32x_info
->ppage_size
) - (reg
* 8);
464 prot_reg
[reg
] &= ~(1 << bit
);
466 prot_reg
[reg
] |= (1 << bit
);
470 if ((status
= stm32x_erase_options(bank
)) != ERROR_OK
)
473 stm32x_info
->option_bytes
.protection
[0] = prot_reg
[0];
474 stm32x_info
->option_bytes
.protection
[1] = prot_reg
[1];
475 stm32x_info
->option_bytes
.protection
[2] = prot_reg
[2];
476 stm32x_info
->option_bytes
.protection
[3] = prot_reg
[3];
478 return stm32x_write_options(bank
);
481 static int stm32x_write_block(struct flash_bank_s
*bank
, uint8_t *buffer
, uint32_t offset
, uint32_t count
)
483 stm32x_flash_bank_t
*stm32x_info
= bank
->driver_priv
;
484 target_t
*target
= bank
->target
;
485 uint32_t buffer_size
= 16384;
486 working_area_t
*source
;
487 uint32_t address
= bank
->base
+ offset
;
488 reg_param_t reg_params
[4];
489 armv7m_algorithm_t armv7m_info
;
490 int retval
= ERROR_OK
;
492 uint8_t stm32x_flash_write_code
[] = {
494 0xDF, 0xF8, 0x24, 0x40, /* ldr r4, STM32_FLASH_CR */
495 0x09, 0x4D, /* ldr r5, STM32_FLASH_SR */
496 0x4F, 0xF0, 0x01, 0x03, /* mov r3, #1 */
497 0x23, 0x60, /* str r3, [r4, #0] */
498 0x30, 0xF8, 0x02, 0x3B, /* ldrh r3, [r0], #2 */
499 0x21, 0xF8, 0x02, 0x3B, /* strh r3, [r1], #2 */
501 0x2B, 0x68, /* ldr r3, [r5, #0] */
502 0x13, 0xF0, 0x01, 0x0F, /* tst r3, #0x01 */
503 0xFB, 0xD0, /* beq busy */
504 0x13, 0xF0, 0x14, 0x0F, /* tst r3, #0x14 */
505 0x01, 0xD1, /* bne exit */
506 0x01, 0x3A, /* subs r2, r2, #1 */
507 0xED, 0xD1, /* bne write */
509 0xFE, 0xE7, /* b exit */
510 0x10, 0x20, 0x02, 0x40, /* STM32_FLASH_CR: .word 0x40022010 */
511 0x0C, 0x20, 0x02, 0x40 /* STM32_FLASH_SR: .word 0x4002200C */
514 /* flash write code */
515 if (target_alloc_working_area(target
, sizeof(stm32x_flash_write_code
), &stm32x_info
->write_algorithm
) != ERROR_OK
)
517 LOG_WARNING("no working area available, can't do block memory writes");
518 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE
;
521 if ((retval
= target_write_buffer(target
, stm32x_info
->write_algorithm
->address
, sizeof(stm32x_flash_write_code
), stm32x_flash_write_code
)) != ERROR_OK
)
525 while (target_alloc_working_area(target
, buffer_size
, &source
) != ERROR_OK
)
528 if (buffer_size
<= 256)
530 /* if we already allocated the writing code, but failed to get a buffer, free the algorithm */
531 if (stm32x_info
->write_algorithm
)
532 target_free_working_area(target
, stm32x_info
->write_algorithm
);
534 LOG_WARNING("no large enough working area available, can't do block memory writes");
535 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE
;
539 armv7m_info
.common_magic
= ARMV7M_COMMON_MAGIC
;
540 armv7m_info
.core_mode
= ARMV7M_MODE_ANY
;
542 init_reg_param(®_params
[0], "r0", 32, PARAM_OUT
);
543 init_reg_param(®_params
[1], "r1", 32, PARAM_OUT
);
544 init_reg_param(®_params
[2], "r2", 32, PARAM_OUT
);
545 init_reg_param(®_params
[3], "r3", 32, PARAM_IN
);
549 uint32_t thisrun_count
= (count
> (buffer_size
/ 2)) ? (buffer_size
/ 2) : count
;
551 if ((retval
= target_write_buffer(target
, source
->address
, thisrun_count
* 2, buffer
)) != ERROR_OK
)
554 buf_set_u32(reg_params
[0].value
, 0, 32, source
->address
);
555 buf_set_u32(reg_params
[1].value
, 0, 32, address
);
556 buf_set_u32(reg_params
[2].value
, 0, 32, thisrun_count
);
558 if ((retval
= target_run_algorithm(target
, 0, NULL
, 4, reg_params
, stm32x_info
->write_algorithm
->address
, \
559 stm32x_info
->write_algorithm
->address
+ (sizeof(stm32x_flash_write_code
) - 10), 10000, &armv7m_info
)) != ERROR_OK
)
561 LOG_ERROR("error executing stm32x flash write algorithm");
562 retval
= ERROR_FLASH_OPERATION_FAILED
;
566 if (buf_get_u32(reg_params
[3].value
, 0, 32) & FLASH_PGERR
)
568 LOG_ERROR("flash memory not erased before writing");
569 /* Clear but report errors */
570 target_write_u32(target
, STM32_FLASH_SR
, FLASH_PGERR
);
571 retval
= ERROR_FLASH_OPERATION_FAILED
;
575 if (buf_get_u32(reg_params
[3].value
, 0, 32) & FLASH_WRPRTERR
)
577 LOG_ERROR("flash memory write protected");
578 /* Clear but report errors */
579 target_write_u32(target
, STM32_FLASH_SR
, FLASH_WRPRTERR
);
580 retval
= ERROR_FLASH_OPERATION_FAILED
;
584 buffer
+= thisrun_count
* 2;
585 address
+= thisrun_count
* 2;
586 count
-= thisrun_count
;
589 target_free_working_area(target
, source
);
590 target_free_working_area(target
, stm32x_info
->write_algorithm
);
592 destroy_reg_param(®_params
[0]);
593 destroy_reg_param(®_params
[1]);
594 destroy_reg_param(®_params
[2]);
595 destroy_reg_param(®_params
[3]);
600 static int stm32x_write(struct flash_bank_s
*bank
, uint8_t *buffer
, uint32_t offset
, uint32_t count
)
602 target_t
*target
= bank
->target
;
603 uint32_t words_remaining
= (count
/ 2);
604 uint32_t bytes_remaining
= (count
& 0x00000001);
605 uint32_t address
= bank
->base
+ offset
;
606 uint32_t bytes_written
= 0;
610 if (bank
->target
->state
!= TARGET_HALTED
)
612 LOG_ERROR("Target not halted");
613 return ERROR_TARGET_NOT_HALTED
;
618 LOG_WARNING("offset 0x%" PRIx32
" breaks required 2-byte alignment", offset
);
619 return ERROR_FLASH_DST_BREAKS_ALIGNMENT
;
622 /* unlock flash registers */
623 target_write_u32(target
, STM32_FLASH_KEYR
, KEY1
);
624 target_write_u32(target
, STM32_FLASH_KEYR
, KEY2
);
626 /* multiple half words (2-byte) to be programmed? */
627 if (words_remaining
> 0)
629 /* try using a block write */
630 if ((retval
= stm32x_write_block(bank
, buffer
, offset
, words_remaining
)) != ERROR_OK
)
632 if (retval
== ERROR_TARGET_RESOURCE_NOT_AVAILABLE
)
634 /* if block write failed (no sufficient working area),
635 * we use normal (slow) single dword accesses */
636 LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
638 else if (retval
== ERROR_FLASH_OPERATION_FAILED
)
640 LOG_ERROR("flash writing failed with error code: 0x%x", retval
);
641 return ERROR_FLASH_OPERATION_FAILED
;
646 buffer
+= words_remaining
* 2;
647 address
+= words_remaining
* 2;
652 while (words_remaining
> 0)
655 memcpy(&value
, buffer
+ bytes_written
, sizeof(uint16_t));
657 target_write_u32(target
, STM32_FLASH_CR
, FLASH_PG
);
658 target_write_u16(target
, address
, value
);
660 status
= stm32x_wait_status_busy(bank
, 5);
662 if (status
& FLASH_WRPRTERR
)
664 LOG_ERROR("flash memory not erased before writing");
665 return ERROR_FLASH_OPERATION_FAILED
;
667 if (status
& FLASH_PGERR
)
669 LOG_ERROR("flash memory write protected");
670 return ERROR_FLASH_OPERATION_FAILED
;
680 uint16_t value
= 0xffff;
681 memcpy(&value
, buffer
+ bytes_written
, bytes_remaining
);
683 target_write_u32(target
, STM32_FLASH_CR
, FLASH_PG
);
684 target_write_u16(target
, address
, value
);
686 status
= stm32x_wait_status_busy(bank
, 5);
688 if (status
& FLASH_WRPRTERR
)
690 LOG_ERROR("flash memory not erased before writing");
691 return ERROR_FLASH_OPERATION_FAILED
;
693 if (status
& FLASH_PGERR
)
695 LOG_ERROR("flash memory write protected");
696 return ERROR_FLASH_OPERATION_FAILED
;
700 target_write_u32(target
, STM32_FLASH_CR
, FLASH_LOCK
);
705 static int stm32x_probe(struct flash_bank_s
*bank
)
707 target_t
*target
= bank
->target
;
708 stm32x_flash_bank_t
*stm32x_info
= bank
->driver_priv
;
714 if (bank
->target
->state
!= TARGET_HALTED
)
716 LOG_ERROR("Target not halted");
717 return ERROR_TARGET_NOT_HALTED
;
720 stm32x_info
->probed
= 0;
722 /* read stm32 device id register */
723 target_read_u32(target
, 0xE0042000, &device_id
);
724 LOG_INFO("device id = 0x%08" PRIx32
"", device_id
);
726 /* get flash size from target */
727 if (target_read_u16(target
, 0x1FFFF7E0, &num_pages
) != ERROR_OK
)
729 /* failed reading flash size, default to max target family */
733 if ((device_id
& 0x7ff) == 0x410)
735 /* medium density - we have 1k pages
736 * 4 pages for a protection area */
738 stm32x_info
->ppage_size
= 4;
740 /* check for early silicon */
741 if (num_pages
== 0xffff)
743 /* number of sectors incorrect on revA */
744 LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming 128k flash");
748 else if ((device_id
& 0x7ff) == 0x412)
750 /* low density - we have 1k pages
751 * 4 pages for a protection area */
753 stm32x_info
->ppage_size
= 4;
755 /* check for early silicon */
756 if (num_pages
== 0xffff)
758 /* number of sectors incorrect on revA */
759 LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming 32k flash");
763 else if ((device_id
& 0x7ff) == 0x414)
765 /* high density - we have 2k pages
766 * 2 pages for a protection area */
768 stm32x_info
->ppage_size
= 2;
770 /* check for early silicon */
771 if (num_pages
== 0xffff)
773 /* number of sectors incorrect on revZ */
774 LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming 512k flash");
778 else if ((device_id
& 0x7ff) == 0x418)
780 /* connectivity line density - we have 2k pages
781 * 2 pages for a protection area */
783 stm32x_info
->ppage_size
= 2;
785 /* check for early silicon */
786 if (num_pages
== 0xffff)
788 /* number of sectors incorrect on revZ */
789 LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming 256k flash");
795 LOG_WARNING("Cannot identify target as a STM32 family.");
796 return ERROR_FLASH_OPERATION_FAILED
;
799 LOG_INFO("flash size = %dkbytes", num_pages
);
801 /* calculate numbers of pages */
802 num_pages
/= (page_size
/ 1024);
804 bank
->base
= 0x08000000;
805 bank
->size
= (num_pages
* page_size
);
806 bank
->num_sectors
= num_pages
;
807 bank
->sectors
= malloc(sizeof(flash_sector_t
) * num_pages
);
809 for (i
= 0; i
< num_pages
; i
++)
811 bank
->sectors
[i
].offset
= i
* page_size
;
812 bank
->sectors
[i
].size
= page_size
;
813 bank
->sectors
[i
].is_erased
= -1;
814 bank
->sectors
[i
].is_protected
= 1;
817 stm32x_info
->probed
= 1;
822 static int stm32x_auto_probe(struct flash_bank_s
*bank
)
824 stm32x_flash_bank_t
*stm32x_info
= bank
->driver_priv
;
825 if (stm32x_info
->probed
)
827 return stm32x_probe(bank
);
831 static int stm32x_handle_part_id_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
837 static int stm32x_info(struct flash_bank_s
*bank
, char *buf
, int buf_size
)
839 target_t
*target
= bank
->target
;
843 /* read stm32 device id register */
844 target_read_u32(target
, 0xE0042000, &device_id
);
846 if ((device_id
& 0x7ff) == 0x410)
848 printed
= snprintf(buf
, buf_size
, "stm32x (Medium Density) - Rev: ");
852 switch (device_id
>> 16)
855 snprintf(buf
, buf_size
, "A");
859 snprintf(buf
, buf_size
, "B");
863 snprintf(buf
, buf_size
, "Z");
867 snprintf(buf
, buf_size
, "Y");
871 snprintf(buf
, buf_size
, "unknown");
875 else if ((device_id
& 0x7ff) == 0x412)
877 printed
= snprintf(buf
, buf_size
, "stm32x (Low Density) - Rev: ");
881 switch (device_id
>> 16)
884 snprintf(buf
, buf_size
, "A");
888 snprintf(buf
, buf_size
, "unknown");
892 else if ((device_id
& 0x7ff) == 0x414)
894 printed
= snprintf(buf
, buf_size
, "stm32x (High Density) - Rev: ");
898 switch (device_id
>> 16)
901 snprintf(buf
, buf_size
, "A");
905 snprintf(buf
, buf_size
, "Z");
909 snprintf(buf
, buf_size
, "unknown");
913 else if ((device_id
& 0x7ff) == 0x418)
915 printed
= snprintf(buf
, buf_size
, "stm32x (Connectivity) - Rev: ");
919 switch (device_id
>> 16)
922 snprintf(buf
, buf_size
, "A");
926 snprintf(buf
, buf_size
, "Z");
930 snprintf(buf
, buf_size
, "unknown");
936 snprintf(buf
, buf_size
, "Cannot identify target as a stm32x\n");
937 return ERROR_FLASH_OPERATION_FAILED
;
943 static int stm32x_handle_lock_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
946 target_t
*target
= NULL
;
947 stm32x_flash_bank_t
*stm32x_info
= NULL
;
951 command_print(cmd_ctx
, "stm32x lock <bank>");
955 bank
= get_flash_bank_by_num(strtoul(args
[0], NULL
, 0));
958 command_print(cmd_ctx
, "flash bank '#%s' is out of bounds", args
[0]);
962 stm32x_info
= bank
->driver_priv
;
964 target
= bank
->target
;
966 if (target
->state
!= TARGET_HALTED
)
968 LOG_ERROR("Target not halted");
969 return ERROR_TARGET_NOT_HALTED
;
972 if (stm32x_erase_options(bank
) != ERROR_OK
)
974 command_print(cmd_ctx
, "stm32x failed to erase options");
978 /* set readout protection */
979 stm32x_info
->option_bytes
.RDP
= 0;
981 if (stm32x_write_options(bank
) != ERROR_OK
)
983 command_print(cmd_ctx
, "stm32x failed to lock device");
987 command_print(cmd_ctx
, "stm32x locked");
992 static int stm32x_handle_unlock_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
995 target_t
*target
= NULL
;
996 stm32x_flash_bank_t
*stm32x_info
= NULL
;
1000 command_print(cmd_ctx
, "stm32x unlock <bank>");
1004 bank
= get_flash_bank_by_num(strtoul(args
[0], NULL
, 0));
1007 command_print(cmd_ctx
, "flash bank '#%s' is out of bounds", args
[0]);
1011 stm32x_info
= bank
->driver_priv
;
1013 target
= bank
->target
;
1015 if (target
->state
!= TARGET_HALTED
)
1017 LOG_ERROR("Target not halted");
1018 return ERROR_TARGET_NOT_HALTED
;
1021 if (stm32x_erase_options(bank
) != ERROR_OK
)
1023 command_print(cmd_ctx
, "stm32x failed to unlock device");
1027 if (stm32x_write_options(bank
) != ERROR_OK
)
1029 command_print(cmd_ctx
, "stm32x failed to lock device");
1033 command_print(cmd_ctx
, "stm32x unlocked");
1038 static int stm32x_handle_options_read_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1041 uint32_t optionbyte
;
1042 target_t
*target
= NULL
;
1043 stm32x_flash_bank_t
*stm32x_info
= NULL
;
1047 command_print(cmd_ctx
, "stm32x options_read <bank>");
1051 bank
= get_flash_bank_by_num(strtoul(args
[0], NULL
, 0));
1054 command_print(cmd_ctx
, "flash bank '#%s' is out of bounds", args
[0]);
1058 stm32x_info
= bank
->driver_priv
;
1060 target
= bank
->target
;
1062 if (target
->state
!= TARGET_HALTED
)
1064 LOG_ERROR("Target not halted");
1065 return ERROR_TARGET_NOT_HALTED
;
1068 target_read_u32(target
, STM32_FLASH_OBR
, &optionbyte
);
1069 command_print(cmd_ctx
, "Option Byte: 0x%" PRIx32
"", optionbyte
);
1071 if (buf_get_u32((uint8_t*)&optionbyte
, OPT_ERROR
, 1))
1072 command_print(cmd_ctx
, "Option Byte Complement Error");
1074 if (buf_get_u32((uint8_t*)&optionbyte
, OPT_READOUT
, 1))
1075 command_print(cmd_ctx
, "Readout Protection On");
1077 command_print(cmd_ctx
, "Readout Protection Off");
1079 if (buf_get_u32((uint8_t*)&optionbyte
, OPT_RDWDGSW
, 1))
1080 command_print(cmd_ctx
, "Software Watchdog");
1082 command_print(cmd_ctx
, "Hardware Watchdog");
1084 if (buf_get_u32((uint8_t*)&optionbyte
, OPT_RDRSTSTOP
, 1))
1085 command_print(cmd_ctx
, "Stop: No reset generated");
1087 command_print(cmd_ctx
, "Stop: Reset generated");
1089 if (buf_get_u32((uint8_t*)&optionbyte
, OPT_RDRSTSTDBY
, 1))
1090 command_print(cmd_ctx
, "Standby: No reset generated");
1092 command_print(cmd_ctx
, "Standby: Reset generated");
1097 static int stm32x_handle_options_write_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1100 target_t
*target
= NULL
;
1101 stm32x_flash_bank_t
*stm32x_info
= NULL
;
1102 uint16_t optionbyte
= 0xF8;
1106 command_print(cmd_ctx
, "stm32x options_write <bank> <SWWDG | HWWDG> <RSTSTNDBY | NORSTSTNDBY> <RSTSTOP | NORSTSTOP>");
1110 bank
= get_flash_bank_by_num(strtoul(args
[0], NULL
, 0));
1113 command_print(cmd_ctx
, "flash bank '#%s' is out of bounds", args
[0]);
1117 stm32x_info
= bank
->driver_priv
;
1119 target
= bank
->target
;
1121 if (target
->state
!= TARGET_HALTED
)
1123 LOG_ERROR("Target not halted");
1124 return ERROR_TARGET_NOT_HALTED
;
1127 if (strcmp(args
[1], "SWWDG") == 0)
1129 optionbyte
|= (1 << 0);
1133 optionbyte
&= ~(1 << 0);
1136 if (strcmp(args
[2], "NORSTSTNDBY") == 0)
1138 optionbyte
|= (1 << 1);
1142 optionbyte
&= ~(1 << 1);
1145 if (strcmp(args
[3], "NORSTSTOP") == 0)
1147 optionbyte
|= (1 << 2);
1151 optionbyte
&= ~(1 << 2);
1154 if (stm32x_erase_options(bank
) != ERROR_OK
)
1156 command_print(cmd_ctx
, "stm32x failed to erase options");
1160 stm32x_info
->option_bytes
.user_options
= optionbyte
;
1162 if (stm32x_write_options(bank
) != ERROR_OK
)
1164 command_print(cmd_ctx
, "stm32x failed to write options");
1168 command_print(cmd_ctx
, "stm32x write options complete");
1173 static int stm32x_mass_erase(struct flash_bank_s
*bank
)
1175 target_t
*target
= bank
->target
;
1178 if (target
->state
!= TARGET_HALTED
)
1180 LOG_ERROR("Target not halted");
1181 return ERROR_TARGET_NOT_HALTED
;
1184 /* unlock option flash registers */
1185 target_write_u32(target
, STM32_FLASH_KEYR
, KEY1
);
1186 target_write_u32(target
, STM32_FLASH_KEYR
, KEY2
);
1188 /* mass erase flash memory */
1189 target_write_u32(target
, STM32_FLASH_CR
, FLASH_MER
);
1190 target_write_u32(target
, STM32_FLASH_CR
, FLASH_MER
| FLASH_STRT
);
1192 status
= stm32x_wait_status_busy(bank
, 10);
1194 target_write_u32(target
, STM32_FLASH_CR
, FLASH_LOCK
);
1196 if (status
& FLASH_WRPRTERR
)
1198 LOG_ERROR("stm32x device protected");
1202 if (status
& FLASH_PGERR
)
1204 LOG_ERROR("stm32x device programming failed");
1211 static int stm32x_handle_mass_erase_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1218 command_print(cmd_ctx
, "stm32x mass_erase <bank>");
1222 bank
= get_flash_bank_by_num(strtoul(args
[0], NULL
, 0));
1225 command_print(cmd_ctx
, "flash bank '#%s' is out of bounds", args
[0]);
1229 if (stm32x_mass_erase(bank
) == ERROR_OK
)
1231 /* set all sectors as erased */
1232 for (i
= 0; i
< bank
->num_sectors
; i
++)
1234 bank
->sectors
[i
].is_erased
= 1;
1237 command_print(cmd_ctx
, "stm32x mass erase complete");
1241 command_print(cmd_ctx
, "stm32x mass erase failed");
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