1 /***************************************************************************
2 * Copyright (C) 2005 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
24 #include "replacements.h"
31 #include "algorithm.h"
32 #include "binarybuffer.h"
37 int stm32x_register_commands(struct command_context_s
*cmd_ctx
);
38 int stm32x_flash_bank_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
, struct flash_bank_s
*bank
);
39 int stm32x_erase(struct flash_bank_s
*bank
, int first
, int last
);
40 int stm32x_protect(struct flash_bank_s
*bank
, int set
, int first
, int last
);
41 int stm32x_write(struct flash_bank_s
*bank
, u8
*buffer
, u32 offset
, u32 count
);
42 int stm32x_probe(struct flash_bank_s
*bank
);
43 int stm32x_auto_probe(struct flash_bank_s
*bank
);
44 int stm32x_handle_part_id_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
45 int stm32x_protect_check(struct flash_bank_s
*bank
);
46 int stm32x_erase_check(struct flash_bank_s
*bank
);
47 int stm32x_info(struct flash_bank_s
*bank
, char *buf
, int buf_size
);
49 int stm32x_handle_lock_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
50 int stm32x_handle_unlock_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
51 int stm32x_handle_options_read_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
52 int stm32x_handle_options_write_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
53 int stm32x_handle_mass_erase_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
55 flash_driver_t stm32x_flash
=
58 .register_commands
= stm32x_register_commands
,
59 .flash_bank_command
= stm32x_flash_bank_command
,
60 .erase
= stm32x_erase
,
61 .protect
= stm32x_protect
,
62 .write
= stm32x_write
,
63 .probe
= stm32x_probe
,
64 .auto_probe
= stm32x_auto_probe
,
65 .erase_check
= stm32x_erase_check
,
66 .protect_check
= stm32x_protect_check
,
70 int stm32x_register_commands(struct command_context_s
*cmd_ctx
)
72 command_t
*stm32x_cmd
= register_command(cmd_ctx
, NULL
, "stm32x", NULL
, COMMAND_ANY
, "stm32x flash specific commands");
74 register_command(cmd_ctx
, stm32x_cmd
, "lock", stm32x_handle_lock_command
, COMMAND_EXEC
,
76 register_command(cmd_ctx
, stm32x_cmd
, "unlock", stm32x_handle_unlock_command
, COMMAND_EXEC
,
77 "unlock protected device");
78 register_command(cmd_ctx
, stm32x_cmd
, "mass_erase", stm32x_handle_mass_erase_command
, COMMAND_EXEC
,
80 register_command(cmd_ctx
, stm32x_cmd
, "options_read", stm32x_handle_options_read_command
, COMMAND_EXEC
,
81 "read device option bytes");
82 register_command(cmd_ctx
, stm32x_cmd
, "options_write", stm32x_handle_options_write_command
, COMMAND_EXEC
,
83 "write device option bytes");
87 /* flash bank stm32x <base> <size> 0 0 <target#>
89 int stm32x_flash_bank_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
, struct flash_bank_s
*bank
)
91 stm32x_flash_bank_t
*stm32x_info
;
95 WARNING("incomplete flash_bank stm32x configuration");
96 return ERROR_FLASH_BANK_INVALID
;
99 stm32x_info
= malloc(sizeof(stm32x_flash_bank_t
));
100 bank
->driver_priv
= stm32x_info
;
102 stm32x_info
->write_algorithm
= NULL
;
103 stm32x_info
->probed
= 0;
108 u32
stm32x_get_flash_status(flash_bank_t
*bank
)
110 target_t
*target
= bank
->target
;
113 target_read_u32(target
, STM32_FLASH_SR
, &status
);
118 u32
stm32x_wait_status_busy(flash_bank_t
*bank
, int timeout
)
122 /* wait for busy to clear */
123 while (((status
= stm32x_get_flash_status(bank
)) & FLASH_BSY
) && (timeout
-- > 0))
125 DEBUG("status: 0x%x", status
);
132 int stm32x_read_options(struct flash_bank_s
*bank
)
135 stm32x_flash_bank_t
*stm32x_info
= NULL
;
136 target_t
*target
= bank
->target
;
138 stm32x_info
= bank
->driver_priv
;
140 /* read current option bytes */
141 target_read_u32(target
, STM32_FLASH_OBR
, &optiondata
);
143 stm32x_info
->option_bytes
.user_options
= (u16
)0xFFF8|((optiondata
>> 2) & 0x07);
144 stm32x_info
->option_bytes
.RDP
= (optiondata
& (1 << OPT_READOUT
)) ? 0xFFFF : 0x5AA5;
146 if (optiondata
& (1 << OPT_READOUT
))
147 INFO("Device Security Bit Set");
149 /* each bit refers to a 4bank protection */
150 target_read_u32(target
, STM32_FLASH_WRPR
, &optiondata
);
152 stm32x_info
->option_bytes
.protection
[0] = (u16
)optiondata
;
153 stm32x_info
->option_bytes
.protection
[1] = (u16
)(optiondata
>> 8);
154 stm32x_info
->option_bytes
.protection
[2] = (u16
)(optiondata
>> 16);
155 stm32x_info
->option_bytes
.protection
[3] = (u16
)(optiondata
>> 24);
160 int stm32x_erase_options(struct flash_bank_s
*bank
)
162 stm32x_flash_bank_t
*stm32x_info
= NULL
;
163 target_t
*target
= bank
->target
;
166 stm32x_info
= bank
->driver_priv
;
168 /* read current options */
169 stm32x_read_options(bank
);
171 /* unlock flash registers */
172 target_write_u32(target
, STM32_FLASH_KEYR
, KEY1
);
173 target_write_u32(target
, STM32_FLASH_KEYR
, KEY2
);
175 /* unlock option flash registers */
176 target_write_u32(target
, STM32_FLASH_OPTKEYR
, KEY1
);
177 target_write_u32(target
, STM32_FLASH_OPTKEYR
, KEY2
);
179 /* erase option bytes */
180 target_write_u32(target
, STM32_FLASH_CR
, FLASH_OPTER
|FLASH_OPTWRE
);
181 target_write_u32(target
, STM32_FLASH_CR
, FLASH_OPTER
|FLASH_STRT
|FLASH_OPTWRE
);
183 status
= stm32x_wait_status_busy(bank
, 10);
185 if( status
& FLASH_WRPRTERR
)
186 return ERROR_FLASH_OPERATION_FAILED
;
187 if( status
& FLASH_PGERR
)
188 return ERROR_FLASH_OPERATION_FAILED
;
190 /* clear readout protection and complementary option bytes
191 * this will also force a device unlock if set */
192 stm32x_info
->option_bytes
.RDP
= 0x5AA5;
197 int stm32x_write_options(struct flash_bank_s
*bank
)
199 stm32x_flash_bank_t
*stm32x_info
= NULL
;
200 target_t
*target
= bank
->target
;
203 stm32x_info
= bank
->driver_priv
;
205 /* unlock flash registers */
206 target_write_u32(target
, STM32_FLASH_KEYR
, KEY1
);
207 target_write_u32(target
, STM32_FLASH_KEYR
, KEY2
);
209 /* unlock option flash registers */
210 target_write_u32(target
, STM32_FLASH_OPTKEYR
, KEY1
);
211 target_write_u32(target
, STM32_FLASH_OPTKEYR
, KEY2
);
213 /* program option bytes */
214 target_write_u32(target
, STM32_FLASH_CR
, FLASH_OPTPG
|FLASH_OPTWRE
);
216 /* write user option byte */
217 target_write_u16(target
, STM32_OB_USER
, stm32x_info
->option_bytes
.user_options
);
219 status
= stm32x_wait_status_busy(bank
, 10);
221 if( status
& FLASH_WRPRTERR
)
222 return ERROR_FLASH_OPERATION_FAILED
;
223 if( status
& FLASH_PGERR
)
224 return ERROR_FLASH_OPERATION_FAILED
;
226 /* write protection byte 1 */
227 target_write_u16(target
, STM32_OB_WRP0
, stm32x_info
->option_bytes
.protection
[0]);
229 status
= stm32x_wait_status_busy(bank
, 10);
231 if( status
& FLASH_WRPRTERR
)
232 return ERROR_FLASH_OPERATION_FAILED
;
233 if( status
& FLASH_PGERR
)
234 return ERROR_FLASH_OPERATION_FAILED
;
236 /* write protection byte 2 */
237 target_write_u16(target
, STM32_OB_WRP1
, stm32x_info
->option_bytes
.protection
[1]);
239 status
= stm32x_wait_status_busy(bank
, 10);
241 if( status
& FLASH_WRPRTERR
)
242 return ERROR_FLASH_OPERATION_FAILED
;
243 if( status
& FLASH_PGERR
)
244 return ERROR_FLASH_OPERATION_FAILED
;
246 /* write protection byte 3 */
247 target_write_u16(target
, STM32_OB_WRP2
, stm32x_info
->option_bytes
.protection
[2]);
249 status
= stm32x_wait_status_busy(bank
, 10);
251 if( status
& FLASH_WRPRTERR
)
252 return ERROR_FLASH_OPERATION_FAILED
;
253 if( status
& FLASH_PGERR
)
254 return ERROR_FLASH_OPERATION_FAILED
;
256 /* write protection byte 4 */
257 target_write_u16(target
, STM32_OB_WRP3
, stm32x_info
->option_bytes
.protection
[3]);
259 status
= stm32x_wait_status_busy(bank
, 10);
261 if( status
& FLASH_WRPRTERR
)
262 return ERROR_FLASH_OPERATION_FAILED
;
263 if( status
& FLASH_PGERR
)
264 return ERROR_FLASH_OPERATION_FAILED
;
266 /* write readout protection bit */
267 target_write_u16(target
, STM32_OB_RDP
, stm32x_info
->option_bytes
.RDP
);
269 status
= stm32x_wait_status_busy(bank
, 10);
271 if( status
& FLASH_WRPRTERR
)
272 return ERROR_FLASH_OPERATION_FAILED
;
273 if( status
& FLASH_PGERR
)
274 return ERROR_FLASH_OPERATION_FAILED
;
276 target_write_u32(target
, STM32_FLASH_CR
, FLASH_LOCK
);
281 int stm32x_blank_check(struct flash_bank_s
*bank
, int first
, int last
)
283 target_t
*target
= bank
->target
;
288 if ((first
< 0) || (last
> bank
->num_sectors
))
289 return ERROR_FLASH_SECTOR_INVALID
;
291 if (target
->state
!= TARGET_HALTED
)
293 return ERROR_TARGET_NOT_HALTED
;
296 buffer
= malloc(256);
298 for (i
= first
; i
<= last
; i
++)
300 bank
->sectors
[i
].is_erased
= 1;
302 target
->type
->read_memory(target
, bank
->base
+ bank
->sectors
[i
].offset
, 4, 256/4, buffer
);
304 for (nBytes
= 0; nBytes
< 256; nBytes
++)
306 if (buffer
[nBytes
] != 0xFF)
308 bank
->sectors
[i
].is_erased
= 0;
319 int stm32x_protect_check(struct flash_bank_s
*bank
)
321 target_t
*target
= bank
->target
;
327 if (target
->state
!= TARGET_HALTED
)
329 return ERROR_TARGET_NOT_HALTED
;
332 /* each bit refers to a 4bank protection */
333 target_read_u32(target
, STM32_FLASH_WRPR
, &protection
);
335 /* each protection bit is for 4 1K pages */
336 num_bits
= (bank
->num_sectors
/ 4);
338 for (i
= 0; i
< num_bits
; i
++)
342 if( protection
& (1 << i
))
345 for (s
= 0; s
< 4; s
++)
346 bank
->sectors
[(i
* 4) + s
].is_protected
= set
;
352 int stm32x_erase(struct flash_bank_s
*bank
, int first
, int last
)
354 target_t
*target
= bank
->target
;
359 if (target
->state
!= TARGET_HALTED
)
361 return ERROR_TARGET_NOT_HALTED
;
364 /* unlock flash registers */
365 target_write_u32(target
, STM32_FLASH_KEYR
, KEY1
);
366 target_write_u32(target
, STM32_FLASH_KEYR
, KEY2
);
368 for (i
= first
; i
<= last
; i
++)
370 target_write_u32(target
, STM32_FLASH_CR
, FLASH_PER
);
371 target_write_u32(target
, STM32_FLASH_AR
, bank
->base
+ bank
->sectors
[i
].offset
);
372 target_write_u32(target
, STM32_FLASH_CR
, FLASH_PER
|FLASH_STRT
);
374 status
= stm32x_wait_status_busy(bank
, 10);
376 if( status
& FLASH_WRPRTERR
)
377 return ERROR_FLASH_OPERATION_FAILED
;
378 if( status
& FLASH_PGERR
)
379 return ERROR_FLASH_OPERATION_FAILED
;
380 bank
->sectors
[i
].is_erased
= 1;
383 target_write_u32(target
, STM32_FLASH_CR
, FLASH_LOCK
);
388 int stm32x_protect(struct flash_bank_s
*bank
, int set
, int first
, int last
)
390 stm32x_flash_bank_t
*stm32x_info
= NULL
;
391 target_t
*target
= bank
->target
;
392 u16 prot_reg
[4] = {0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF};
397 stm32x_info
= bank
->driver_priv
;
399 if (target
->state
!= TARGET_HALTED
)
401 return ERROR_TARGET_NOT_HALTED
;
404 if ((first
&& (first
% 4)) || ((last
+ 1) && (last
+ 1) % 4))
406 WARNING("sector start/end incorrect - stm32 has 4K sector protection");
407 return ERROR_FLASH_SECTOR_INVALID
;
410 /* each bit refers to a 4bank protection */
411 target_read_u32(target
, STM32_FLASH_WRPR
, &protection
);
413 prot_reg
[0] = (u16
)protection
;
414 prot_reg
[1] = (u16
)(protection
>> 8);
415 prot_reg
[2] = (u16
)(protection
>> 16);
416 prot_reg
[3] = (u16
)(protection
>> 24);
418 for (i
= first
; i
<= last
; i
++)
421 bit
= (i
/ 4) - (reg
* 8);
424 prot_reg
[reg
] &= ~(1 << bit
);
426 prot_reg
[reg
] |= (1 << bit
);
429 if ((status
= stm32x_erase_options(bank
)) != ERROR_OK
)
432 stm32x_info
->option_bytes
.protection
[0] = prot_reg
[0];
433 stm32x_info
->option_bytes
.protection
[1] = prot_reg
[1];
434 stm32x_info
->option_bytes
.protection
[2] = prot_reg
[2];
435 stm32x_info
->option_bytes
.protection
[3] = prot_reg
[3];
437 return stm32x_write_options(bank
);
440 int stm32x_write_block(struct flash_bank_s
*bank
, u8
*buffer
, u32 offset
, u32 count
)
442 stm32x_flash_bank_t
*stm32x_info
= bank
->driver_priv
;
443 target_t
*target
= bank
->target
;
444 u32 buffer_size
= 8192;
445 working_area_t
*source
;
446 u32 address
= bank
->base
+ offset
;
447 reg_param_t reg_params
[4];
448 armv7m_algorithm_t armv7m_info
;
449 int retval
= ERROR_OK
;
451 u8 stm32x_flash_write_code
[] = {
453 0xDF, 0xF8, 0x24, 0x40, /* ldr r4, STM32_FLASH_CR */
454 0x09, 0x4D, /* ldr r5, STM32_FLASH_SR */
455 0x4F, 0xF0, 0x01, 0x03, /* mov r3, #1 */
456 0x23, 0x60, /* str r3, [r4, #0] */
457 0x30, 0xF8, 0x02, 0x3B, /* ldrh r3, [r0], #2 */
458 0x21, 0xF8, 0x02, 0x3B, /* strh r3, [r1], #2 */
460 0x2B, 0x68, /* ldr r3, [r5, #0] */
461 0x13, 0xF0, 0x01, 0x0F, /* tst r3, #0x01 */
462 0xFB, 0xD0, /* beq busy */
463 0x13, 0xF0, 0x14, 0x0F, /* tst r3, #0x14 */
464 0x01, 0xD1, /* bne exit */
465 0x01, 0x3A, /* subs r2, r2, #1 */
466 0xED, 0xD1, /* bne write */
468 0xFE, 0xE7, /* b exit */
469 0x10, 0x20, 0x02, 0x40, /* STM32_FLASH_CR: .word 0x40022010 */
470 0x0C, 0x20, 0x02, 0x40 /* STM32_FLASH_SR: .word 0x4002200C */
473 /* flash write code */
474 if (target_alloc_working_area(target
, sizeof(stm32x_flash_write_code
), &stm32x_info
->write_algorithm
) != ERROR_OK
)
476 WARNING("no working area available, can't do block memory writes");
477 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE
;
480 target_write_buffer(target
, stm32x_info
->write_algorithm
->address
, sizeof(stm32x_flash_write_code
), stm32x_flash_write_code
);
483 while (target_alloc_working_area(target
, buffer_size
, &source
) != ERROR_OK
)
486 if (buffer_size
<= 256)
488 /* if we already allocated the writing code, but failed to get a buffer, free the algorithm */
489 if (stm32x_info
->write_algorithm
)
490 target_free_working_area(target
, stm32x_info
->write_algorithm
);
492 WARNING("no large enough working area available, can't do block memory writes");
493 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE
;
497 armv7m_info
.common_magic
= ARMV7M_COMMON_MAGIC
;
498 armv7m_info
.core_mode
= ARMV7M_MODE_ANY
;
499 armv7m_info
.core_state
= ARMV7M_STATE_THUMB
;
501 init_reg_param(®_params
[0], "r0", 32, PARAM_OUT
);
502 init_reg_param(®_params
[1], "r1", 32, PARAM_OUT
);
503 init_reg_param(®_params
[2], "r2", 32, PARAM_OUT
);
504 init_reg_param(®_params
[3], "r3", 32, PARAM_IN
);
508 u32 thisrun_count
= (count
> (buffer_size
/ 2)) ? (buffer_size
/ 2) : count
;
510 target_write_buffer(target
, source
->address
, thisrun_count
* 2, buffer
);
512 buf_set_u32(reg_params
[0].value
, 0, 32, source
->address
);
513 buf_set_u32(reg_params
[1].value
, 0, 32, address
);
514 buf_set_u32(reg_params
[2].value
, 0, 32, thisrun_count
);
516 if ((retval
= target
->type
->run_algorithm(target
, 0, NULL
, 4, reg_params
, stm32x_info
->write_algorithm
->address
, \
517 stm32x_info
->write_algorithm
->address
+ (sizeof(stm32x_flash_write_code
) - 10), 10000, &armv7m_info
)) != ERROR_OK
)
519 ERROR("error executing str7x flash write algorithm");
523 if (buf_get_u32(reg_params
[3].value
, 0, 32) & 0x14)
525 retval
= ERROR_FLASH_OPERATION_FAILED
;
529 buffer
+= thisrun_count
* 2;
530 address
+= thisrun_count
* 2;
531 count
-= thisrun_count
;
534 target_free_working_area(target
, source
);
535 target_free_working_area(target
, stm32x_info
->write_algorithm
);
537 destroy_reg_param(®_params
[0]);
538 destroy_reg_param(®_params
[1]);
539 destroy_reg_param(®_params
[2]);
540 destroy_reg_param(®_params
[3]);
545 int stm32x_write(struct flash_bank_s
*bank
, u8
*buffer
, u32 offset
, u32 count
)
547 target_t
*target
= bank
->target
;
548 u32 words_remaining
= (count
/ 2);
549 u32 bytes_remaining
= (count
& 0x00000001);
550 u32 address
= bank
->base
+ offset
;
551 u32 bytes_written
= 0;
555 if (target
->state
!= TARGET_HALTED
)
557 return ERROR_TARGET_NOT_HALTED
;
562 WARNING("offset 0x%x breaks required 2-byte alignment", offset
);
563 return ERROR_FLASH_DST_BREAKS_ALIGNMENT
;
566 /* unlock flash registers */
567 target_write_u32(target
, STM32_FLASH_KEYR
, KEY1
);
568 target_write_u32(target
, STM32_FLASH_KEYR
, KEY2
);
570 /* multiple half words (2-byte) to be programmed? */
571 if (words_remaining
> 0)
573 /* try using a block write */
574 if ((retval
= stm32x_write_block(bank
, buffer
, offset
, words_remaining
)) != ERROR_OK
)
576 if (retval
== ERROR_TARGET_RESOURCE_NOT_AVAILABLE
)
578 /* if block write failed (no sufficient working area),
579 * we use normal (slow) single dword accesses */
580 WARNING("couldn't use block writes, falling back to single memory accesses");
582 else if (retval
== ERROR_FLASH_OPERATION_FAILED
)
584 ERROR("flash writing failed with error code: 0x%x", retval
);
585 return ERROR_FLASH_OPERATION_FAILED
;
590 buffer
+= words_remaining
* 2;
591 address
+= words_remaining
* 2;
596 while (words_remaining
> 0)
598 target_write_u32(target
, STM32_FLASH_CR
, FLASH_PG
);
599 target_write_u16(target
, address
, *(u16
*)(buffer
+ bytes_written
));
601 status
= stm32x_wait_status_busy(bank
, 5);
603 if( status
& FLASH_WRPRTERR
)
604 return ERROR_FLASH_OPERATION_FAILED
;
605 if( status
& FLASH_PGERR
)
606 return ERROR_FLASH_OPERATION_FAILED
;
615 u8 last_halfword
[2] = {0xff, 0xff};
618 while(bytes_remaining
> 0)
620 last_halfword
[i
++] = *(buffer
+ bytes_written
);
625 target_write_u32(target
, STM32_FLASH_CR
, FLASH_PG
);
626 target_write_u16(target
, address
, *(u16
*)last_halfword
);
628 status
= stm32x_wait_status_busy(bank
, 5);
630 if( status
& FLASH_WRPRTERR
)
631 return ERROR_FLASH_OPERATION_FAILED
;
632 if( status
& FLASH_PGERR
)
633 return ERROR_FLASH_OPERATION_FAILED
;
636 target_write_u32(target
, STM32_FLASH_CR
, FLASH_LOCK
);
641 int stm32x_probe(struct flash_bank_s
*bank
)
643 target_t
*target
= bank
->target
;
644 stm32x_flash_bank_t
*stm32x_info
= bank
->driver_priv
;
649 stm32x_info
->probed
= 0;
651 /* read stm32 device id register */
652 target_read_u32(target
, 0xE0042000, &device_id
);
653 INFO( "device id = 0x%08x", device_id
);
655 if (!(device_id
& 0x410))
657 WARNING( "Cannot identify target as a STM32 family." );
658 return ERROR_FLASH_OPERATION_FAILED
;
661 /* get flash size from target */
662 target_read_u16(target
, 0x1FFFF7E0, &num_sectors
);
664 /* check for early silicon rev A */
665 if ((device_id
>> 16) == 0 )
667 /* number of sectors incorrect on revA */
668 WARNING( "STM32 Rev A Silicon detected, probe inaccurate - assuming 128k flash" );
672 INFO( "flash size = %dkbytes", num_sectors
);
674 bank
->base
= 0x08000000;
675 bank
->size
= num_sectors
* 1024;
676 bank
->num_sectors
= num_sectors
;
677 bank
->sectors
= malloc(sizeof(flash_sector_t
) * num_sectors
);
679 for (i
= 0; i
< num_sectors
; i
++)
681 bank
->sectors
[i
].offset
= i
* 1024;
682 bank
->sectors
[i
].size
= 1024;
683 bank
->sectors
[i
].is_erased
= -1;
684 bank
->sectors
[i
].is_protected
= 1;
687 stm32x_info
->probed
= 1;
692 int stm32x_auto_probe(struct flash_bank_s
*bank
)
694 stm32x_flash_bank_t
*stm32x_info
= bank
->driver_priv
;
695 if (stm32x_info
->probed
)
697 return stm32x_probe(bank
);
700 int stm32x_handle_part_id_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
705 int stm32x_erase_check(struct flash_bank_s
*bank
)
707 return stm32x_blank_check(bank
, 0, bank
->num_sectors
- 1);
710 int stm32x_info(struct flash_bank_s
*bank
, char *buf
, int buf_size
)
712 snprintf(buf
, buf_size
, "stm32x flash driver info" );
716 int stm32x_handle_lock_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
719 target_t
*target
= NULL
;
720 stm32x_flash_bank_t
*stm32x_info
= NULL
;
724 command_print(cmd_ctx
, "stm32x lock <bank>");
728 bank
= get_flash_bank_by_num(strtoul(args
[0], NULL
, 0));
731 command_print(cmd_ctx
, "flash bank '#%s' is out of bounds", args
[0]);
735 stm32x_info
= bank
->driver_priv
;
737 target
= bank
->target
;
739 if (target
->state
!= TARGET_HALTED
)
741 return ERROR_TARGET_NOT_HALTED
;
744 if (stm32x_erase_options(bank
) != ERROR_OK
)
746 command_print(cmd_ctx
, "stm32x failed to erase options");
750 /* set readout protection */
751 stm32x_info
->option_bytes
.RDP
= 0;
753 if (stm32x_write_options(bank
) != ERROR_OK
)
755 command_print(cmd_ctx
, "stm32x failed to lock device");
759 command_print(cmd_ctx
, "stm32x locked");
764 int stm32x_handle_unlock_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
767 target_t
*target
= NULL
;
768 stm32x_flash_bank_t
*stm32x_info
= NULL
;
772 command_print(cmd_ctx
, "stm32x unlock <bank>");
776 bank
= get_flash_bank_by_num(strtoul(args
[0], NULL
, 0));
779 command_print(cmd_ctx
, "flash bank '#%s' is out of bounds", args
[0]);
783 stm32x_info
= bank
->driver_priv
;
785 target
= bank
->target
;
787 if (target
->state
!= TARGET_HALTED
)
789 return ERROR_TARGET_NOT_HALTED
;
792 if (stm32x_erase_options(bank
) != ERROR_OK
)
794 command_print(cmd_ctx
, "stm32x failed to unlock device");
798 if (stm32x_write_options(bank
) != ERROR_OK
)
800 command_print(cmd_ctx
, "stm32x failed to lock device");
804 command_print(cmd_ctx
, "stm32x unlocked");
809 int stm32x_handle_options_read_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
813 target_t
*target
= NULL
;
814 stm32x_flash_bank_t
*stm32x_info
= NULL
;
818 command_print(cmd_ctx
, "stm32x options_read <bank>");
822 bank
= get_flash_bank_by_num(strtoul(args
[0], NULL
, 0));
825 command_print(cmd_ctx
, "flash bank '#%s' is out of bounds", args
[0]);
829 stm32x_info
= bank
->driver_priv
;
831 target
= bank
->target
;
833 if (target
->state
!= TARGET_HALTED
)
835 return ERROR_TARGET_NOT_HALTED
;
838 target_read_u32(target
, STM32_FLASH_OBR
, &optionbyte
);
839 command_print(cmd_ctx
, "Option Byte: 0x%x", optionbyte
);
841 if (buf_get_u32((u8
*)&optionbyte
, OPT_ERROR
, 1))
842 command_print(cmd_ctx
, "Option Byte Complement Error");
844 if (buf_get_u32((u8
*)&optionbyte
, OPT_READOUT
, 1))
845 command_print(cmd_ctx
, "Readout Protection On");
847 command_print(cmd_ctx
, "Readout Protection Off");
849 if (buf_get_u32((u8
*)&optionbyte
, OPT_RDWDGSW
, 1))
850 command_print(cmd_ctx
, "Software Watchdog");
852 command_print(cmd_ctx
, "Hardware Watchdog");
854 if (buf_get_u32((u8
*)&optionbyte
, OPT_RDRSTSTOP
, 1))
855 command_print(cmd_ctx
, "Stop: No reset generated");
857 command_print(cmd_ctx
, "Stop: Reset generated");
859 if (buf_get_u32((u8
*)&optionbyte
, OPT_RDRSTSTDBY
, 1))
860 command_print(cmd_ctx
, "Standby: No reset generated");
862 command_print(cmd_ctx
, "Standby: Reset generated");
867 int stm32x_handle_options_write_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
870 target_t
*target
= NULL
;
871 stm32x_flash_bank_t
*stm32x_info
= NULL
;
872 u16 optionbyte
= 0xF8;
876 command_print(cmd_ctx
, "stm32x options_write <bank> <SWWDG|HWWDG> <RSTSTNDBY|NORSTSTNDBY> <RSTSTOP|NORSTSTOP>");
880 bank
= get_flash_bank_by_num(strtoul(args
[0], NULL
, 0));
883 command_print(cmd_ctx
, "flash bank '#%s' is out of bounds", args
[0]);
887 stm32x_info
= bank
->driver_priv
;
889 target
= bank
->target
;
891 if (target
->state
!= TARGET_HALTED
)
893 return ERROR_TARGET_NOT_HALTED
;
896 if (strcmp(args
[1], "SWWDG") == 0)
898 optionbyte
|= (1<<0);
902 optionbyte
&= ~(1<<0);
905 if (strcmp(args
[2], "NORSTSTNDBY") == 0)
907 optionbyte
|= (1<<1);
911 optionbyte
&= ~(1<<1);
914 if (strcmp(args
[3], "NORSTSTOP") == 0)
916 optionbyte
|= (1<<2);
920 optionbyte
&= ~(1<<2);
923 if (stm32x_erase_options(bank
) != ERROR_OK
)
925 command_print(cmd_ctx
, "stm32x failed to erase options");
929 stm32x_info
->option_bytes
.user_options
= optionbyte
;
931 if (stm32x_write_options(bank
) != ERROR_OK
)
933 command_print(cmd_ctx
, "stm32x failed to write options");
937 command_print(cmd_ctx
, "stm32x write options complete");
942 int stm32x_handle_mass_erase_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
944 target_t
*target
= NULL
;
945 stm32x_flash_bank_t
*stm32x_info
= NULL
;
951 command_print(cmd_ctx
, "stm32x mass_erase <bank>");
955 bank
= get_flash_bank_by_num(strtoul(args
[0], NULL
, 0));
958 command_print(cmd_ctx
, "flash bank '#%s' is out of bounds", args
[0]);
962 stm32x_info
= bank
->driver_priv
;
964 target
= bank
->target
;
966 if (target
->state
!= TARGET_HALTED
)
968 return ERROR_TARGET_NOT_HALTED
;
971 /* unlock option flash registers */
972 target_write_u32(target
, STM32_FLASH_KEYR
, KEY1
);
973 target_write_u32(target
, STM32_FLASH_KEYR
, KEY2
);
975 /* mass erase flash memory */
976 target_write_u32(target
, STM32_FLASH_CR
, FLASH_MER
);
977 target_write_u32(target
, STM32_FLASH_CR
, FLASH_MER
|FLASH_STRT
);
979 status
= stm32x_wait_status_busy(bank
, 10);
981 target_write_u32(target
, STM32_FLASH_CR
, FLASH_LOCK
);
983 if( status
& FLASH_WRPRTERR
)
985 command_print(cmd_ctx
, "stm32x device protected");
989 if( status
& FLASH_PGERR
)
991 command_print(cmd_ctx
, "stm32x device programming failed");
995 command_print(cmd_ctx
, "stm32x mass erase complete");
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