1 /***************************************************************************
2 * Copyright (C) 2017 by Grzegorz Kostka, kostka.grzegorz@gmail.com *
4 * Based on bcm2835gpio.c *
6 * This program is free software; you can redistribute it and/or modify *
7 * it under the terms of the GNU General Public License as published by *
8 * the Free Software Foundation; either version 2 of the License, or *
9 * (at your option) any later version. *
11 * This program is distributed in the hope that it will be useful, *
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
14 * GNU General Public License for more details. *
16 * You should have received a copy of the GNU General Public License *
17 * along with this program. If not, see <http://www.gnu.org/licenses/>. *
18 ***************************************************************************/
24 #include <jtag/interface.h>
25 #include <transport/transport.h>
30 #define IMX_GPIO_BASE 0x0209c000
31 #define IMX_GPIO_SIZE 0x00004000
32 #define IMX_GPIO_REGS_COUNT 8
34 static uint32_t imx_gpio_peri_base
= IMX_GPIO_BASE
;
36 struct imx_gpio_regs
{
45 } __attribute__((aligned(IMX_GPIO_SIZE
)));
47 static int dev_mem_fd
;
48 static volatile struct imx_gpio_regs
*pio_base
;
50 /* GPIO setup functions */
51 static inline bool gpio_mode_get(int g
)
53 return pio_base
[g
/ 32].gdir
>> (g
& 0x1F) & 1;
56 static inline void gpio_mode_input_set(int g
)
58 pio_base
[g
/ 32].gdir
&= ~(1u << (g
& 0x1F));
61 static inline void gpio_mode_output_set(int g
)
63 pio_base
[g
/ 32].gdir
|= (1u << (g
& 0x1F));
66 static inline void gpio_mode_set(int g
, int m
)
68 (m
) ? gpio_mode_output_set(g
) : gpio_mode_input_set(g
);
71 static inline void gpio_set(int g
)
73 pio_base
[g
/ 32].dr
|= (1u << (g
& 0x1F));
76 static inline void gpio_clear(int g
)
78 pio_base
[g
/ 32].dr
&= ~(1u << (g
& 0x1F));
81 static inline bool gpio_level(int g
)
83 return pio_base
[g
/ 32].dr
>> (g
& 0x1F) & 1;
86 static bb_value_t
imx_gpio_read(void);
87 static int imx_gpio_write(int tck
, int tms
, int tdi
);
89 static int imx_gpio_swdio_read(void);
90 static void imx_gpio_swdio_drive(bool is_output
);
91 static int imx_gpio_swd_write(int swclk
, int swdio
);
93 static int imx_gpio_init(void);
94 static int imx_gpio_quit(void);
96 static struct bitbang_interface imx_gpio_bitbang
= {
97 .read
= imx_gpio_read
,
98 .write
= imx_gpio_write
,
99 .swdio_read
= imx_gpio_swdio_read
,
100 .swdio_drive
= imx_gpio_swdio_drive
,
101 .swd_write
= imx_gpio_swd_write
,
105 /* GPIO numbers for each signal. Negative values are invalid */
106 static int tck_gpio
= -1;
107 static int tck_gpio_mode
;
108 static int tms_gpio
= -1;
109 static int tms_gpio_mode
;
110 static int tdi_gpio
= -1;
111 static int tdi_gpio_mode
;
112 static int tdo_gpio
= -1;
113 static int tdo_gpio_mode
;
114 static int trst_gpio
= -1;
115 static int trst_gpio_mode
;
116 static int srst_gpio
= -1;
117 static int srst_gpio_mode
;
118 static int swclk_gpio
= -1;
119 static int swclk_gpio_mode
;
120 static int swdio_gpio
= -1;
121 static int swdio_gpio_mode
;
123 /* Transition delay coefficients. Tuned for IMX6UL 528MHz. Adjusted
124 * experimentally for:10kHz, 100Khz, 500KHz. Speeds above 800Khz are impossible
125 * to reach via memory mapped method (at least for IMX6UL@528MHz).
126 * Measured mmap raw GPIO toggling speed on IMX6UL@528MHz: 1.3MHz.
128 static int speed_coeff
= 50000;
129 static int speed_offset
= 100;
130 static unsigned int jtag_delay
;
132 static bb_value_t
imx_gpio_read(void)
134 return gpio_level(tdo_gpio
) ? BB_HIGH
: BB_LOW
;
137 static int imx_gpio_write(int tck
, int tms
, int tdi
)
139 tms
? gpio_set(tms_gpio
) : gpio_clear(tms_gpio
);
140 tdi
? gpio_set(tdi_gpio
) : gpio_clear(tdi_gpio
);
141 tck
? gpio_set(tck_gpio
) : gpio_clear(tck_gpio
);
143 for (unsigned int i
= 0; i
< jtag_delay
; i
++)
149 static int imx_gpio_swd_write(int swclk
, int swdio
)
151 swdio
? gpio_set(swdio_gpio
) : gpio_clear(swdio_gpio
);
152 swclk
? gpio_set(swclk_gpio
) : gpio_clear(swclk_gpio
);
154 for (unsigned int i
= 0; i
< jtag_delay
; i
++)
160 /* (1) assert or (0) deassert reset lines */
161 static int imx_gpio_reset(int trst
, int srst
)
164 trst
? gpio_clear(trst_gpio
) : gpio_set(trst_gpio
);
167 srst
? gpio_clear(srst_gpio
) : gpio_set(srst_gpio
);
172 static void imx_gpio_swdio_drive(bool is_output
)
175 gpio_mode_output_set(swdio_gpio
);
177 gpio_mode_input_set(swdio_gpio
);
180 static int imx_gpio_swdio_read(void)
182 return gpio_level(swdio_gpio
);
185 static int imx_gpio_khz(int khz
, int *jtag_speed
)
188 LOG_DEBUG("RCLK not supported");
191 *jtag_speed
= speed_coeff
/khz
- speed_offset
;
197 static int imx_gpio_speed_div(int speed
, int *khz
)
199 *khz
= speed_coeff
/(speed
+ speed_offset
);
203 static int imx_gpio_speed(int speed
)
209 static int is_gpio_valid(int gpio
)
211 return gpio
>= 0 && gpio
< 32 * IMX_GPIO_REGS_COUNT
;
214 COMMAND_HANDLER(imx_gpio_handle_jtag_gpionums
)
217 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[0], tck_gpio
);
218 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[1], tms_gpio
);
219 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[2], tdi_gpio
);
220 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[3], tdo_gpio
);
221 } else if (CMD_ARGC
!= 0) {
222 return ERROR_COMMAND_SYNTAX_ERROR
;
226 "imx_gpio GPIO config: tck = %d, tms = %d, tdi = %d, tdo = %d",
227 tck_gpio
, tms_gpio
, tdi_gpio
, tdo_gpio
);
232 COMMAND_HANDLER(imx_gpio_handle_jtag_gpionum_tck
)
235 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[0], tck_gpio
);
237 command_print(CMD
, "imx_gpio GPIO config: tck = %d", tck_gpio
);
241 COMMAND_HANDLER(imx_gpio_handle_jtag_gpionum_tms
)
244 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[0], tms_gpio
);
246 command_print(CMD
, "imx_gpio GPIO config: tms = %d", tms_gpio
);
250 COMMAND_HANDLER(imx_gpio_handle_jtag_gpionum_tdo
)
253 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[0], tdo_gpio
);
255 command_print(CMD
, "imx_gpio GPIO config: tdo = %d", tdo_gpio
);
259 COMMAND_HANDLER(imx_gpio_handle_jtag_gpionum_tdi
)
262 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[0], tdi_gpio
);
264 command_print(CMD
, "imx_gpio GPIO config: tdi = %d", tdi_gpio
);
268 COMMAND_HANDLER(imx_gpio_handle_jtag_gpionum_srst
)
271 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[0], srst_gpio
);
273 command_print(CMD
, "imx_gpio GPIO config: srst = %d", srst_gpio
);
277 COMMAND_HANDLER(imx_gpio_handle_jtag_gpionum_trst
)
280 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[0], trst_gpio
);
282 command_print(CMD
, "imx_gpio GPIO config: trst = %d", trst_gpio
);
286 COMMAND_HANDLER(imx_gpio_handle_swd_gpionums
)
289 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[0], swclk_gpio
);
290 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[1], swdio_gpio
);
291 } else if (CMD_ARGC
!= 0) {
292 return ERROR_COMMAND_SYNTAX_ERROR
;
296 "imx_gpio GPIO nums: swclk = %d, swdio = %d",
297 swclk_gpio
, swdio_gpio
);
302 COMMAND_HANDLER(imx_gpio_handle_swd_gpionum_swclk
)
305 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[0], swclk_gpio
);
307 command_print(CMD
, "imx_gpio num: swclk = %d", swclk_gpio
);
311 COMMAND_HANDLER(imx_gpio_handle_swd_gpionum_swdio
)
314 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[0], swdio_gpio
);
316 command_print(CMD
, "imx_gpio num: swdio = %d", swdio_gpio
);
320 COMMAND_HANDLER(imx_gpio_handle_speed_coeffs
)
323 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[0], speed_coeff
);
324 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[1], speed_offset
);
327 command_print(CMD
, "imx_gpio: speed_coeffs = %d, speed_offset = %d",
328 speed_coeff
, speed_offset
);
332 COMMAND_HANDLER(imx_gpio_handle_peripheral_base
)
335 COMMAND_PARSE_NUMBER(u32
, CMD_ARGV
[0], imx_gpio_peri_base
);
337 command_print(CMD
, "imx_gpio: peripheral_base = 0x%08x",
342 static const struct command_registration imx_gpio_command_handlers
[] = {
344 .name
= "imx_gpio_jtag_nums",
345 .handler
= &imx_gpio_handle_jtag_gpionums
,
346 .mode
= COMMAND_CONFIG
,
347 .help
= "gpio numbers for tck, tms, tdi, tdo. (in that order)",
348 .usage
= "[tck tms tdi tdo]",
351 .name
= "imx_gpio_tck_num",
352 .handler
= &imx_gpio_handle_jtag_gpionum_tck
,
353 .mode
= COMMAND_CONFIG
,
354 .help
= "gpio number for tck.",
358 .name
= "imx_gpio_tms_num",
359 .handler
= &imx_gpio_handle_jtag_gpionum_tms
,
360 .mode
= COMMAND_CONFIG
,
361 .help
= "gpio number for tms.",
365 .name
= "imx_gpio_tdo_num",
366 .handler
= &imx_gpio_handle_jtag_gpionum_tdo
,
367 .mode
= COMMAND_CONFIG
,
368 .help
= "gpio number for tdo.",
372 .name
= "imx_gpio_tdi_num",
373 .handler
= &imx_gpio_handle_jtag_gpionum_tdi
,
374 .mode
= COMMAND_CONFIG
,
375 .help
= "gpio number for tdi.",
379 .name
= "imx_gpio_swd_nums",
380 .handler
= &imx_gpio_handle_swd_gpionums
,
381 .mode
= COMMAND_CONFIG
,
382 .help
= "gpio numbers for swclk, swdio. (in that order)",
383 .usage
= "[swclk swdio]",
386 .name
= "imx_gpio_swclk_num",
387 .handler
= &imx_gpio_handle_swd_gpionum_swclk
,
388 .mode
= COMMAND_CONFIG
,
389 .help
= "gpio number for swclk.",
393 .name
= "imx_gpio_swdio_num",
394 .handler
= &imx_gpio_handle_swd_gpionum_swdio
,
395 .mode
= COMMAND_CONFIG
,
396 .help
= "gpio number for swdio.",
400 .name
= "imx_gpio_srst_num",
401 .handler
= &imx_gpio_handle_jtag_gpionum_srst
,
402 .mode
= COMMAND_CONFIG
,
403 .help
= "gpio number for srst.",
407 .name
= "imx_gpio_trst_num",
408 .handler
= &imx_gpio_handle_jtag_gpionum_trst
,
409 .mode
= COMMAND_CONFIG
,
410 .help
= "gpio number for trst.",
414 .name
= "imx_gpio_speed_coeffs",
415 .handler
= &imx_gpio_handle_speed_coeffs
,
416 .mode
= COMMAND_CONFIG
,
417 .help
= "SPEED_COEFF and SPEED_OFFSET for delay calculations.",
418 .usage
= "[SPEED_COEFF SPEED_OFFSET]",
421 .name
= "imx_gpio_peripheral_base",
422 .handler
= &imx_gpio_handle_peripheral_base
,
423 .mode
= COMMAND_CONFIG
,
424 .help
= "peripheral base to access GPIOs (0x0209c000 for most IMX).",
428 COMMAND_REGISTRATION_DONE
431 static const char * const imx_gpio_transports
[] = { "jtag", "swd", NULL
};
433 static struct jtag_interface imx_gpio_interface
= {
434 .supported
= DEBUG_CAP_TMS_SEQ
,
435 .execute_queue
= bitbang_execute_queue
,
438 struct adapter_driver imx_gpio_adapter_driver
= {
440 .transports
= imx_gpio_transports
,
441 .commands
= imx_gpio_command_handlers
,
443 .init
= imx_gpio_init
,
444 .quit
= imx_gpio_quit
,
445 .reset
= imx_gpio_reset
,
446 .speed
= imx_gpio_speed
,
448 .speed_div
= imx_gpio_speed_div
,
450 .jtag_ops
= &imx_gpio_interface
,
451 .swd_ops
= &bitbang_swd
,
454 static bool imx_gpio_jtag_mode_possible(void)
456 if (!is_gpio_valid(tck_gpio
))
458 if (!is_gpio_valid(tms_gpio
))
460 if (!is_gpio_valid(tdi_gpio
))
462 if (!is_gpio_valid(tdo_gpio
))
467 static bool imx_gpio_swd_mode_possible(void)
469 if (!is_gpio_valid(swclk_gpio
))
471 if (!is_gpio_valid(swdio_gpio
))
476 static int imx_gpio_init(void)
478 bitbang_interface
= &imx_gpio_bitbang
;
480 LOG_INFO("imx_gpio GPIO JTAG/SWD bitbang driver");
482 if (transport_is_jtag() && !imx_gpio_jtag_mode_possible()) {
483 LOG_ERROR("Require tck, tms, tdi and tdo gpios for JTAG mode");
484 return ERROR_JTAG_INIT_FAILED
;
487 if (transport_is_swd() && !imx_gpio_swd_mode_possible()) {
488 LOG_ERROR("Require swclk and swdio gpio for SWD mode");
489 return ERROR_JTAG_INIT_FAILED
;
492 dev_mem_fd
= open("/dev/mem", O_RDWR
| O_SYNC
);
493 if (dev_mem_fd
< 0) {
494 LOG_ERROR("open: %s", strerror(errno
));
495 return ERROR_JTAG_INIT_FAILED
;
498 LOG_INFO("imx_gpio mmap: pagesize: %u, regionsize: %u",
499 (unsigned int) sysconf(_SC_PAGE_SIZE
), IMX_GPIO_REGS_COUNT
* IMX_GPIO_SIZE
);
500 pio_base
= mmap(NULL
, IMX_GPIO_REGS_COUNT
* IMX_GPIO_SIZE
,
501 PROT_READ
| PROT_WRITE
,
502 MAP_SHARED
, dev_mem_fd
, imx_gpio_peri_base
);
504 if (pio_base
== MAP_FAILED
) {
505 LOG_ERROR("mmap: %s", strerror(errno
));
507 return ERROR_JTAG_INIT_FAILED
;
511 * Configure TDO as an input, and TDI, TCK, TMS, TRST, SRST
512 * as outputs. Drive TDI and TCK low, and TMS/TRST/SRST high.
514 if (transport_is_jtag()) {
515 tdo_gpio_mode
= gpio_mode_get(tdo_gpio
);
516 tdi_gpio_mode
= gpio_mode_get(tdi_gpio
);
517 tck_gpio_mode
= gpio_mode_get(tck_gpio
);
518 tms_gpio_mode
= gpio_mode_get(tms_gpio
);
520 gpio_clear(tdi_gpio
);
521 gpio_clear(tck_gpio
);
524 gpio_mode_input_set(tdo_gpio
);
525 gpio_mode_output_set(tdi_gpio
);
526 gpio_mode_output_set(tck_gpio
);
527 gpio_mode_output_set(tms_gpio
);
529 if (trst_gpio
!= -1) {
530 trst_gpio_mode
= gpio_mode_get(trst_gpio
);
532 gpio_mode_output_set(trst_gpio
);
536 if (transport_is_swd()) {
537 swclk_gpio_mode
= gpio_mode_get(swclk_gpio
);
538 swdio_gpio_mode
= gpio_mode_get(swdio_gpio
);
540 gpio_clear(swdio_gpio
);
541 gpio_clear(swclk_gpio
);
542 gpio_mode_output_set(swclk_gpio
);
543 gpio_mode_output_set(swdio_gpio
);
546 if (srst_gpio
!= -1) {
547 srst_gpio_mode
= gpio_mode_get(srst_gpio
);
549 gpio_mode_output_set(srst_gpio
);
552 LOG_DEBUG("saved pinmux settings: tck %d tms %d tdi %d "
553 "tdo %d trst %d srst %d", tck_gpio_mode
, tms_gpio_mode
,
554 tdi_gpio_mode
, tdo_gpio_mode
, trst_gpio_mode
, srst_gpio_mode
);
559 static int imx_gpio_quit(void)
561 if (transport_is_jtag()) {
562 gpio_mode_set(tdo_gpio
, tdo_gpio_mode
);
563 gpio_mode_set(tdi_gpio
, tdi_gpio_mode
);
564 gpio_mode_set(tck_gpio
, tck_gpio_mode
);
565 gpio_mode_set(tms_gpio
, tms_gpio_mode
);
568 gpio_mode_set(trst_gpio
, trst_gpio_mode
);
571 if (transport_is_swd()) {
572 gpio_mode_set(swclk_gpio
, swclk_gpio_mode
);
573 gpio_mode_set(swdio_gpio
, swdio_gpio_mode
);
577 gpio_mode_set(srst_gpio
, srst_gpio_mode
);
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