src/rtos/rtos_mqx_stackings.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2
   3 /***************************************************************************
   4  *   Copyright (C) 2014 by Marian Cingel                                   *
   5  *   cingel.marian@gmail.com                                               *
   6  ***************************************************************************/
   7
   8 #ifdef HAVE_CONFIG_H
   9 #include "config.h"
  10 #endif
  11
  12 #include "rtos.h"
  13 #include "target/armv7m.h"
  14 #include "rtos_mqx_stackings.h"
  15
  16 /*
  17  * standard exception stack
  18  * ( stack base, higher memory address )
  19  * - xpsr               - 0x48
  20  * - pc                 - 0x44
  21  * - lr                 - 0x40
  22  * - r12                - 0x3C
  23  * - r3                 - 0x38
  24  * - r2                 - 0x34
  25  * - r1                 - 0x30
  26  * - r0                 - 0x2C
  27  * extended stack in svc_pending handler
  28  * - lr                 - 0x28
  29  * - r11                - 0x24
  30  * - r10                - 0x20
  31  * - r9                 - 0x1C
  32  * - r8                 - 0x18
  33  * - r7                 - 0x14
  34  * - r6                 - 0x10
  35  * - r5                 - 0x0C
  36  * - r4                 - 0x08
  37  * - BASEPRI    - 0x04
  38  * - SHPR3              - 0x00 ( contains pend_svc exception priority )
  39  * ( stack head, lower address, stored in 'task->STACK_PTR' )
  40  */
  41
  42 static const struct stack_register_offset rtos_mqx_arm_v7m_stack_offsets[ARMV7M_NUM_CORE_REGS] = {
  43         { ARMV7M_R0,   0x2C, 32 }, /* r0   */
  44         { ARMV7M_R1,   0x30, 32 }, /* r1   */
  45         { ARMV7M_R2,   0x34, 32 }, /* r2   */
  46         { ARMV7M_R3,   0x38, 32 }, /* r3   */
  47         { ARMV7M_R4,   0x08, 32 }, /* r4   */
  48         { ARMV7M_R5,   0x0C, 32 }, /* r5   */
  49         { ARMV7M_R6,   0x10, 32 }, /* r6   */
  50         { ARMV7M_R7,   0x14, 32 }, /* r7   */
  51         { ARMV7M_R8,   0x18, 32 }, /* r8   */
  52         { ARMV7M_R9,   0x1C, 32 }, /* r9   */
  53         { ARMV7M_R10,  0x20, 32 }, /* r10  */
  54         { ARMV7M_R11,  0x24, 32 }, /* r11  */
  55         { ARMV7M_R12,  0x3C, 32 }, /* r12  */
  56         { ARMV7M_R13,    -2, 32 }, /* sp   */
  57         { ARMV7M_R14,  0x28, 32 }, /* lr   */
  58         { ARMV7M_PC,   0x44, 32 }, /* pc   */
  59         { ARMV7M_XPSR, 0x48, 32 }, /* xPSR */
  60 };
  61
  62 const struct rtos_register_stacking rtos_mqx_arm_v7m_stacking = {
  63         .stack_registers_size = 0x4C,                                   /* calculate offset base address */
  64         .stack_growth_direction = -1,
  65         .num_output_registers = ARMV7M_NUM_CORE_REGS,
  66         .register_offsets = rtos_mqx_arm_v7m_stack_offsets
  67 };