target/cortex_m: Add Realtek Real-M200 and M300
[openocd.git] / src / target / esirisc_jtag.c
1 // SPDX-License-Identifier: GPL-2.0-or-later
2
3 /***************************************************************************
4 * Copyright (C) 2018 by Square, Inc. *
5 * Steven Stallion <stallion@squareup.com> *
6 * James Zhao <hjz@squareup.com> *
7 ***************************************************************************/
8
9 #ifdef HAVE_CONFIG_H
10 #include "config.h"
11 #endif
12
13 #include <helper/binarybuffer.h>
14 #include <helper/log.h>
15 #include <helper/types.h>
16 #include <jtag/jtag.h>
17 #include <jtag/commands.h>
18 #include <jtag/interface.h>
19
20 #include "esirisc_jtag.h"
21
22 static void esirisc_jtag_set_instr(struct esirisc_jtag *jtag_info, uint32_t new_instr)
23 {
24 struct jtag_tap *tap = jtag_info->tap;
25
26 if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != new_instr) {
27 struct scan_field field;
28 uint8_t t[4] = { 0 };
29
30 field.num_bits = tap->ir_length;
31 field.out_value = t;
32 buf_set_u32(t, 0, field.num_bits, new_instr);
33 field.in_value = NULL;
34
35 jtag_add_ir_scan(tap, &field, TAP_IDLE);
36 }
37 }
38
39 /*
40 * The data register is latched every 8 bits while in the Shift-DR state
41 * (Update-DR is not supported). This necessitates prepending padding
42 * bits to ensure data is aligned when multiple TAPs are present.
43 */
44 static int esirisc_jtag_get_padding(void)
45 {
46 int padding = 0;
47 int bypass_devices = 0;
48
49 for (struct jtag_tap *tap = jtag_tap_next_enabled(NULL); tap;
50 tap = jtag_tap_next_enabled(tap))
51 if (tap->bypass)
52 bypass_devices++;
53
54 int num_bits = bypass_devices % 8;
55 if (num_bits > 0)
56 padding = 8 - num_bits;
57
58 return padding;
59 }
60
61 static int esirisc_jtag_count_bits(int num_fields, struct scan_field *fields)
62 {
63 int bit_count = 0;
64
65 for (int i = 0; i < num_fields; ++i)
66 bit_count += fields[i].num_bits;
67
68 return bit_count;
69 }
70
71 /*
72 * Data received from the target will be byte-stuffed if it contains
73 * either the pad byte (0xAA) or stuffing marker (0x55). Buffers should
74 * be sized twice the expected length to account for stuffing overhead.
75 */
76 static void esirisc_jtag_unstuff(uint8_t *data, size_t len)
77 {
78 uint8_t *r, *w;
79 uint8_t *end;
80
81 r = w = data;
82 end = data + len;
83 while (r < end) {
84 if (*r == STUFF_MARKER) {
85 r++; /* skip stuffing marker */
86 assert(r < end);
87 *w++ = *r++ ^ STUFF_MARKER;
88 } else
89 *w++ = *r++;
90 }
91 }
92
93 /*
94 * The eSi-Debug protocol defines a byte-oriented command/response
95 * channel that operates over serial or JTAG. While not strictly
96 * required, separate DR scans are used for sending and receiving data.
97 * This allows the TAP to recover gracefully if the byte stream is
98 * corrupted at the expense of sending additional padding bits.
99 */
100
101 static int esirisc_jtag_send(struct esirisc_jtag *jtag_info, uint8_t command,
102 int num_out_fields, struct scan_field *out_fields)
103 {
104 int num_fields = 2 + num_out_fields;
105 struct scan_field *fields = cmd_queue_alloc(num_fields * sizeof(struct scan_field));
106
107 esirisc_jtag_set_instr(jtag_info, INSTR_DEBUG);
108
109 fields[0].num_bits = esirisc_jtag_get_padding();
110 fields[0].out_value = NULL;
111 fields[0].in_value = NULL;
112
113 fields[1].num_bits = 8;
114 fields[1].out_value = &command;
115 fields[1].in_value = NULL;
116
117 /* append command data */
118 for (int i = 0; i < num_out_fields; ++i)
119 jtag_scan_field_clone(&fields[2+i], &out_fields[i]);
120
121 jtag_add_dr_scan(jtag_info->tap, num_fields, fields, TAP_IDLE);
122
123 return jtag_execute_queue();
124 }
125
126 static int esirisc_jtag_recv(struct esirisc_jtag *jtag_info,
127 int num_in_fields, struct scan_field *in_fields)
128 {
129 int num_in_bits = esirisc_jtag_count_bits(num_in_fields, in_fields);
130 int num_in_bytes = DIV_ROUND_UP(num_in_bits, 8);
131
132 struct scan_field fields[3];
133 /* prevent zero-size variable length array */
134 int r_size = num_in_bytes ? num_in_bytes * 2 : 1;
135 uint8_t r[r_size];
136
137 esirisc_jtag_set_instr(jtag_info, INSTR_DEBUG);
138
139 fields[0].num_bits = esirisc_jtag_get_padding() + 1;
140 fields[0].out_value = NULL;
141 fields[0].in_value = NULL;
142
143 fields[1].num_bits = 8;
144 fields[1].out_value = NULL;
145 fields[1].in_value = &jtag_info->status;
146
147 fields[2].num_bits = num_in_bits * 2;
148 fields[2].out_value = NULL;
149 fields[2].in_value = r;
150
151 jtag_add_dr_scan(jtag_info->tap, ARRAY_SIZE(fields), fields, TAP_IDLE);
152
153 int retval = jtag_execute_queue();
154 if (retval != ERROR_OK)
155 return retval;
156
157 /* unstuff response data and write back to caller */
158 if (num_in_fields > 0) {
159 esirisc_jtag_unstuff(r, ARRAY_SIZE(r));
160
161 int bit_count = 0;
162 for (int i = 0; i < num_in_fields; ++i) {
163 buf_set_buf(r, bit_count, in_fields[i].in_value, 0, in_fields[i].num_bits);
164 bit_count += in_fields[i].num_bits;
165 }
166 }
167
168 return ERROR_OK;
169 }
170
171 static int esirisc_jtag_check_status(struct esirisc_jtag *jtag_info)
172 {
173 uint8_t eid = esirisc_jtag_get_eid(jtag_info);
174 if (eid != EID_NONE) {
175 LOG_ERROR("esirisc_jtag: bad status: 0x%02" PRIx8 " (DA: %" PRId32 ", "
176 "S: %" PRId32 ", EID: 0x%02" PRIx8 ")",
177 jtag_info->status, esirisc_jtag_is_debug_active(jtag_info),
178 esirisc_jtag_is_stopped(jtag_info), eid);
179 return ERROR_FAIL;
180 }
181
182 return ERROR_OK;
183 }
184
185 static int esirisc_jtag_send_and_recv(struct esirisc_jtag *jtag_info, uint8_t command,
186 int num_out_fields, struct scan_field *out_fields,
187 int num_in_fields, struct scan_field *in_fields)
188 {
189 int retval;
190
191 jtag_info->status = 0; /* clear status */
192
193 retval = esirisc_jtag_send(jtag_info, command, num_out_fields, out_fields);
194 if (retval != ERROR_OK) {
195 LOG_ERROR("esirisc_jtag: send failed (command: 0x%02" PRIx8 ")", command);
196 return ERROR_FAIL;
197 }
198
199 retval = esirisc_jtag_recv(jtag_info, num_in_fields, in_fields);
200 if (retval != ERROR_OK) {
201 LOG_ERROR("esirisc_jtag: recv failed (command: 0x%02" PRIx8 ")", command);
202 return ERROR_FAIL;
203 }
204
205 return esirisc_jtag_check_status(jtag_info);
206 }
207
208 /*
209 * Status is automatically updated after each command completes;
210 * these functions make each field available to the caller.
211 */
212
213 bool esirisc_jtag_is_debug_active(struct esirisc_jtag *jtag_info)
214 {
215 return !!(jtag_info->status & 1<<7); /* DA */
216 }
217
218 bool esirisc_jtag_is_stopped(struct esirisc_jtag *jtag_info)
219 {
220 return !!(jtag_info->status & 1<<6); /* S */
221 }
222
223 uint8_t esirisc_jtag_get_eid(struct esirisc_jtag *jtag_info)
224 {
225 return jtag_info->status & 0x3f; /* EID */
226 }
227
228 /*
229 * Most commands manipulate target data (eg. memory and registers); each
230 * command returns a status byte that indicates success. Commands must
231 * transmit multibyte values in big-endian order, however response
232 * values are in little-endian order. Target endianness does not have an
233 * effect on this ordering.
234 */
235
236 int esirisc_jtag_read_byte(struct esirisc_jtag *jtag_info, uint32_t address, uint8_t *data)
237 {
238 struct scan_field out_fields[1];
239 uint8_t a[4];
240
241 out_fields[0].num_bits = 32;
242 out_fields[0].out_value = a;
243 h_u32_to_be(a, address);
244 out_fields[0].in_value = NULL;
245
246 struct scan_field in_fields[1];
247 uint8_t d[1];
248
249 in_fields[0].num_bits = 8;
250 in_fields[0].out_value = NULL;
251 in_fields[0].in_value = d;
252
253 int retval = esirisc_jtag_send_and_recv(jtag_info, DEBUG_READ_BYTE,
254 ARRAY_SIZE(out_fields), out_fields, ARRAY_SIZE(in_fields), in_fields);
255 if (retval != ERROR_OK)
256 return retval;
257
258 *data = *d;
259 LOG_DEBUG("address: 0x%" PRIx32 ", data: 0x%" PRIx8, address, *data);
260
261 return ERROR_OK;
262 }
263
264 int esirisc_jtag_read_hword(struct esirisc_jtag *jtag_info, uint32_t address, uint16_t *data)
265 {
266 struct scan_field out_fields[1];
267 uint8_t a[4];
268
269 out_fields[0].num_bits = 32;
270 out_fields[0].out_value = a;
271 h_u32_to_be(a, address);
272 out_fields[0].in_value = NULL;
273
274 struct scan_field in_fields[1];
275 uint8_t d[2];
276
277 in_fields[0].num_bits = 16;
278 in_fields[0].out_value = NULL;
279 in_fields[0].in_value = d;
280
281 int retval = esirisc_jtag_send_and_recv(jtag_info, DEBUG_READ_HWORD,
282 ARRAY_SIZE(out_fields), out_fields, ARRAY_SIZE(in_fields), in_fields);
283 if (retval != ERROR_OK)
284 return retval;
285
286 *data = le_to_h_u16(d);
287 LOG_DEBUG("address: 0x%" PRIx32 ", data: 0x%" PRIx16, address, *data);
288
289 return ERROR_OK;
290 }
291
292 int esirisc_jtag_read_word(struct esirisc_jtag *jtag_info, uint32_t address, uint32_t *data)
293 {
294 struct scan_field out_fields[1];
295 uint8_t a[4];
296
297 out_fields[0].num_bits = 32;
298 out_fields[0].out_value = a;
299 h_u32_to_be(a, address);
300 out_fields[0].in_value = NULL;
301
302 struct scan_field in_fields[1];
303 uint8_t d[4];
304
305 in_fields[0].num_bits = 32;
306 in_fields[0].out_value = NULL;
307 in_fields[0].in_value = d;
308
309 int retval = esirisc_jtag_send_and_recv(jtag_info, DEBUG_READ_WORD,
310 ARRAY_SIZE(out_fields), out_fields, ARRAY_SIZE(in_fields), in_fields);
311 if (retval != ERROR_OK)
312 return retval;
313
314 *data = le_to_h_u32(d);
315 LOG_DEBUG("address: 0x%" PRIx32 ", data: 0x%" PRIx32, address, *data);
316
317 return ERROR_OK;
318 }
319
320 int esirisc_jtag_write_byte(struct esirisc_jtag *jtag_info, uint32_t address, uint8_t data)
321 {
322 struct scan_field out_fields[2];
323 uint8_t a[4];
324
325 LOG_DEBUG("address: 0x%" PRIx32 ", data: 0x%" PRIx8, address, data);
326
327 out_fields[0].num_bits = 32;
328 out_fields[0].out_value = a;
329 h_u32_to_be(a, address);
330 out_fields[0].in_value = NULL;
331
332 out_fields[1].num_bits = 8;
333 out_fields[1].out_value = &data;
334 out_fields[1].in_value = NULL;
335
336 return esirisc_jtag_send_and_recv(jtag_info, DEBUG_WRITE_BYTE,
337 ARRAY_SIZE(out_fields), out_fields, 0, NULL);
338 }
339
340 int esirisc_jtag_write_hword(struct esirisc_jtag *jtag_info, uint32_t address, uint16_t data)
341 {
342 struct scan_field out_fields[2];
343 uint8_t a[4], d[2];
344
345 LOG_DEBUG("address: 0x%" PRIx32 ", data: 0x%" PRIx16, address, data);
346
347 out_fields[0].num_bits = 32;
348 out_fields[0].out_value = a;
349 h_u32_to_be(a, address);
350 out_fields[0].in_value = NULL;
351
352 out_fields[1].num_bits = 16;
353 out_fields[1].out_value = d;
354 h_u16_to_be(d, data);
355 out_fields[1].in_value = NULL;
356
357 return esirisc_jtag_send_and_recv(jtag_info, DEBUG_WRITE_HWORD,
358 ARRAY_SIZE(out_fields), out_fields, 0, NULL);
359 }
360
361 int esirisc_jtag_write_word(struct esirisc_jtag *jtag_info, uint32_t address, uint32_t data)
362 {
363 struct scan_field out_fields[2];
364 uint8_t a[4], d[4];
365
366 LOG_DEBUG("address: 0x%" PRIx32 ", data: 0x%" PRIx32, address, data);
367
368 out_fields[0].num_bits = 32;
369 out_fields[0].out_value = a;
370 h_u32_to_be(a, address);
371 out_fields[0].in_value = NULL;
372
373 out_fields[1].num_bits = 32;
374 out_fields[1].out_value = d;
375 h_u32_to_be(d, data);
376 out_fields[1].in_value = NULL;
377
378 return esirisc_jtag_send_and_recv(jtag_info, DEBUG_WRITE_WORD,
379 ARRAY_SIZE(out_fields), out_fields, 0, NULL);
380 }
381
382 int esirisc_jtag_read_reg(struct esirisc_jtag *jtag_info, uint8_t reg, uint32_t *data)
383 {
384 struct scan_field out_fields[1];
385
386 out_fields[0].num_bits = 8;
387 out_fields[0].out_value = &reg;
388 out_fields[0].in_value = NULL;
389
390 struct scan_field in_fields[1];
391 uint8_t d[4];
392
393 in_fields[0].num_bits = 32;
394 in_fields[0].out_value = NULL;
395 in_fields[0].in_value = d;
396
397 int retval = esirisc_jtag_send_and_recv(jtag_info, DEBUG_READ_REG,
398 ARRAY_SIZE(out_fields), out_fields, ARRAY_SIZE(in_fields), in_fields);
399 if (retval != ERROR_OK)
400 return retval;
401
402 *data = le_to_h_u32(d);
403 LOG_DEBUG("register: 0x%" PRIx8 ", data: 0x%" PRIx32, reg, *data);
404
405 return ERROR_OK;
406 }
407
408 int esirisc_jtag_write_reg(struct esirisc_jtag *jtag_info, uint8_t reg, uint32_t data)
409 {
410 struct scan_field out_fields[2];
411 uint8_t d[4];
412
413 LOG_DEBUG("register: 0x%" PRIx8 ", data: 0x%" PRIx32, reg, data);
414
415 out_fields[0].num_bits = 8;
416 out_fields[0].out_value = &reg;
417 out_fields[0].in_value = NULL;
418
419 out_fields[1].num_bits = 32;
420 out_fields[1].out_value = d;
421 h_u32_to_be(d, data);
422 out_fields[1].in_value = NULL;
423
424 return esirisc_jtag_send_and_recv(jtag_info, DEBUG_WRITE_REG,
425 ARRAY_SIZE(out_fields), out_fields, 0, NULL);
426 }
427
428 int esirisc_jtag_read_csr(struct esirisc_jtag *jtag_info, uint8_t bank, uint8_t csr, uint32_t *data)
429 {
430 struct scan_field out_fields[1];
431 uint8_t c[2];
432
433 out_fields[0].num_bits = 16;
434 out_fields[0].out_value = c;
435 h_u16_to_be(c, (csr << 5) | bank);
436 out_fields[0].in_value = NULL;
437
438 struct scan_field in_fields[1];
439 uint8_t d[4];
440
441 in_fields[0].num_bits = 32;
442 in_fields[0].out_value = NULL;
443 in_fields[0].in_value = d;
444
445 int retval = esirisc_jtag_send_and_recv(jtag_info, DEBUG_READ_CSR,
446 ARRAY_SIZE(out_fields), out_fields, ARRAY_SIZE(in_fields), in_fields);
447 if (retval != ERROR_OK)
448 return retval;
449
450 *data = le_to_h_u32(d);
451 LOG_DEBUG("bank: 0x%" PRIx8 ", csr: 0x%" PRIx8 ", data: 0x%" PRIx32, bank, csr, *data);
452
453 return ERROR_OK;
454 }
455
456 int esirisc_jtag_write_csr(struct esirisc_jtag *jtag_info, uint8_t bank, uint8_t csr, uint32_t data)
457 {
458 struct scan_field out_fields[2];
459 uint8_t c[2], d[4];
460
461 LOG_DEBUG("bank: 0x%" PRIx8 ", csr: 0x%" PRIx8 ", data: 0x%" PRIx32, bank, csr, data);
462
463 out_fields[0].num_bits = 16;
464 out_fields[0].out_value = c;
465 h_u16_to_be(c, (csr << 5) | bank);
466 out_fields[0].in_value = NULL;
467
468 out_fields[1].num_bits = 32;
469 out_fields[1].out_value = d;
470 h_u32_to_be(d, data);
471 out_fields[1].in_value = NULL;
472
473 return esirisc_jtag_send_and_recv(jtag_info, DEBUG_WRITE_CSR,
474 ARRAY_SIZE(out_fields), out_fields, 0, NULL);
475 }
476
477 /*
478 * Control commands affect CPU operation; these commands send no data
479 * and return a status byte.
480 */
481
482 static inline int esirisc_jtag_send_ctrl(struct esirisc_jtag *jtag_info, uint8_t command)
483 {
484 return esirisc_jtag_send_and_recv(jtag_info, command, 0, NULL, 0, NULL);
485 }
486
487 int esirisc_jtag_enable_debug(struct esirisc_jtag *jtag_info)
488 {
489 return esirisc_jtag_send_ctrl(jtag_info, DEBUG_ENABLE_DEBUG);
490 }
491
492 int esirisc_jtag_disable_debug(struct esirisc_jtag *jtag_info)
493 {
494 return esirisc_jtag_send_ctrl(jtag_info, DEBUG_DISABLE_DEBUG);
495 }
496
497 int esirisc_jtag_assert_reset(struct esirisc_jtag *jtag_info)
498 {
499 return esirisc_jtag_send_ctrl(jtag_info, DEBUG_ASSERT_RESET);
500 }
501
502 int esirisc_jtag_deassert_reset(struct esirisc_jtag *jtag_info)
503 {
504 return esirisc_jtag_send_ctrl(jtag_info, DEBUG_DEASSERT_RESET);
505 }
506
507 int esirisc_jtag_break(struct esirisc_jtag *jtag_info)
508 {
509 return esirisc_jtag_send_ctrl(jtag_info, DEBUG_BREAK);
510 }
511
512 int esirisc_jtag_continue(struct esirisc_jtag *jtag_info)
513 {
514 return esirisc_jtag_send_ctrl(jtag_info, DEBUG_CONTINUE);
515 }
516
517 int esirisc_jtag_flush_caches(struct esirisc_jtag *jtag_info)
518 {
519 return esirisc_jtag_send_ctrl(jtag_info, DEBUG_FLUSH_CACHES);
520 }

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