src/target/nds32_aice.h

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2
   3 /***************************************************************************
   4  *   Copyright (C) 2013 Andes technology.                                  *
   5  *   Hsiangkai Wang <hkwang@andestech.com>                                 *
   6  ***************************************************************************/
   7
   8 #ifndef OPENOCD_TARGET_NDS32_AICE_H
   9 #define OPENOCD_TARGET_NDS32_AICE_H
  10
  11 #include <jtag/aice/aice_port.h>
  12
  13 int aice_read_reg_64(struct aice_port_s *aice, uint32_t num, uint64_t *val);
  14 int aice_write_reg_64(struct aice_port_s *aice, uint32_t num, uint64_t val);
  15 int aice_read_tlb(struct aice_port_s *aice, target_addr_t virtual_address,
  16                 target_addr_t *physical_address);
  17 int aice_cache_ctl(struct aice_port_s *aice, uint32_t subtype, uint32_t address);
  18 int aice_set_retry_times(struct aice_port_s *aice, uint32_t a_retry_times);
  19 int aice_program_edm(struct aice_port_s *aice, char *command_sequence);
  20 int aice_set_command_mode(struct aice_port_s *aice,
  21                 enum aice_command_mode command_mode);
  22 int aice_execute(struct aice_port_s *aice, uint32_t *instructions,
  23                 uint32_t instruction_num);
  24 int aice_set_custom_srst_script(struct aice_port_s *aice, const char *script);
  25 int aice_set_custom_trst_script(struct aice_port_s *aice, const char *script);
  26 int aice_set_custom_restart_script(struct aice_port_s *aice, const char *script);
  27 int aice_set_count_to_check_dbger(struct aice_port_s *aice, uint32_t count_to_check);
  28 int aice_profiling(struct aice_port_s *aice, uint32_t interval, uint32_t iteration,
  29                 uint32_t reg_no, uint32_t *samples, uint32_t *num_samples);
  30
  31 static inline int aice_open(struct aice_port_s *aice, struct aice_port_param_s *param)
  32 {
  33         return aice->port->api->open(param);
  34 }
  35
  36 static inline int aice_close(struct aice_port_s *aice)
  37 {
  38         return aice->port->api->close();
  39 }
  40
  41 static inline int aice_reset(struct aice_port_s *aice)
  42 {
  43         return aice->port->api->reset();
  44 }
  45
  46 static inline int aice_assert_srst(struct aice_port_s *aice,
  47                 enum aice_srst_type_s srst)
  48 {
  49         return aice->port->api->assert_srst(aice->coreid, srst);
  50 }
  51
  52 static inline int aice_run(struct aice_port_s *aice)
  53 {
  54         return aice->port->api->run(aice->coreid);
  55 }
  56
  57 static inline int aice_halt(struct aice_port_s *aice)
  58 {
  59         return aice->port->api->halt(aice->coreid);
  60 }
  61
  62 static inline int aice_step(struct aice_port_s *aice)
  63 {
  64         return aice->port->api->step(aice->coreid);
  65 }
  66
  67 static inline int aice_read_register(struct aice_port_s *aice, uint32_t num,
  68                 uint32_t *val)
  69 {
  70         return aice->port->api->read_reg(aice->coreid, num, val);
  71 }
  72
  73 static inline int aice_write_register(struct aice_port_s *aice, uint32_t num,
  74                 uint32_t val)
  75 {
  76         return aice->port->api->write_reg(aice->coreid, num, val);
  77 }
  78
  79 static inline int aice_read_debug_reg(struct aice_port_s *aice, uint32_t addr,
  80                 uint32_t *val)
  81 {
  82         return aice->port->api->read_debug_reg(aice->coreid, addr, val);
  83 }
  84
  85 static inline int aice_write_debug_reg(struct aice_port_s *aice, uint32_t addr,
  86                 const uint32_t val)
  87 {
  88         return aice->port->api->write_debug_reg(aice->coreid, addr, val);
  89 }
  90
  91 static inline int aice_read_mem_unit(struct aice_port_s *aice, uint32_t addr,
  92                 uint32_t size, uint32_t count, uint8_t *buffer)
  93 {
  94         return aice->port->api->read_mem_unit(aice->coreid, addr, size, count, buffer);
  95 }
  96
  97 static inline int aice_write_mem_unit(struct aice_port_s *aice, uint32_t addr,
  98                 uint32_t size, uint32_t count, const uint8_t *buffer)
  99 {
 100         return aice->port->api->write_mem_unit(aice->coreid, addr, size, count, buffer);
 101 }
 102
 103 static inline int aice_read_mem_bulk(struct aice_port_s *aice, uint32_t addr,
 104                 uint32_t length, uint8_t *buffer)
 105 {
 106         return aice->port->api->read_mem_bulk(aice->coreid, addr, length, buffer);
 107 }
 108
 109 static inline int aice_write_mem_bulk(struct aice_port_s *aice, uint32_t addr,
 110                 uint32_t length, const uint8_t *buffer)
 111 {
 112         return aice->port->api->write_mem_bulk(aice->coreid, addr, length, buffer);
 113 }
 114
 115 static inline int aice_idcode(struct aice_port_s *aice, uint32_t *idcode,
 116                 uint8_t *num_of_idcode)
 117 {
 118         return aice->port->api->idcode(idcode, num_of_idcode);
 119 }
 120
 121 static inline int aice_state(struct aice_port_s *aice,
 122                 enum aice_target_state_s *state)
 123 {
 124         return aice->port->api->state(aice->coreid, state);
 125 }
 126
 127 static inline int aice_set_jtag_clock(struct aice_port_s *aice, uint32_t a_clock)
 128 {
 129         return aice->port->api->set_jtag_clock(a_clock);
 130 }
 131
 132 static inline int aice_memory_access(struct aice_port_s *aice,
 133                 enum nds_memory_access a_access)
 134 {
 135         return aice->port->api->memory_access(aice->coreid, a_access);
 136 }
 137
 138 static inline int aice_memory_mode(struct aice_port_s *aice,
 139                 enum nds_memory_select mem_select)
 140 {
 141         return aice->port->api->memory_mode(aice->coreid, mem_select);
 142 }
 143
 144 static inline int aice_set_data_endian(struct aice_port_s *aice,
 145                 enum aice_target_endian target_data_endian)
 146 {
 147         return aice->port->api->set_data_endian(aice->coreid, target_data_endian);
 148 }
 149
 150 #endif /* OPENOCD_TARGET_NDS32_AICE_H */