1 jtag_device 5 0x1 0x1f 0x1e
4 target xscale little reset_init 0 pxa255
5 reset_config trst_and_srst
8 target_script 0 reset /ram/pxa255.init
10 #xscale debug_handler 0 0xFFFF0800 # debug handler base address
12 trunc /ram/pxa255.init
13 append /ram/pxa255.init #configuration file for PXA250 Evaluation Board
14 append /ram/pxa255.init # -----------------------------------------------------
15 append /ram/pxa255.init #
16 append /ram/pxa255.init xscale cp15 15 0x00002001 #Enable CP0 and CP13 access
17 append /ram/pxa255.init #
18 append /ram/pxa255.init # setup GPIO
19 append /ram/pxa255.init #
20 append /ram/pxa255.init mww 0x40E00018 0x00008000 #CPSR0
21 append /ram/pxa255.init sleep 20
22 append /ram/pxa255.init mww 0x40E0001C 0x00000002 #GPSR1
23 append /ram/pxa255.init sleep 20
24 append /ram/pxa255.init mww 0x40E00020 0x00000008 #GPSR2
25 append /ram/pxa255.init sleep 20
26 append /ram/pxa255.init mww 0x40E0000C 0x00008000 #GPDR0
27 append /ram/pxa255.init sleep 20
28 append /ram/pxa255.init mww 0x40E00054 0x80000000 #GAFR0_L
29 append /ram/pxa255.init sleep 20
30 append /ram/pxa255.init mww 0x40E00058 0x00188010 #GAFR0_H
31 append /ram/pxa255.init sleep 20
32 append /ram/pxa255.init mww 0x40E0005C 0x60908018 #GAFR1_L
33 append /ram/pxa255.init sleep 20
34 append /ram/pxa255.init mww 0x40E0000C 0x0280E000 #GPDR0
35 append /ram/pxa255.init sleep 20
36 append /ram/pxa255.init mww 0x40E00010 0x821C88B2 #GPDR1
37 append /ram/pxa255.init sleep 20
38 append /ram/pxa255.init mww 0x40E00014 0x000F03DB #GPDR2
39 append /ram/pxa255.init sleep 20
40 append /ram/pxa255.init mww 0x40E00000 0x000F03DB #GPLR0
41 append /ram/pxa255.init sleep 20
42 append /ram/pxa255.init
43 append /ram/pxa255.init
44 append /ram/pxa255.init mww 0x40F00004 0x00000020 #PSSR
45 append /ram/pxa255.init sleep 20
46 append /ram/pxa255.init
47 append /ram/pxa255.init #
48 append /ram/pxa255.init # setup memory controller
49 append /ram/pxa255.init #
50 append /ram/pxa255.init mww 0x48000008 0x01111998 #MSC0
51 append /ram/pxa255.init sleep 20
52 append /ram/pxa255.init mww 0x48000010 0x00047ff0 #MSC2
53 append /ram/pxa255.init sleep 20
54 append /ram/pxa255.init mww 0x48000014 0x00000000 #MECR
55 append /ram/pxa255.init sleep 20
56 append /ram/pxa255.init mww 0x48000028 0x00010504 #MCMEM0
57 append /ram/pxa255.init sleep 20
58 append /ram/pxa255.init mww 0x4800002C 0x00010504 #MCMEM1
59 append /ram/pxa255.init sleep 20
60 append /ram/pxa255.init mww 0x48000030 0x00010504 #MCATT0
61 append /ram/pxa255.init sleep 20
62 append /ram/pxa255.init mww 0x48000034 0x00010504 #MCATT1
63 append /ram/pxa255.init sleep 20
64 append /ram/pxa255.init mww 0x48000038 0x00004715 #MCIO0
65 append /ram/pxa255.init sleep 20
66 append /ram/pxa255.init mww 0x4800003C 0x00004715 #MCIO1
67 append /ram/pxa255.init sleep 20
68 append /ram/pxa255.init #
69 append /ram/pxa255.init mww 0x48000004 0x03CA4018 #MDREF
70 append /ram/pxa255.init sleep 20
71 append /ram/pxa255.init mww 0x48000004 0x004B4018 #MDREF
72 append /ram/pxa255.init sleep 20
73 append /ram/pxa255.init mww 0x48000004 0x000B4018 #MDREF
74 append /ram/pxa255.init sleep 20
75 append /ram/pxa255.init mww 0x48000004 0x000BC018 #MDREF
76 append /ram/pxa255.init sleep 20
77 append /ram/pxa255.init mww 0x48000000 0x00001AC8 #MDCNFG
78 append /ram/pxa255.init sleep 20
79 append /ram/pxa255.init
80 append /ram/pxa255.init sleep 20
81 append /ram/pxa255.init
82 append /ram/pxa255.init mww 0x48000000 0x00001AC9 #MDCNFG
83 append /ram/pxa255.init sleep 20
84 append /ram/pxa255.init mww 0x48000040 0x00000000 #MDMRS
85 append /ram/pxa255.init sleep 20
86 append /ram/pxa255.init