jtag: linuxgpiod: drop extra parenthesis
[openocd.git] / tcl / board / at91rm9200-dk.cfg
1 # SPDX-License-Identifier: GPL-2.0-or-later
2
3 #
4 # This is for the "at91rm9200-DK" (not the EK) eval board.
5 #
6 # The two are probably very simular.... I have DK...
7 #
8 # It has atmel at91rm9200 chip.
9 source [find target/at91rm9200.cfg]
10
11 reset_config trst_and_srst
12
13 $_TARGETNAME configure -event gdb-attach { reset init }
14 $_TARGETNAME configure -event reset-init { at91rm9200_dk_init }
15
16 #flash bank <name> <driver> <base> <size> <chip_width> <bus_width> <target>
17 set _FLASHNAME $_CHIPNAME.flash
18 flash bank $_FLASHNAME cfi 0x10000000 0x00200000 2 2 $_TARGETNAME
19
20
21 proc at91rm9200_dk_init { } {
22 # Try to run at 1khz... Yea, that slow!
23 # Chip is really running @ 32khz
24 adapter speed 8
25
26 mww 0xfffffc64 0xffffffff
27 ## disable all clocks but system clock
28 mww 0xfffffc04 0xfffffffe
29 ## disable all clocks to pioa and piob
30 mww 0xfffffc14 0xffffffc3
31 ## master clock = slow cpu = slow
32 ## (means the CPU is running at 32khz!)
33 mww 0xfffffc30 0
34 ## main osc enable
35 mww 0xfffffc20 0x0000ff01
36 ## program pllA
37 mww 0xfffffc28 0x20263e04
38 ## program pllB
39 mww 0xfffffc2c 0x10483e0e
40 ## let pll settle... sleep 100msec
41 sleep 100
42 ## switch to fast clock
43 mww 0xfffffc30 0x202
44 ## Sleep some - (go read)
45 sleep 100
46
47 #========================================
48 # CPU now runs at 180mhz
49 # SYS runs at 60mhz.
50 adapter speed 40000
51 #========================================
52
53
54 ## set memc for all memories
55 mww 0xffffff60 0x02
56 ## program smc controller
57 mww 0xffffff70 0x3284
58 ## init sdram
59 mww 0xffffff98 0x7fffffd0
60 ## all banks precharge
61 mww 0xffffff80 0x02
62 ## touch sdram chip to make it work
63 mww 0x20000000 0
64 ## sdram controller mode register
65 mww 0xffffff90 0x04
66 mww 0x20000000 0
67 mww 0x20000000 0
68 mww 0x20000000 0
69 mww 0x20000000 0
70 mww 0x20000000 0
71 mww 0x20000000 0
72 mww 0x20000000 0
73 mww 0x20000000 0
74 ## sdram controller mode register
75 ## Refresh, etc....
76 mww 0xffffff90 0x03
77 mww 0x20000080 0
78 mww 0xffffff94 0x1f4
79 mww 0x20000080 0
80 mww 0xffffff90 0x10
81 mww 0x20000000 0
82 mww 0xffffff00 0x01
83
84 }

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