tcl/board/imx27lnst.cfg

   1 # SPDX-License-Identifier: GPL-2.0-or-later
   2
   3 # The Linuxstamp-mx27 is board has a single IMX27 chip
   4 # For further info see http://opencircuits.com/Linuxstamp_mx27#OpenOCD
   5 source [find target/imx27.cfg]
   6 $_TARGETNAME configure -event gdb-attach { reset init }
   7 $_TARGETNAME configure -event reset-init { imx27lnst_init }
   8
   9 proc imx27lnst_init { } {
  10         # This setup puts RAM at 0xA0000000
  11
  12         # reset the board correctly
  13         adapter speed 500
  14         reset run
  15         reset halt
  16
  17         mww 0x10000000 0x20040304
  18         mww 0x10020000 0x00000000
  19         mww 0x10000004 0xDFFBFCFB
  20         mww 0x10020004 0xFFFFFFFF
  21
  22         sleep 100
  23
  24         # ========================================
  25         #  Configure DDR on CSD0 -- initial reset
  26         # ========================================
  27         mww 0xD8001010 0x00000008
  28
  29         sleep 100
  30
  31         # ========================================
  32         #  Configure DDR on CSD0 -- wait 5000 cycle
  33         # ========================================
  34         mww 0x10027828 0x55555555
  35         mww 0x10027830 0x55555555
  36         mww 0x10027834 0x55555555
  37         mww 0x10027838 0x00005005
  38         mww 0x1002783C 0x15555555
  39
  40         mww 0xD8001010 0x00000004
  41
  42         mww 0xD8001004 0x00795729
  43
  44         #mww 0xD8001000 0x92200000
  45         mww 0xD8001000 0x91120000
  46         mww 0xA0000F00 0x0
  47
  48         #mww 0xD8001000 0xA2200000
  49         mww 0xD8001000 0xA1120000
  50         mww 0xA0000F00 0x0
  51         mww 0xA0000F00 0x0
  52
  53         #mww 0xD8001000 0xB2200000
  54         mww 0xD8001000 0xB1120000
  55         mwb 0xA0000033 0xFF
  56         mwb 0xA1000000 0xAA
  57
  58         #mww 0xD8001000 0x82228085
  59         mww 0xD8001000 0x81128080
  60
  61 }