tcl/board/mcb1700.cfg

   1 # SPDX-License-Identifier: GPL-2.0-or-later
   2
   3 # Keil MCB1700 PCB with 1768
   4 #
   5 # Reset init script sets it to 100MHz
   6 set CCLK 100000
   7
   8 source [find target/lpc17xx.cfg]
   9
  10 global MCB1700_CCLK
  11 set MCB1700_CCLK $CCLK
  12
  13 $_TARGETNAME configure -event reset-start {
  14         # Start *real slow* as we do not know the
  15     # state the boot rom left the clock in
  16         adapter speed 10
  17 }
  18
  19 # Set up 100MHz clock to CPU
  20 $_TARGETNAME configure -event reset-init {
  21     # PLL0CON: Disable PLL
  22         mww 0x400FC080 0x00000000
  23     # PLLFEED
  24         mww 0x400FC08C 0x000000AA
  25     # PLLFEED
  26         mww 0x400FC08C 0x00000055
  27
  28     # CCLK=PLL/4 (=100 MHz)
  29         mww 0x400FC104 0x00000003
  30     # CLKSRCSEL: Clock source = internal RC oscillator
  31         mww 0x400FC10C 0x00000000
  32
  33     # PLL0CFG: M=50,N=1 -> PLL=400 MHz
  34         mww 0x400FC084 0x00000031
  35     # PLLFEED
  36         mww 0x400FC08C 0x000000AA
  37     # PLLFEED
  38         mww 0x400FC08C 0x00000055
  39
  40         # PLL0CON: Enable PLL
  41         mww 0x400FC080 0x00000001
  42     # PLLFEED
  43         mww 0x400FC08C 0x000000AA
  44     # PLLFEED
  45         mww 0x400FC08C 0x00000055
  46
  47         sleep 50
  48
  49     # PLL0CON: Connect PLL
  50         mww 0x400FC080 0x00000003
  51     # PLLFEED
  52         mww 0x400FC08C 0x000000AA
  53     # PLLFEED
  54         mww 0x400FC08C 0x00000055
  55
  56         # Dividing CPU clock by 8 should be pretty conservative
  57         #
  58         #
  59         global MCB1700_CCLK
  60         adapter speed [expr {$MCB1700_CCLK / 8}]
  61
  62         # Do not remap 0x0000-0x0020 to anything but the flash (i.e. select
  63         # "User Flash Mode" where interrupt vectors are _not_ remapped,
  64         # and reside in flash instead).
  65         #
  66         # See Table 612. Memory Mapping Control register (MEMMAP - 0x400F C040) bit description
  67         # Bit Symbol Value Description Reset
  68         # value
  69         # 0 MAP Memory map control. 0
  70         # 0 Boot mode. A portion of the Boot ROM is mapped to address 0.
  71         # 1 User mode. The on-chip Flash memory is mapped to address 0.
  72         # 31:1 - Reserved. The value read from a reserved bit is not defined. NA
  73         #
  74         # http://ics.nxp.com/support/documents/microcontrollers/?scope=LPC1768&type=user
  75
  76         mww 0x400FC040 0x01
  77 }