tcl/board/numato_mimas_a7.cfg

   1 # SPDX-License-Identifier: GPL-2.0-or-later
   2
   3 #
   4 # Numato Mimas A7 - Artix 7 FPGA Board
   5 #
   6 # https://numato.com/product/mimas-a7-artix-7-fpga-development-board-with-ddr-sdram-and-gigabit-ethernet
   7 #
   8 # Note: Connect external DC power supply if programming a heavy design onto FPGA.
   9 #       Programming while powering via USB may lead to programming failure.
  10 #       Therefore, prefer external power supply.
  11
  12 adapter driver ftdi
  13 ftdi device_desc "Mimas Artix 7 FPGA Module"
  14 ftdi vid_pid 0x2a19 0x1009
  15
  16 # channel 0 is for custom purpose by users (like uart, fifo etc)
  17 # channel 1 is reserved for JTAG (by-default) or SPI (possible via changing solder jumpers)
  18 ftdi channel 1
  19 ftdi tdo_sample_edge falling
  20
  21
  22 # FTDI Pin Layout
  23 #
  24 # +--------+-------+-------+-------+-------+-------+-------+-------+
  25 # | DBUS7  | DBUS6 | DBUS5 | DBUS4 | DBUS3 | DBUS2 | DBUS1 | DBUS0 |
  26 # +--------+-------+-------+-------+-------+-------+-------+-------+
  27 # | PROG_B | OE_N  |  NC   |  NC   |  TMS  |  TDO  |  TDI  |  TCK  |
  28 # +--------+-------+-------+-------+-------+-------+-------+-------+
  29 #
  30 # OE_N is JTAG buffer output enable signal (active-low)
  31 # PROG_B is not used, so left as input to FTDI.
  32 #
  33 ftdi layout_init 0x0008 0x004b
  34 reset_config none
  35 adapter speed 30000
  36
  37 source [find cpld/xilinx-xc7.cfg]
  38 source [find cpld/jtagspi.cfg]