tcl/board/phytec_lpc3250.cfg

   1 # SPDX-License-Identifier: GPL-2.0-or-later
   2
   3 source [find target/lpc3250.cfg]
   4
   5 adapter srst delay 200
   6 jtag_ntrst_delay 1
   7 adapter speed 200
   8 reset_config trst_and_srst separate
   9
  10 arm7_9 dcc_downloads enable
  11
  12 $_TARGETNAME configure -event gdb-attach { reset init }
  13
  14 $_TARGETNAME configure -event reset-start {
  15              arm7_9 fast_memory_access disable
  16              adapter speed 200
  17 }
  18
  19 $_TARGETNAME configure -event reset-end {
  20              adapter speed 6000
  21              arm7_9 fast_memory_access enable
  22 }
  23
  24 $_TARGETNAME configure -event reset-init { phytec_lpc3250_init }
  25
  26 # Bare-bones initialization of core clocks and SDRAM
  27 proc phytec_lpc3250_init { } {
  28         # Set clock dividers
  29         #   ARMCLK = 266.5 MHz
  30         #   HCLK   = 133.25 MHz
  31         #   PERIPHCLK = 13.325 MHz
  32         mww 0x400040BC 0
  33         mww 0x40004050 0x140
  34         mww 0x40004040 0x4D
  35         mww 0x40004058 0x16250
  36
  37         # Init PLLs
  38         mww 0x40004044 0x006
  39         sleep 1 busy
  40         mww 0x40004044 0x106
  41         sleep 1 busy
  42         mww 0x40004044 0x006
  43         sleep 1 busy
  44         mww 0x40004048 0x2
  45
  46         # Init SDRAM with 133 MHz timings
  47         mww 0x40028134 0x00FFFFFF
  48         mww 0x4002802C 0x00000008
  49
  50         mww 0x31080000 1
  51         mww 0x31080008 0
  52         mww 0x40004068 0x1C000
  53         mww 0x31080028 0x11
  54
  55         mww 0x31080400 0
  56         mww 0x31080440 0
  57         mww 0x31080460 0
  58         mww 0x31080480 0
  59
  60         # Delays
  61         mww 0x31080030 1
  62         mww 0x31080034 6
  63         mww 0x31080038 10
  64         mww 0x31080044 1
  65         mww 0x31080048 9
  66         mww 0x3108004C 12
  67         mww 0x31080050 10
  68         mww 0x31080054 1
  69         mww 0x31080058 1
  70         mww 0x3108005C 0
  71
  72         mww 0x31080100 0x5680
  73         mww 0x31080104 0x302
  74
  75         # Init sequence
  76         mww 0x31080020 0x193
  77         sleep 1 busy
  78         mww 0x31080024 1
  79         mww 0x31080020 0x113
  80         sleep 1 busy
  81         mww 0x31080020 0x013
  82         sleep 1 busy
  83         mww 0x31080024 65
  84         mww 0x31080020 0x093
  85         mdw 0x80020000
  86         mww 0x31080020 0x013
  87
  88         # SYS_CTRL remapping
  89         mww 0x40004014 1
  90 }