jtag: linuxgpiod: drop extra parenthesis
[openocd.git] / tcl / board / stm3210e_eval.cfg
1 # SPDX-License-Identifier: GPL-2.0-or-later
2
3 # This is an STM32 eval board with a single STM32F103ZET6 chip.
4 # http://www.st.com/internet/evalboard/product/204176.jsp
5
6 # increase working area to 32KB for faster flash programming
7 set WORKAREASIZE 0x8000
8
9 source [find target/stm32f1x.cfg]
10
11 #
12 # configure FSMC Bank 1 (NOR/PSRAM Bank 2) NOR flash
13 # M29W128GL70ZA6E
14 #
15
16 set _FLASHNAME $_CHIPNAME.norflash
17 flash bank $_FLASHNAME cfi 0x64000000 0x01000000 2 2 $_TARGETNAME
18
19 proc stm32_enable_fsmc {} {
20
21 echo "Enabling FSMC Bank 1 (NOR/PSRAM Bank 2)"
22
23 # enable gpio (defg) clocks for fsmc
24 # RCC_APB2ENR
25 mww 0x40021018 0x000001E0
26
27 # enable fsmc clock
28 # RCC_AHBENR
29 mww 0x40021014 0x00000114
30
31 # configure gpio to alternate function
32 # GPIOD_CRL
33 mww 0x40011400 0x44BB44BB
34 # GPIOD_CRH
35 mww 0x40011404 0xBBBBBBBB
36
37 # GPIOE_CRL
38 mww 0x40011800 0xBBBBB444
39 # GPIOE_CRH
40 mww 0x40011804 0xBBBBBBBB
41
42 # GPIOF_CRL
43 mww 0x40011C00 0x44BBBBBB
44 # GPIOF_CRH
45 mww 0x40011C04 0xBBBB4444
46
47 # GPIOG_CRL
48 mww 0x40012000 0x44BBBBBB
49 # GPIOG_CRH
50 mww 0x40012004 0x444444B4
51
52 # setup fsmc timings
53 # FSMC_BCR1
54 mww 0xA0000008 0x00001058
55
56 # FSMC_BTR1
57 mww 0xA000000C 0x10000502
58
59 # FSMC_BCR1 - enable fsmc
60 mww 0xA0000008 0x00001059
61 }
62
63 $_TARGETNAME configure -event reset-init {
64 stm32_enable_fsmc
65 }

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