jtag: linuxgpiod: drop extra parenthesis
[openocd.git] / tcl / board / uptech_2410.cfg
1 # SPDX-License-Identifier: GPL-2.0-or-later
2
3 # Target Configuration for the Uptech 2410 board.
4 # This configuration should also work on smdk2410, but I haven't tested it yet.
5 # Author: xionglingfeng@Gmail.com
6
7 source [find target/samsung_s3c2410.cfg]
8
9 $_TARGETNAME configure -event reset-init { uptech2410_init }
10 $_TARGETNAME configure -event gdb-attach { reset init }
11
12 proc init_pll_sdram { } {
13 #echo "---------- Initializing PLL and SDRAM ---------"
14 #watchdog timer disable
15 mww phys 0x53000000 0x00000000
16
17 #disable all interrupts
18 mww phys 0x4a000008 0xffffffff
19
20 #disable all sub-interrupts
21 mww phys 0x4a00001c 0x000007ff
22
23 #clear all source pending bits
24 mww phys 0x4a000000 0xffffffff
25
26 #clear all sub-source pending bits
27 mww phys 0x4a000018 0x000007ff
28
29 #clear interrupt pending bit
30 mww phys 0x4a000010 0xffffffff
31
32 #PLL locktime counter
33 mww phys 0x4c000000 0x00ffffff
34
35 #Fin=12MHz Fout=202.8MHz
36 #mww phys 0x4c000004 0x000a1031
37
38 #FCLK:HCLK:PCLK = 1:2:4
39 mww phys 0x4c000014 0x00000003
40
41
42 mww phys 0x48000000 0x11111110
43 mww phys 0x48000004 0x00007FFC
44 mww phys 0x48000008 0x00007FFC
45 mww phys 0x4800000c 0x00000700
46 mww phys 0x48000010 0x00000700
47 mww phys 0x48000014 0x00002E50
48 mww phys 0x48000018 0x00002E50
49 mww phys 0x4800001c 0x00018005
50 mww phys 0x48000020 0x00018005
51 mww phys 0x48000024 0x008c04e9
52 mww phys 0x48000028 0x000000b2
53 mww phys 0x4800002c 0x00000030
54 mww phys 0x48000030 0x00000030
55 }
56
57 proc uptech2410_init { } {
58 init_pll_sdram
59 #echo "---------- Probing Nand flash ----------"
60 nand probe 0
61 #echo "---------- Enable some functions ----------"
62 }
63
64 set _NANDNAME $_CHIPNAME.nand
65 nand device $_NANDNAME s3c2410 $_TARGETNAME

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