jtag: linuxgpiod: drop extra parenthesis
[openocd.git] / tcl / cpu / arc / v2.tcl
1 # Copyright (C) 2015, 2020 Synopsys, Inc.
2 # Anton Kolesov <anton.kolesov@synopsys.com>
3 # Didin Evgeniy <didin@synopsys.com>
4 #
5 # SPDX-License-Identifier: GPL-2.0-or-later
6
7 source [find cpu/arc/common.tcl]
8
9 # Currently 'examine_target' can only read JTAG registers and set properties -
10 # but it shouldn't write any of registers - writes will be cached, but cache
11 # will be invalidated before flushing after examine_target, and changes will be
12 # lost. Perhaps that would be fixed later - perhaps writes shouldn't be cached
13 # after all. But if write to register is really needed from TCL - then it
14 # should be done via "arc jtag" for now.
15 proc arc_v2_examine_target { {target ""} } {
16 # Set current target, because OpenOCD event handlers don't do this for us.
17 if { $target != "" } {
18 targets $target
19 }
20
21 # Those registers always exist. DEBUG and DEBUGI are formally optional,
22 # however they come with JTAG interface, and so far there is no way
23 # OpenOCD can communicate with target without JTAG interface.
24 arc set-reg-exists identity pc status32 bta debug lp_start lp_end \
25 eret erbta erstatus ecr efa
26
27 # 32 core registers
28 arc set-reg-exists \
29 r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 \
30 r13 r14 r15 r16 r17 r18 r19 r20 r21 r22 r23 r24 r25 \
31 gp fp sp ilink r30 blink lp_count pcl
32
33 # Actionpoints
34 if { [arc get-reg-field ap_build version] == 5 } {
35 set ap_build_type [arc get-reg-field ap_build type]
36 # AP_BUILD.TYPE > 0b0110 is reserved in current ISA.
37 # Current ISA supports up to 8 actionpoints.
38 if { $ap_build_type < 8 } {
39 # Two LSB bits of AP_BUILD.TYPE define amount of actionpoints:
40 # 0b00 - 2 actionpoints
41 # 0b01 - 4 actionpoints
42 # 0b10 - 8 actionpoints
43 # 0b11 - reserved.
44 set ap_num [expr {0x2 << ($ap_build_type & 3)}]
45 # Expression on top may produce 16 action points - which is a
46 # reserved value for now.
47 if { $ap_num < 16 } {
48 # Enable actionpoint registers
49 for {set i 0} {$i < $ap_num} {incr i} {
50 arc set-reg-exists ap_amv$i ap_amm$i ap_ac$i
51 }
52
53 # Set amount of actionpoints
54 arc num-actionpoints $ap_num
55 }
56 }
57 }
58
59 # DCCM
60 set dccm_version [arc get-reg-field dccm_build version]
61 if { $dccm_version == 3 || $dccm_version == 4 } {
62 arc set-reg-exists aux_dccm
63 }
64
65 # ICCM
66 if { [arc get-reg-field iccm_build version] == 4 } {
67 arc set-reg-exists aux_iccm
68 }
69
70 # MPU
71 if { [arc get-reg-field mpu_build version] >= 2 &&
72 [arc get-reg-field mpu_build version] <= 4 } {
73 arc set-reg-exists mpu_en mpu_ecr
74 set mpu_regions [arc get-reg-field mpu_build regions]
75 for {set i 0} {$i < $mpu_regions} {incr i} {
76 arc set-reg-exists mpu_rdp$i mpu_rdb$i
77 }
78
79 # Secure MPU
80 if { [arc get-reg-field mpu_build version] == 4 } {
81 arc set-reg-exists mpu_index mpu_rstart mpu_rend mpu_rper
82 }
83 }
84 }
85
86 proc arc_v2_init_regs { } {
87 # XML features
88 set core_feature "org.gnu.gdb.arc.core.v2"
89 set aux_min_feature "org.gnu.gdb.arc.aux-minimal"
90 set aux_other_feature "org.gnu.gdb.arc.aux-other"
91
92 # Describe types
93 # Types are sorted alphabetically according to their name.
94 arc add-reg-type-struct -name ap_build_t -bitfield version 0 7 \
95 -bitfield type 8 11
96 arc add-reg-type-struct -name ap_control_t -bitfield at 0 3 -bitfield tt 4 5 \
97 -bitfield m 6 6 -bitfield p 7 7 -bitfield aa 8 8 -bitfield q 9 9
98 # Cycles field added in version 4.
99 arc add-reg-type-struct -name dccm_build_t -bitfield version 0 7 \
100 -bitfield size0 8 11 -bitfield size1 12 15 -bitfield cycles 17 19
101
102 arc add-reg-type-struct -name debug_t \
103 -bitfield fh 1 1 -bitfield ah 2 2 -bitfield asr 3 10 \
104 -bitfield is 11 11 -bitfield ep 19 19 -bitfield ed 20 20 \
105 -bitfield eh 21 21 -bitfield ra 22 22 -bitfield zz 23 23 \
106 -bitfield sm 24 26 -bitfield ub 28 28 -bitfield bh 29 29 \
107 -bitfield sh 30 30 -bitfield ld 31 31
108
109 arc add-reg-type-struct -name ecr_t \
110 -bitfield parameter 0 7 \
111 -bitfield cause 8 15 \
112 -bitfield vector 16 23 \
113 -bitfield U 30 30 \
114 -bitfield P 31 31
115 arc add-reg-type-struct -name iccm_build_t -bitfield version 0 7 \
116 -bitfield iccm0_size0 8 11 -bitfield iccm1_size0 12 15 \
117 -bitfield iccm0_size1 16 19 -bitfield iccm1_size1 20 23
118 arc add-reg-type-struct -name identity_t \
119 -bitfield arcver 0 7 -bitfield arcnum 8 15 -bitfield chipid 16 31
120 arc add-reg-type-struct -name isa_config_t -bitfield version 0 7 \
121 -bitfield pc_size 8 11 -bitfield lpc_size 12 15 -bitfield addr_size 16 19 \
122 -bitfield b 20 20 -bitfield a 21 21 -bitfield n 22 22 -bitfield l 23 23 \
123 -bitfield c 24 27 -bitfield d 28 31
124 arc add-reg-type-struct -name mpu_build_t -bitfield version 0 7 \
125 -bitfield regions 8 15 \
126 -bitfield s 16 16 \
127 -bitfield i 17 17
128 arc add-reg-type-struct -name mpu_ecr_t \
129 -bitfield MR 0 7 \
130 -bitfield VT 8 9 \
131 -bitfield EC_CODE 16 31
132 arc add-reg-type-struct -name mpu_en_t \
133 -bitfield UE 3 3 -bitfield UW 4 4 -bitfield UR 5 5 \
134 -bitfield KE 6 6 -bitfield KW 7 7 -bitfield KR 8 8 \
135 -bitfield S 15 15 -bitfield SID 16 23 \
136 -bitfield EN 30 30
137 arc add-reg-type-struct -name mpu_index_t \
138 -bitfield I 0 3 -bitfield M 30 30 -bitfield D 31 31
139 arc add-reg-type-struct -name mpu_rper_t \
140 -bitfield V 0 0 \
141 -bitfield UE 3 3 -bitfield UW 4 4 -bitfield UR 5 5 \
142 -bitfield KE 6 6 -bitfield KW 7 7 -bitfield KR 8 8 \
143 -bitfield S 15 15 -bitfield SID 16 23
144 arc add-reg-type-flags -name status32_t \
145 -flag H 0 -flag E0 1 -flag E1 2 -flag E2 3 \
146 -flag E3 4 -flag AE 5 -flag DE 6 -flag U 7 \
147 -flag V 8 -flag C 9 -flag N 10 -flag Z 11 \
148 -flag L 12 -flag DZ 13 -flag SC 14 -flag ES 15 \
149 -flag RB0 16 -flag RB1 17 -flag RB2 18 \
150 -flag AD 19 -flag US 20 -flag IE 31
151
152 # Core registers
153 set core_regs {
154 r0 0 uint32
155 r1 1 uint32
156 r2 2 uint32
157 r3 3 uint32
158 r4 4 uint32
159 r5 5 uint32
160 r6 6 uint32
161 r7 7 uint32
162 r8 8 uint32
163 r9 9 uint32
164 r10 10 uint32
165 r11 11 uint32
166 r12 12 uint32
167 r13 13 uint32
168 r14 14 uint32
169 r15 15 uint32
170 r16 16 uint32
171 r17 17 uint32
172 r18 18 uint32
173 r19 19 uint32
174 r20 20 uint32
175 r21 21 uint32
176 r22 23 uint32
177 r23 24 uint32
178 r24 24 uint32
179 r25 25 uint32
180 gp 26 data_ptr
181 fp 27 data_ptr
182 sp 28 data_ptr
183 ilink 29 code_ptr
184 r30 30 uint32
185 blink 31 code_ptr
186 r32 32 uint32
187 r33 33 uint32
188 r34 34 uint32
189 r35 35 uint32
190 r36 36 uint32
191 r37 37 uint32
192 r38 38 uint32
193 r39 39 uint32
194 r40 40 uint32
195 r41 41 uint32
196 r42 42 uint32
197 r43 43 uint32
198 r44 44 uint32
199 r45 45 uint32
200 r46 46 uint32
201 r47 47 uint32
202 r48 48 uint32
203 r49 49 uint32
204 r50 50 uint32
205 r51 51 uint32
206 r52 52 uint32
207 r53 53 uint32
208 r54 54 uint32
209 r55 55 uint32
210 r56 56 uint32
211 r57 57 uint32
212 accl 58 uint32
213 acch 59 uint32
214 lp_count 60 uint32
215 limm 61 uint32
216 reserved 62 uint32
217 pcl 63 code_ptr
218 }
219 foreach {reg count type} $core_regs {
220 arc add-reg -name $reg -num $count -core -type $type -g \
221 -feature $core_feature
222 }
223
224 # AUX min
225 set aux_min {
226 0x6 pc code_ptr
227 0x2 lp_start code_ptr
228 0x3 lp_end code_ptr
229 0xA status32 status32_t
230 }
231 foreach {num name type} $aux_min {
232 arc add-reg -name $name -num $num -type $type -feature $aux_min_feature -g
233 }
234
235 # AUX other
236 set aux_other {
237 0x004 identity identity_t
238 0x005 debug debug_t
239 0x018 aux_dccm int
240 0x208 aux_iccm int
241
242 0x220 ap_amv0 uint32
243 0x221 ap_amm0 uint32
244 0x222 ap_ac0 ap_control_t
245 0x223 ap_amv1 uint32
246 0x224 ap_amm1 uint32
247 0x225 ap_ac1 ap_control_t
248 0x226 ap_amv2 uint32
249 0x227 ap_amm2 uint32
250 0x228 ap_ac2 ap_control_t
251 0x229 ap_amv3 uint32
252 0x22A ap_amm3 uint32
253 0x22B ap_ac3 ap_control_t
254 0x22C ap_amv4 uint32
255 0x22D ap_amm4 uint32
256 0x22E ap_ac4 ap_control_t
257 0x22F ap_amv5 uint32
258 0x230 ap_amm5 uint32
259 0x231 ap_ac5 ap_control_t
260 0x232 ap_amv6 uint32
261 0x233 ap_amm6 uint32
262 0x234 ap_ac6 ap_control_t
263 0x235 ap_amv7 uint32
264 0x236 ap_amm7 uint32
265 0x237 ap_ac7 ap_control_t
266
267 0x400 eret code_ptr
268 0x401 erbta code_ptr
269 0x402 erstatus status32_t
270 0x403 ecr ecr_t
271 0x404 efa data_ptr
272
273 0x409 mpu_en mpu_en_t
274
275 0x412 bta code_ptr
276
277 0x420 mpu_ecr mpu_ecr_t
278 0x422 mpu_rdb0 int
279 0x423 mpu_rdp0 int
280 0x424 mpu_rdb1 int
281 0x425 mpu_rdp1 int
282 0x426 mpu_rdb2 int
283 0x427 mpu_rdp2 int
284 0x428 mpu_rdb3 int
285 0x429 mpu_rdp3 int
286 0x42A mpu_rdb4 int
287 0x42B mpu_rdp4 int
288 0x42C mpu_rdb5 int
289 0x42D mpu_rdp5 int
290 0x42E mpu_rdb6 int
291 0x42F mpu_rdp6 int
292 0x430 mpu_rdb7 int
293 0x431 mpu_rdp7 int
294 0x432 mpu_rdb8 int
295 0x433 mpu_rdp8 int
296 0x434 mpu_rdb9 int
297 0x435 mpu_rdp9 int
298 0x436 mpu_rdb10 int
299 0x437 mpu_rdp10 int
300 0x438 mpu_rdb11 int
301 0x439 mpu_rdp11 int
302 0x43A mpu_rdb12 int
303 0x43B mpu_rdp12 int
304 0x43C mpu_rdb13 int
305 0x43D mpu_rdp13 int
306 0x43E mpu_rdb14 int
307 0x43F mpu_rdp14 int
308 0x440 mpu_rdb15 int
309 0x441 mpu_rdp15 int
310 0x448 mpu_index mpu_index_t
311 0x449 mpu_rstart uint32
312 0x44A mpu_rend uint32
313 0x44B mpu_rper mpu_rper_t
314 0x44C mpu_probe uint32
315 }
316 foreach {num name type} $aux_other {
317 arc add-reg -name $name -num $num -type $type -feature $aux_other_feature
318 }
319
320 # AUX BCR
321 set bcr {
322 0x6D mpu_build
323 0x74 dccm_build
324 0x76 ap_build
325 0x78 iccm_build
326 0xC1 isa_config
327 }
328 foreach {num reg} $bcr {
329 arc add-reg -name $reg -num $num -type ${reg}_t -bcr -feature $aux_other_feature
330 }
331
332 [target current] configure \
333 -event examine-end "arc_v2_examine_target [target current]"
334 }
335
336 proc arc_v2_reset { {target ""} } {
337 arc_common_reset $target
338
339 # Disable all actionpoints. Cannot write via regcache yet, because it will
340 # not be flushed and all changes to registers will get lost. Therefore has
341 # to write directly via JTAG layer...
342 set num_ap [arc num-actionpoints]
343 for {set i 0} {$i < $num_ap} {incr i} {
344 arc jtag set-aux-reg [expr {0x222 + $i * 3}] 0
345 }
346 }

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