1 # Copyright (C) 2015, 2020 Synopsys, Inc.
2 # Anton Kolesov <anton.kolesov@synopsys.com>
3 # Didin Evgeniy <didin@synopsys.com>
5 # SPDX-License-Identifier: GPL-2.0-or-later
7 source [find cpu
/arc
/common.tcl
]
9 # Currently 'examine_target' can only read JTAG registers and set properties -
10 # but it shouldn't write any of registers - writes will be cached, but cache
11 # will be invalidated before flushing after examine_target, and changes will be
12 # lost. Perhaps that would be fixed later - perhaps writes shouldn't be cached
13 # after all. But if write to register is really needed from TCL - then it
14 # should be done via "arc jtag" for now.
15 proc arc_v2_examine_target
{ {target
""} } {
16 # Set current target, because OpenOCD event handlers don't do this for us.
17 if { $target != "" } {
21 # Those registers always exist. DEBUG and DEBUGI are formally optional,
22 # however they come with JTAG interface, and so far there is no way
23 # OpenOCD can communicate with target without JTAG interface.
24 arc set-reg-exists identity pc status32 bta debug lp_start lp_end
\
25 eret erbta erstatus ecr efa
29 r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12
\
30 r13 r14 r15 r16 r17 r18 r19 r20 r21 r22 r23 r24 r25
\
31 gp fp sp ilink r30 blink lp_count pcl
34 if { [arc get-reg-field ap_build version
] == 5 } {
35 set ap_build_type
[arc get-reg-field ap_build type
]
36 # AP_BUILD.TYPE > 0b0110 is reserved in current ISA.
37 # Current ISA supports up to 8 actionpoints.
38 if { $ap_build_type < 8 } {
39 # Two LSB bits of AP_BUILD.TYPE define amount of actionpoints:
40 # 0b00 - 2 actionpoints
41 # 0b01 - 4 actionpoints
42 # 0b10 - 8 actionpoints
44 set ap_num
[expr {0x2 << ($ap_build_type & 3)}]
45 # Expression on top may produce 16 action points - which is a
46 # reserved value for now.
48 # Enable actionpoint registers
49 for {set i
0} {$i < $ap_num} {incr i
} {
50 arc set-reg-exists ap_amv
$i ap_amm
$i ap_ac
$i
53 # Set amount of actionpoints
54 arc num-actionpoints
$ap_num
60 set dccm_version
[arc get-reg-field dccm_build version
]
61 if { $dccm_version == 3 ||
$dccm_version == 4 } {
62 arc set-reg-exists aux_dccm
66 if { [arc get-reg-field iccm_build version
] == 4 } {
67 arc set-reg-exists aux_iccm
71 if { [arc get-reg-field mpu_build version
] >= 2 &&
72 [arc get-reg-field mpu_build version
] <= 4 } {
73 arc set-reg-exists mpu_en mpu_ecr
74 set mpu_regions
[arc get-reg-field mpu_build regions
]
75 for {set i
0} {$i < $mpu_regions} {incr i
} {
76 arc set-reg-exists mpu_rdp
$i mpu_rdb
$i
80 if { [arc get-reg-field mpu_build version
] == 4 } {
81 arc set-reg-exists mpu_index mpu_rstart mpu_rend mpu_rper
86 proc arc_v2_init_regs
{ } {
88 set core_feature
"org.gnu.gdb.arc.core.v2"
89 set aux_min_feature
"org.gnu.gdb.arc.aux-minimal"
90 set aux_other_feature
"org.gnu.gdb.arc.aux-other"
93 # Types are sorted alphabetically according to their name.
94 arc add-reg-type-struct
-name ap_build_t
-bitfield version
0 7 \
96 arc add-reg-type-struct
-name ap_control_t
-bitfield at
0 3 -bitfield tt
4 5 \
97 -bitfield m
6 6 -bitfield p
7 7 -bitfield aa
8 8 -bitfield q
9 9
98 # Cycles field added in version 4.
99 arc add-reg-type-struct
-name dccm_build_t
-bitfield version
0 7 \
100 -bitfield size0
8 11 -bitfield size1
12 15 -bitfield cycles
17 19
102 arc add-reg-type-struct
-name debug_t
\
103 -bitfield fh
1 1 -bitfield ah
2 2 -bitfield asr
3 10 \
104 -bitfield is
11 11 -bitfield ep
19 19 -bitfield ed
20 20 \
105 -bitfield eh
21 21 -bitfield ra
22 22 -bitfield zz
23 23 \
106 -bitfield sm
24 26 -bitfield ub
28 28 -bitfield bh
29 29 \
107 -bitfield sh
30 30 -bitfield ld
31 31
109 arc add-reg-type-struct
-name ecr_t
\
110 -bitfield parameter
0 7 \
111 -bitfield cause
8 15 \
112 -bitfield vector
16 23 \
115 arc add-reg-type-struct
-name iccm_build_t
-bitfield version
0 7 \
116 -bitfield iccm0_size0
8 11 -bitfield iccm1_size0
12 15 \
117 -bitfield iccm0_size1
16 19 -bitfield iccm1_size1
20 23
118 arc add-reg-type-struct
-name identity_t
\
119 -bitfield arcver
0 7 -bitfield arcnum
8 15 -bitfield chipid
16 31
120 arc add-reg-type-struct
-name isa_config_t
-bitfield version
0 7 \
121 -bitfield pc_size
8 11 -bitfield lpc_size
12 15 -bitfield addr_size
16 19 \
122 -bitfield b
20 20 -bitfield a
21 21 -bitfield n
22 22 -bitfield l
23 23 \
123 -bitfield c
24 27 -bitfield d
28 31
124 arc add-reg-type-struct
-name mpu_build_t
-bitfield version
0 7 \
125 -bitfield regions
8 15 \
128 arc add-reg-type-struct
-name mpu_ecr_t
\
131 -bitfield EC_CODE
16 31
132 arc add-reg-type-struct
-name mpu_en_t
\
133 -bitfield UE
3 3 -bitfield UW
4 4 -bitfield UR
5 5 \
134 -bitfield KE
6 6 -bitfield KW
7 7 -bitfield KR
8 8 \
135 -bitfield S
15 15 -bitfield SID
16 23 \
137 arc add-reg-type-struct
-name mpu_index_t
\
138 -bitfield I
0 3 -bitfield M
30 30 -bitfield D
31 31
139 arc add-reg-type-struct
-name mpu_rper_t
\
141 -bitfield UE
3 3 -bitfield UW
4 4 -bitfield UR
5 5 \
142 -bitfield KE
6 6 -bitfield KW
7 7 -bitfield KR
8 8 \
143 -bitfield S
15 15 -bitfield SID
16 23
144 arc add-reg-type-flags
-name status32_t
\
145 -flag H
0 -flag E0
1 -flag E1
2 -flag E2
3 \
146 -flag E3
4 -flag AE
5 -flag DE
6 -flag U
7 \
147 -flag V
8 -flag C
9 -flag N
10 -flag Z
11 \
148 -flag L
12 -flag DZ
13 -flag SC
14 -flag ES
15 \
149 -flag RB0
16 -flag RB1
17 -flag RB2
18 \
150 -flag AD
19 -flag US
20 -flag IE
31
219 foreach {reg count type
} $core_regs {
220 arc add-reg
-name $reg -num $count -core -type $type -g \
221 -feature $core_feature
227 0x2 lp_start code_ptr
229 0xA status32 status32_t
231 foreach {num name type
} $aux_min {
232 arc add-reg
-name $name -num $num -type $type -feature $aux_min_feature -g
237 0x004 identity identity_t
244 0x222 ap_ac0 ap_control_t
247 0x225 ap_ac1 ap_control_t
250 0x228 ap_ac2 ap_control_t
253 0x22B ap_ac3 ap_control_t
256 0x22E ap_ac4 ap_control_t
259 0x231 ap_ac5 ap_control_t
262 0x234 ap_ac6 ap_control_t
265 0x237 ap_ac7 ap_control_t
269 0x402 erstatus status32_t
273 0x409 mpu_en mpu_en_t
277 0x420 mpu_ecr mpu_ecr_t
310 0x448 mpu_index mpu_index_t
311 0x449 mpu_rstart uint32
312 0x44A mpu_rend uint32
313 0x44B mpu_rper mpu_rper_t
314 0x44C mpu_probe uint32
316 foreach {num name type
} $aux_other {
317 arc add-reg
-name $name -num $num -type $type -feature $aux_other_feature
328 foreach {num reg
} $bcr {
329 arc add-reg
-name $reg -num $num -type ${reg
}_t
-bcr -feature $aux_other_feature
332 [target current
] configure
\
333 -event examine-end
"arc_v2_examine_target [target current]"
336 proc arc_v2_reset
{ {target
""} } {
337 arc_common_reset
$target
339 # Disable all actionpoints. Cannot write via regcache yet, because it will
340 # not be flushed and all changes to registers will get lost. Therefore has
341 # to write directly via JTAG layer...
342 set num_ap
[arc num-actionpoints
]
343 for {set i
0} {$i < $num_ap} {incr i
} {
344 arc jtag set-aux-reg
[expr {0x222 + $i * 3}] 0
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