tcl/target/altera_fpgasoc_arria10.cfg

   1 # SPDX-License-Identifier: GPL-2.0-or-later
   2
   3 # Intel (Altera) Arria10 FPGA SoC
   4
   5 if { [info exists CHIPNAME] } {
   6         set _CHIPNAME $CHIPNAME
   7 } else {
   8         set _CHIPNAME arria10
   9 }
  10
  11 # ARM CoreSight Debug Access Port (dap HPS)
  12 if { [info exists DAP_TAPID] } {
  13         set _DAP_TAPID $DAP_TAPID
  14 } else {
  15         set _DAP_TAPID 0x4ba00477
  16 }
  17 jtag newtap $_CHIPNAME cpu -irlen 4 -expected-id $_DAP_TAPID
  18
  19 # Subsidiary TAP: fpga (tap)
  20 # See Intel Arria 10 Handbook
  21 # https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/hb/arria-10/a10_handbook.pdf
  22 # Intel Arria 10 GX 160  0x02ee20dd
  23 # Intel Arria 10 GX 220  0x02e220dd
  24 # Intel Arria 10 GX 270  0x02ee30dd
  25 # Intel Arria 10 GX 320  0x02e230dd
  26 # Intel Arria 10 GX 480  0x02e240dd
  27 # Intel Arria 10 GX 570  0x02ee50dd
  28 # Intel Arria 10 GX 660  0x02e250dd
  29 # Intel Arria 10 GX 900  0x02ee60dd
  30 # Intel Arria 10 GX 1150 0x02e660dd
  31 # Intel Arria 10 GT 900  0x02e260dd
  32 # Intel Arria 10 GT 1150 0x02e060dd
  33 # Intel Arria 10 SX 160  0x02e620dd
  34 # Intel Arria 10 SX 220  0x02e020dd
  35 # Intel Arria 10 SX 270  0x02e630dd
  36 # Intel Arria 10 SX 320  0x02e030dd
  37 # Intel Arria 10 SX 480  0x02e040dd
  38 # Intel Arria 10 SX 570  0x02e650dd
  39 # Intel Arria 10 SX 660  0x02e050dd
  40 jtag newtap $_CHIPNAME.fpga tap -irlen 10 -expected-id 0x02ee20dd -expected-id 0x02e220dd \
  41         -expected-id 0x02ee30dd -expected-id 0x02e230dd -expected-id 0x02e240dd \
  42         -expected-id 0x02ee50dd -expected-id 0x02e250dd -expected-id 0x02ee60dd \
  43         -expected-id 0x02e660dd -expected-id 0x02e260dd -expected-id 0x02e060dd \
  44         -expected-id 0x02e620dd -expected-id 0x02e020dd -expected-id 0x02e630dd \
  45         -expected-id 0x02e030dd -expected-id 0x02e040dd -expected-id 0x02e650dd \
  46         -expected-id 0x02e050dd
  47
  48 set _TARGETNAME $_CHIPNAME.cpu
  49
  50 #
  51 # Cortex-A9 target
  52
  53 dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
  54
  55 target create $_TARGETNAME.0 cortex_a -dap $_CHIPNAME.dap -coreid 0
  56 target create $_TARGETNAME.1 cortex_a -dap $_CHIPNAME.dap -coreid 1 \
  57         -defer-examine
  58 target smp $_TARGETNAME.0 $_TARGETNAME.1