tcl/target/atsame5x.cfg

   1 # SPDX-License-Identifier: GPL-2.0-or-later
   2
   3 #
   4 # Microchip (former Atmel) SAM E54, E53, E51 and D51 devices
   5 # with a Cortex-M4 core
   6 #
   7
   8 #
   9 # Devices only support SWD transports.
  10 #
  11 source [find target/swj-dp.tcl]
  12
  13 if { [info exists CHIPNAME] } {
  14    set _CHIPNAME $CHIPNAME
  15 } else {
  16    set _CHIPNAME atsame5
  17 }
  18
  19 if { [info exists ENDIAN] } {
  20    set _ENDIAN $ENDIAN
  21 } else {
  22    set _ENDIAN little
  23 }
  24
  25 # Work-area is a space in RAM used for flash programming
  26 # By default use 32kB (the smallest RAM size is 128kB)
  27 if { [info exists WORKAREASIZE] } {
  28    set _WORKAREASIZE $WORKAREASIZE
  29 } else {
  30    set _WORKAREASIZE 0x8000
  31 }
  32
  33 if { [info exists CPUTAPID] } {
  34    set _CPUTAPID $CPUTAPID
  35 } else {
  36    set _CPUTAPID 0x4ba00477
  37 }
  38
  39 swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
  40 dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
  41
  42 set _TARGETNAME $_CHIPNAME.cpu
  43 target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap
  44
  45 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
  46
  47 # SAM DSU will hold the CPU in reset if TCK is low when RESET_N
  48 # deasserts
  49 #
  50 # dsu_reset_deassert configures whether we want to run or halt out of reset,
  51 # then instruct the DSU to let us out of reset.
  52 $_TARGETNAME configure -event reset-deassert-post {
  53         atsame5 dsu_reset_deassert
  54 }
  55
  56 # SRST (wired to RESET_N) resets debug circuitry
  57 # srst_pulls_trst is not configured here to avoid an error raised in reset halt
  58 reset_config srst_gates_jtag
  59
  60 # Do not use a reset button with other SWD adapter than Atmel's EDBG.
  61 # DSU usually locks MCU in reset state until you issue a reset command
  62 # in OpenOCD.
  63
  64 # SAM E5x/D51 runs at SYSCLK = 48 MHz from RC oscillator after reset.
  65 # Atmel's EDBG (on-board cmsis-dap adapter of Xplained kits) works
  66 # without problem at clock speed over 5000 khz. Atmel recommends
  67 # adapter speed less than 10 * CPU clock.
  68 adapter speed 2000
  69
  70 if {![using_hla]} {
  71    # if srst is not fitted use SYSRESETREQ to
  72    # perform a soft reset
  73    cortex_m reset_config sysresetreq
  74 }
  75
  76 set _FLASHNAME $_CHIPNAME.flash
  77 flash bank $_FLASHNAME atsame5 0x00000000 0 1 1 $_TARGETNAME