target/xtensa: avoid IHI for writes to non-executable memory
[openocd.git] / tcl / target / esp32s2.cfg
1 # SPDX-License-Identifier: GPL-2.0-or-later
2 #
3
4 # Source the ESP common configuration file.
5 source [find target/esp_common.cfg]
6
7 # Target specific global variables
8 set _CHIPNAME "esp32s2"
9 set _CPUTAPID 0x120034e5
10 set _ESP_ARCH "xtensa"
11 set _ONLYCPU 1
12 set _ESP_SMP_TARGET 0
13 set _ESP_SMP_BREAK 1
14 set _ESP_EFUSE_MAC_ADDR_REG 0x3f41A004
15
16 proc esp32s2_memprot_is_enabled { } {
17 # IRAM0, DPORT_PMS_PRO_IRAM0_0_REG
18 if { [get_mmr_bit 0x3f4c1010 0] != 0 } {
19 return 1
20 }
21 # DRAM0, DPORT_PMS_PRO_DRAM0_0_REG
22 if { [get_mmr_bit 0x3f4c1028 0] != 0 } {
23 return 1
24 }
25 # PERI1, DPORT_PMS_PRO_DPORT_0_REG
26 if { [get_mmr_bit 0x3f4c103c 0] != 0 } {
27 return 1
28 }
29 # PERI2, DPORT_PMS_PRO_AHB_0_REG
30 if { [get_mmr_bit 0x3f4c105c 0] != 0 } {
31 return 1
32 }
33 return 0
34 }
35
36 proc esp32s2_soc_reset { } {
37 soft_reset_halt
38 }
39
40 create_esp_target $_ESP_ARCH
41
42 source [find target/xtensa-core-esp32s2.cfg]

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